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    • 21. 发明授权
    • Processes for the preparation of fluorinated acyl fluorides and fluorinated vinyl ethers
    • 氟化氟化物和氟化乙烯基醚的制备方法
    • US06919480B2
    • 2005-07-19
    • US10727610
    • 2003-12-05
    • Takashi OkazoeKunio WatanabeMasahiro ItoDaisuke ShirakawaShin Tatematsu
    • Takashi OkazoeKunio WatanabeMasahiro ItoDaisuke ShirakawaShin Tatematsu
    • C07C41/48C07C43/313C07C51/58C07D317/42C08F16/24C08F24/00C07C51/62
    • C08F24/00C07C41/48C07C51/58C07D317/42C08F16/24C07C59/135C07C43/313
    • The present invention provides novel processes for preparing a fluorinated acyl fluoride and a fluorinated vinyl ether.Namely, it provides a process for preparing a fluorinated acyl fluoride (3), which comprises reacting a compound (1) having a fluorine content of 30 mass % or above with fluorine in a liquid phase to form a compound (2) and then dissociating the ester bond in the compound (2), and a process for preparing a fluorinated vinyl ether (10), which comprises pyrolyzing the fluorinated acyl fluoride: wherein RA and RB are alkyl groups or the like, or the combination RA and RB is an ethereal oxygen-containing alkylene group or the like, RC and RD are perfluoro(ethereal oxygen-containing alkyl) groups or the like, or the combination of RC and RD is a perfluoro(ethereal oxygen-containing alkylene) group or the like, X1, X2, X3, X4, X5 and X6 are hydrogen atoms, fluorine atoms or the like, RAF, RBF, RCF and RDF are groups derived respectively from RA, RB, RC and RD by replacing substantially all of the hydrogen atoms by fluorine atoms.
    • 本发明提供了制备氟化酰氟和氟化乙烯基醚的新方法。 即,提供一种制备氟化酰基氟(3)的方法,其包括使氟含量为30质量%以上的化合物(1)与氟在液相中反应以形成化合物(2),然后解离 化合物(2)中的酯键和制备氟化乙烯基醚(10)的方法,其包括热解氟化酰基氟:其中R A A和R B B >是烷基等,或者组合R A和B B是含醚的含氧亚烷基等,R 0 C >和R“D”是全氟(醚类含氧烷基)基团等,或者R 0和R D 2的组合是 全氟(醚性亚烷基)亚烷基等,X 1,X 2,X 3,X 4, SUP>,X 5和X 6是氢原子,氟原子等,R AF,BF,BF >,R< CF>和R> DF 是分别由R A,R B,R C和R D D衍生的基团, 用氟原子代替基本上所有的氢原子。
    • 25. 发明授权
    • Semiconductor device, memory system and electronic apparatus
    • 半导体器件,存储器系统和电子设备
    • US06747322B2
    • 2004-06-08
    • US10154423
    • 2002-05-21
    • Junichi KarasawaKunio Watanabe
    • Junichi KarasawaKunio Watanabe
    • H01L2976
    • H01L27/1104
    • A semiconductor device having a memory cell including first and second load transistors, first and second driver transistors, and first and second transfer transistors. The semiconductor device includes first and second gate—gate electrode layers, first and second drain—drain wiring layers, and first and second drain-gate wiring layers. The first drain-gate wiring layer and the second drain-gate wiring layer are located in different layers. The first drain-gate wiring layer is located below the first drain—drain wiring layer, and the second drain-gate wiring layer is located in above the first drain—drain wiring layer. This structure provides a semiconductor device that has reduced cell area. The invention also provides a memory system and electronic apparatus that include the above semiconductor device.
    • 具有包括第一和第二负载晶体管,第一和第二驱动晶体管以及第一和第二转移晶体管的存储单元的半导体器件。 半导体器件包括第一和第二栅极 - 栅极电极层,第一和第二漏极 - 漏极布线层以及第一和第二漏极 - 栅极布线层。 第一漏极 - 栅极布线层和第二漏极 - 栅极布线层位于不同的层中。 第一漏极 - 栅极布线层位于第一漏极 - 漏极布线层的下方,第二漏极 - 栅极布线层位于第一漏极 - 漏极布线层的上方。 该结构提供了具有减小的单元面积的半导体器件。 本发明还提供了包括上述半导体器件的存储器系统和电子设备。
    • 27. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US06300229B1
    • 2001-10-09
    • US09563130
    • 2000-05-02
    • Kazuo TanakaTakashi KumagaiJunichi KarasawaKunio Watanabe
    • Kazuo TanakaTakashi KumagaiJunichi KarasawaKunio Watanabe
    • H01L2120
    • H01L27/11H01L21/28518H01L21/76895H01L21/76897H01L27/1104
    • A method of manufacturing a semiconductor device comprising the following steps: forming first, second, and third wiring layers on a semiconductor substrate; forming first, second, and third cover dielectric layers for covering these wiring layers; forming a first impurity diffusion layer of a P type and a second impurity diffusion layer of an N type in an active region, and forming a third impurity diffusion layer of a P type and a fourth impurity diffusion layer of an N type in an active region; self-alignably forming a first local wiring layer for connecting the first impurity diffusion layer with the second wiring layer, and self-alignably forming a second local wiring layer for connecting the fourth impurity diffusion layer with the third wiring layer; in an interlayer dielectric layer, self-alignably forming a first contact hole by using the first and third cover dielectric layers as masking layers, and self-alignably forming a second contact hole by using the second cover dielectric layer as a masking layer; and forming fourth and fifth wiring layers in these contact holes, respectively.
    • 一种制造半导体器件的方法,包括以下步骤:在半导体衬底上形成第一,第二和第三布线层; 形成用于覆盖这些布线层的第一,第二和第三覆盖电介质层; 在有源区中形成P型和N型的第二杂质扩散层的第一杂质扩散层,在有源区中形成P型的第三杂质扩散层和N型的第四杂质扩散层 ; 自对准地形成用于将第一杂质扩散层与第二布线层连接的第一局部布线层,并自对准地形成用于将第四杂质扩散层与第三布线层连接的第二局部布线层; 在层间电介质层中,通过使用第一和第三覆盖电介质层作为掩蔽层自对准地形成第一接触孔,并且通过使用第二覆盖电介质层作为掩蔽层自对准地形成第二接触孔; 并且在这些接触孔中分别形成第四和第五布线层。