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21. 发明授权

US5113392A Communication apparatus for reassembling packets received from network into message 失效
标题翻译：将从网络接收的分组重新传送到消息的通信装置
公开(公告)号：US5113392A
公开(公告)日：1992-05-12
申请号：US539961
申请日：1990-06-18
申请人： Yoshihiro Takiyasu , Mitsuhiro Yamaga , Kazunori Nakamura , Eiichi Amada , Hidehiko Jusa , Naoya Kobayashi , Osamu Takada , Satoru Hirayama , Tatsuhito Iiyama
发明人： Yoshihiro Takiyasu , Mitsuhiro Yamaga , Kazunori Nakamura , Eiichi Amada , Hidehiko Jusa , Naoya Kobayashi , Osamu Takada , Satoru Hirayama , Tatsuhito Iiyama
IPC分类号： H04L13/08 , H04L12/813 , H04L12/815 , H04L12/863 , H04L12/951
CPC分类号： H04L49/3009 , H04L49/252
摘要： In a network having a plurality of node apparatus connected to a transmission line, each node apparatus segmenting a transmission message into information blocks of a predetermined length and transmitting them to the transmission line in the form of a fixed length packet (cell) having a source address, each node apparatus sequentially stores packets having different source addresses in vacant memory blocks of a buffer memory. There is written in each memory block the packet data as well as a next address pointer indicating a memory block in which the next received packet having the same source address is stored. When a packet containing the last information block of a message is received, stored in a read address queue is the address indicating the memory block which stores the first information block of the same packet. Reading the first block of a message from the buffer memory is executed in accordance with an address read from the read address queue, and reading the following blocks is executed in accordance with the next address pointer. Read/write of the buffer memory is alternately executed in units of memory block.

22. 发明授权

US5103447A High-speed ring LAN system 失效
标题翻译：高速环网系统
公开(公告)号：US5103447A
公开(公告)日：1992-04-07
申请号：US399901
申请日：1989-08-29
申请人： Yoshihiro Takiyasu , Toshiki Tanaka , Taihei Suzuki , Eiichi Amada , Yukiji Yamauchi , Mitsuhiro Yamaga , Matsuaki Terada , Kunio Hiyama
发明人： Yoshihiro Takiyasu , Toshiki Tanaka , Taihei Suzuki , Eiichi Amada , Yukiji Yamauchi , Mitsuhiro Yamaga , Matsuaki Terada , Kunio Hiyama
IPC分类号： H04J3/08 , H04J3/16 , H04L12/43 , H04L12/56 , H04Q11/04
CPC分类号： H04J3/08 , H04J3/1617 , H04L12/43 , H04Q11/0478 , H04J2203/0042 , H04J2203/0089 , H04L2012/5652 , H04L2012/5672
摘要： A high-speed ring LAN capable of accommodating at least one public network having a signal transmission rate of 155.57 MHz, and at least one sub-LAN having a signal transmission rate of 100 MHz. The high-speed LAN has a signal transmission rate of 155.52 Mbps.times.n (n is an even number). SONET (Synchronous Optical NETwork) subframes each comprising a 9 bytes.times.9 section overhead area and a 261 bytes.times.9 virtual container 4 (VC-4) area flow in a time-divisional n-multiplexed format. The respective node devices inserted in the transmission path have one or more ports to accommodate sub-LANs or public networks. Information is exchanged in units of a fixed-length packet between a received SONET subframe and an asynchronous packet whereas information is exchanged in units of a byte between the SONET subframe and a synchronous port.
摘要翻译：能够容纳具有155.57MHz的信号传输速率的至少一个公共网络的高速环形LAN以及信号传输速率为100MHz的至少一个子LAN。高速LAN的信号传输速率为155.52Mbps×n（n为偶数）。 SONET（同步光网络）子帧，每个子帧包括时分多路复用格式的9字节×9部分开销区域和261字节×9虚拟容器4（VC-4）区域流。插入传输路径中的各个节点设备具有一个或多个端口以适应子LAN或公共网络。在接收的SONET子帧和异步分组之间以固定长度的分组为单位交换信息，而以SONET子帧和同步端口之间的字节为单位交换信息。

23. 发明授权

US4841521A Method and system for bidirectionally transmitting data 失效
标题翻译：双向传输数据的方法和系统
公开(公告)号：US4841521A
公开(公告)日：1989-06-20
申请号：US55036
申请日：1987-05-28
申请人： Eiichi Amada , Hirotoshi Shirasu , Hiroshi Takatori , Tohru Kazawa , Toshiro Suzuki , Takanori Miyamoto , Tatsuya Kameyama
发明人： Eiichi Amada , Hirotoshi Shirasu , Hiroshi Takatori , Tohru Kazawa , Toshiro Suzuki , Takanori Miyamoto , Tatsuya Kameyama
IPC分类号： H04L5/14
CPC分类号： H04L5/1484
摘要： A method and a system for bidirectional transmission/reception of data between two terminal stations, in which each transmission period is divided into a plurality of first time sections for relatively low speed data transmission and at least one second time section for relatively high speed data transmission, the direction of transmission between the terminal stations being predetermined in each of the first time sections, while the direction of transmission between the terminal stations is reversible in each of the second time sections, each second time section being preceded by one of the first time sections. Transmission of information data and control data is performed from one to the other terminal station in a predetermined direction in each first time section, and the direction of data transmission between the terminal stations in the next second time section is determined on the basis of control data contained in the relatively low speed data transmission.
摘要翻译：一种用于在两个终端站之间双向传输/接收数据的方法和系统，其中每个传输周期被分成用于相对低速数据传输的多个第一时间段和用于相对高速数据传输的至少一个第二时间段所述终端站之间的传输方向在所述第一时间段中的每一个中是预定的，而在所述第二时间段中的每一个中，所述终端站之间的传输方向是可逆的，每个第二时间段之前是所述第一时间段之一部分。在每个第一时间段中，以预定方向从一个终端站到另一个终端站发送信息数据和控制数据，并且基于控制数据确定下一个第二时间段中的终端站之间的数据传输方向包含在相对低速的数据传输中。

24. 发明授权

US4608464A Interface circuit interconnecting a bidirectional two-wire line with unidirectional four-wire lines 失效
标题翻译：接口电路将双向双线线路与单向四线制线路互连
公开(公告)号：US4608464A
公开(公告)日：1986-08-26
申请号：US605904
申请日：1984-05-01
申请人： Yuichi Morikawa , Hirohiko Sato , Eiichi Amada , Toshiro Suzuki , Hirotoshi Shirasu , Hiroshi Kuwahara
发明人： Yuichi Morikawa , Hirohiko Sato , Eiichi Amada , Toshiro Suzuki , Hirotoshi Shirasu , Hiroshi Kuwahara
IPC分类号： H04B3/03 , H04B3/20 , H04B3/23 , H04B1/58
CPC分类号： H04B3/03 , H04B3/23
摘要： In an interface circuit which couples a two-wire line of bidirectional transmission and unidirectional four-wire receiving and transmitting lines; in order to permit the interface circuit to operate in adaptation to the fluctuation of an impedance with the two-wire line side viewed from the four-wire receiving line, the four-wire receiving line is provided with a plurality of filters and a group of switches for selecting the filters, an output of the four-wire transmitting line is compared with outputs obtained by scanning the filters, and the filter providing the minimum output difference in the comparisons is selected and connected.
摘要翻译：在耦合双向传输双线线路和单向四线接收和发射线路的接口电路中; 为了允许接口电路适应于从四线接收线观察到的双线线路的阻抗的波动，四线接收线路设置有多个滤波器和一组用于选择滤波器的开关，将四线传输线的输出与通过扫描滤波器获得的输出进行比较，并选择并连接提供比较中最小输出差的滤波器。

25. 发明授权

US4543652A Time-division switching unit 失效
标题翻译：时分切换单元
公开(公告)号：US4543652A
公开(公告)日：1985-09-24
申请号：US517697
申请日：1983-07-27
申请人： Eiichi Amada , Hiroshi Kuwahara , Hirotoshi Shirasu , Taihei Suzuki , Takashi Morita
发明人： Eiichi Amada , Hiroshi Kuwahara , Hirotoshi Shirasu , Taihei Suzuki , Takashi Morita
IPC分类号： H04J3/06 , H04Q11/04
CPC分类号： H04J3/0629 , H04Q11/04
摘要： A time-division switching unit for connecting a desired channel of a desired one of a plurality of input highways to a desired channel of a desired one of a plurality of output highways is disclosed. A frame synchronization circuit of the time-division switching unit variably delays signals of the input highways within one channel period, writes the signals to a speech memory for each channel, modifies write addresses to the speech memory to attain frame synchronization, extracts frame synchronization signals of the respective highways from the input and output of the speech memory, and controls the amount of delay within one channel period and the amount of address modification by the extracted synchronization signals.
摘要翻译：公开了一种时分切换单元，用于将多个输入高速公路中期望的一个输入高速公路的期望频道连接到多个输出高速公路中期望的一个输出高速公路的期望频道。时分切换单元的帧同步电路在一个信道周期内可变地延迟输入高速公路的信号，将信号写入每个信道的语音存储器，将写入地址修改为语音存储器以获得帧同步，提取帧同步信号从控制语音存储器的输入和输出的各个高速公路，并且控制一个信道周期内的延迟量以及所提取的同步信号的地址修改量。

26. 发明授权

US4223389A Recursive digital filter having means to prevent overflow oscillation 失效
标题翻译：递归数字滤波器具有防止溢出振荡的装置
公开(公告)号：US4223389A
公开(公告)日：1980-09-16
申请号：US909066
申请日：1978-05-24
申请人： Eiichi Amada , Makoto Ohnishi
发明人： Eiichi Amada , Makoto Ohnishi
IPC分类号： E04G1/22 , H03H17/04 , G06F15/34 , G06F7/38
CPC分类号： H03H17/0461 , H03H17/0405
摘要： This invention has been made in order to prevent the malfunction due to an overflow, of a combinatorial type recursive digital filter whose feedback side is of the second or higher order. Means for detecting the overflow of the output of an arithmetic unit which executes an addition within the filter is additionally provided, and when the overflow has developed, the contents of shift registers for delay on, at least, the feedback side are reset by an output from the detecting means.
摘要翻译：本发明是为了防止由于溢出而引起的反馈侧为二阶以上的组合型递归数字滤波器的故障。附加地提供用于检测在滤波器内执行相加的运算单元的输出的溢出的装置，并且当溢出发展时，至少在反馈侧的延迟的移位寄存器的内容被输出从检测装置。

27. 发明授权

US06314096B1 Packet switching system having self-routing switches 失效
标题翻译：分组交换系统具有自路由交换机
公开(公告)号：US06314096B1
公开(公告)日：2001-11-06
申请号：US09467213
申请日：1999-12-20
申请人： Shirou Tanabe , Taihei Suzuki , Shinobu Gohara , Yoshito Sakurai , Kenichi Ohtsuki , Takao Kato , Hiroshi Kuwahara , Eiichi Amada
发明人： Shirou Tanabe , Taihei Suzuki , Shinobu Gohara , Yoshito Sakurai , Kenichi Ohtsuki , Takao Kato , Hiroshi Kuwahara , Eiichi Amada
IPC分类号： H04L1228
CPC分类号： H04Q11/0421 , H04L12/5601 , H04L12/6402 , H04L49/101 , H04L49/106 , H04L49/1507 , H04L49/1553 , H04L49/1584 , H04L49/25 , H04L49/254 , H04L49/255 , H04L49/256 , H04L49/30 , H04L49/3009 , H04L49/3081 , H04L49/309 , H04L2012/563 , H04L2012/5632 , H04L2012/5652 , H04L2012/5671 , H04L2012/5672 , H04L2012/568 , H04L2012/6481 , H04Q11/0407 , H04Q2213/13104 , H04Q2213/13106 , H04Q2213/13141 , H04Q2213/13176 , H04Q2213/13204 , H04Q2213/13209 , H04Q2213/13216 , H04Q2213/1329 , H04Q2213/13292 , H04Q2213/13332 , H04Q2213/13352 , H04Q2213/13399
摘要： In a packet switching system made up of a single or a plurality of switching nodes or local units each including a label conversion unit for accommodating a plurality of packet circuits and performing conversion into output port information of a switch on the basis of a logic channel on a packet circuit, a self-routing switch for performing switching on the basis of the output port information, land a control unit for terminating a control packet and performing the call processing function, and a switching node or tandem unit including a single or a plurality of self-routing switches for interconnecting the local units, there are provided a device for setting, between the tandem unit and a destination-side local unit, the same logic channel as that between an originating-side local unit operative for information transfer and the tandem unit in respect of a call destined for a local unit other than this local unit and a device, operable in the originating side local unit for information transfer, for inserting output port information of the self-routing switch inside the tandem unit into a packet destined for the local unit other than this local unit, whereby in the tandem unit, setting of logic channel conversion information is not required to be done and even when any control signal packet from the originating-side local unit arrives at the tandem unit, the packet is transferred to the destination-side local unit without undergoing termination of packet and concomitant call processing control.
摘要翻译：在由单个或多个交换节点或本地单元组成的分组交换系统中，每个交换节点或本地单元包括用于容纳多个分组电路的标签转换单元，并且基于逻辑信道对交换机的输出端口信息进行转换分组电路，用于基于输出端口信息进行切换的自路由交换机，用于终止控制分组并执行呼叫处理功能的控制单元，以及包括单个或多个的交换节点或串联单元的用于互连本地单元的自路由交换机，提供了一种用于在串联单元和目的地侧本地单元之间设置与用于信息传输的始发侧本地单元和与目的地侧本地单元相同的逻辑信道的设备，关于发往本地单元以外的本地单元的呼叫的串联单元和可在始发方本地单元中操作的设备的装置传输，用于将串联单元内的自路由交换机的输出端口信息插入目的地为本地单元以外的本地单元的分组，由此在串联单元中，不需要设置逻辑信道转换信息，即使当来自始发方本地单元的任何控制信号分组到达串联单元时，分组被传送到目的地侧本地单元，而不会发生分组的终止和伴随的呼叫处理控制。

28. 发明授权

US5995510A Distributed type switching system 失效
公开(公告)号：US5995510A
公开(公告)日：1999-11-30
申请号：US903176
申请日：1997-07-30
申请人： Yoshito Sakurai , Shinobu Gohara , Kenichi Ohtsuki , Takao Kato , Hiroshi Kuwahara , Eiichi Amada
发明人： Yoshito Sakurai , Shinobu Gohara , Kenichi Ohtsuki , Takao Kato , Hiroshi Kuwahara , Eiichi Amada
IPC分类号： H04L12/54 , H04L12/64 , H04L12/70 , H04L12/931 , H04L12/933 , H04L12/935 , H04L12/937 , H04L12/947 , H04Q11/04 , H04Q11/06
CPC分类号： H04L49/30 , H04L12/56 , H04L12/5601 , H04L12/6402 , H04L49/101 , H04L49/106 , H04L49/15 , H04L49/1553 , H04L49/1584 , H04L49/255 , H04L49/256 , H04L49/3081 , H04L49/309 , H04L49/35 , H04Q11/0407 , H04Q11/0421 , H04Q11/06 , H04J2203/0012 , H04L2012/5651 , H04L2012/5652 , H04L2012/5681 , H04L2012/6481 , H04L49/205 , H04L49/25 , H04L49/254 , H04L49/3009 , H04L49/3018
摘要： A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetermined period and time slots contained in each frame to carry blocks.

29. 发明授权

US5537414A Method of wireless communication between base station and mobile station and multiple access communication system 失效
标题翻译：基站与移动台和多址通信系统之间的无线通信方法
公开(公告)号：US5537414A
公开(公告)日：1996-07-16
申请号：US87080
申请日：1993-07-07
申请人： Yoshihiro Takiyasu , Eiichi Amada , Hidehiko Jusa , Tomoaki Ishifuji , Shuichi Adachi , Genichi Ishii
发明人： Yoshihiro Takiyasu , Eiichi Amada , Hidehiko Jusa , Tomoaki Ishifuji , Shuichi Adachi , Genichi Ishii
IPC分类号： H04Q7/38 , H04B7/26 , H04J3/16 , H04L12/28 , H04Q1/30 , H04Q3/58
CPC分类号： H04B7/2656 , H04J3/1694
摘要： In a communication system having a base station for controlling a transmission right and a plurality of substations, a substation having data to be transmitted transmits the number of necessary fragments and its address to a request field of a communication frame. The base station uses a plurality pair of fragment slots and reply slots following the request field in the communication frame to transmit an address of a substation permitted to transmit data, to each fragment slot. The substation permitted to transmit data transmits the address of a destination substation and the data to a predetermined field following the address in one fragment slot. The destination station transmits a reply signal indicating the reception state of the data to the reply slot paired with the fragment slot. If the base station detects from the reply signal that the destination station failed in receiving the data, the base station instead of the substation first transmitted the data transmits the destination address and data received at the fragment slot to the next fragment slot.
摘要翻译：在具有用于控制发送权限的基站和多个变电站的通信系统中，具有要发送的数据的变电站将通信帧的请求字段的必要片段数及其地址发送。基站使用通信帧中的请求字段之后的多对片段时隙和应答时隙，将允许发送数据的子站的地址发送到每个片段时隙。允许发送数据的变电站将目的地变电站的地址和数据发送到在一个分段时隙中的地址之后的预定字段。目的站将表示数据的接收状态的应答信号发送到与分段时隙配对的应答时隙。如果基站从应答信号中检测到目的站在接收数据失败，则基站而不是先发送数据的分站将目的地址和在分片时隙接收到的数据发送到下一个分片时隙。

30. 发明授权

US5513177A Distributed switching system having at least one module 失效
标题翻译：具有至少一个模块的分布式交换系统
公开(公告)号：US5513177A
公开(公告)日：1996-04-30
申请号：US654590
申请日：1991-02-13
申请人： Yoshito Sakurai , Shinobu Gohara , Kenichi Ohtsuki , Takao Kato , Hiroshi Kuwahara , Eiichi Amada
发明人： Yoshito Sakurai , Shinobu Gohara , Kenichi Ohtsuki , Takao Kato , Hiroshi Kuwahara , Eiichi Amada
IPC分类号： H04L12/54 , H04L12/64 , H04L12/70 , H04L12/931 , H04L12/933 , H04L12/935 , H04L12/937 , H04L12/947 , H04Q11/04 , H04Q11/06
CPC分类号： H04L49/30 , H04L12/56 , H04L12/5601 , H04L12/6402 , H04L49/101 , H04L49/106 , H04L49/15 , H04L49/1553 , H04L49/1584 , H04L49/255 , H04L49/256 , H04L49/3081 , H04L49/309 , H04L49/35 , H04Q11/0407 , H04Q11/0421 , H04Q11/06 , H04J2203/0012 , H04L2012/5651 , H04L2012/5652 , H04L2012/5681 , H04L2012/6481 , H04L49/205 , H04L49/25 , H04L49/254 , H04L49/3009 , H04L49/3018
摘要： A switching system for integratedly switching voice, data, image information and the like. The switching system comprises a plurality of front-end modules each adapted to perform a switching processing in association with a subscriber line or a trunk line, and a single or a plurality of central modules for interconnecting the plurality of front-end modules in star-type fashion and switching information prevailing between the front-end modules, in unit of block accommodating the information and a header added thereto to contain connection control information and in accordance with the contents of the header. The front-end modules are connected to the central module via inter-module highways each having frames occurring at a predetermined period and time slots contained in each frame to carry blocks.
摘要翻译：一种用于集成地切换语音，数据，图像信息等的切换系统。交换系统包括多个前端模块，每个前端模块适于与用户线路或中继线路相关联地执行切换处理;以及单个或多个中央模块，用于以星形模式互连多个前端模块，在前端模块之间存在的类型时尚和切换信息，以容纳信息的块为单位，以及添加到其中的标题，以包含连接控制信息并根据报头的内容。前端模块通过模块间高速公路连接到中央模块，每个模块高速公路都具有以预定周期发生的帧，并且包含在每个帧中的时隙以承载块。

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