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    • 13. 发明申请
    • Semiconductor device and method of fabricating the same
    • 半导体装置及其制造方法
    • US20050121718A1
    • 2005-06-09
    • US11037158
    • 2005-01-19
    • Kazuya NakayamaBungo TanakaNobuyuki Sato
    • Kazuya NakayamaBungo TanakaNobuyuki Sato
    • H01L21/336H01L29/06H01L29/10H01L29/12H01L29/417H01L29/78H01L29/76
    • H01L29/7816H01L29/0696H01L29/1045H01L29/4175H01L29/7835H01L2924/0002H01L2924/00
    • A semiconductor device comprises a semiconductor substrate, a semiconductor layer formed above the semiconductor substrate, a plurality of unit cells each having a structure with a gate electrode disposed and formed above the semiconductor layer to have a stripe-like shape and with a source layer and a drain layer formed in the semiconductor layer to have stripe-like shapes respectively, a gate wiring line for mutually connecting together respective gate electrodes of the unit cells, a first main electrode being formed on a dielectric film covering the gate electrodes and the gate wiring line and being in contact with any one of the source layer and the drain layer of each unit cell, an impurity diffusion layer formed in the semiconductor layer to a depth reaching the semiconductor substrate only at part immediately underlying the gate wiring line, the part being selected from part immediately underlying a remaining one of the source layer and the drain layer of each unit cell and part immediately underlying the gate wiring line, the impurity diffusion layer being for permitting extension of the remaining one of the source and drain layers of each unit cell up to the semiconductor substrate, and a second main electrode as formed at a back surface of the semiconductor substrate.
    • 半导体器件包括半导体衬底,形成在半导体衬底上的半导体层,多个单元电池,每个单元电池具有设置并形成在半导体层上方的具有栅极电极的结构以具有条状形状并具有源极层和 形成在所述半导体层中的具有条状形状的漏极层,用于将所述单元电池的各个栅电极相互连接在一起的栅极布线;形成在覆盖所述栅电极的电介质膜上的第一主电极和所述栅极布线 并与每个单元电池的源极层和漏极层中的任何一个接触;在半导体层中仅形成在栅极布线的正下方的部分的深度到达半导体基板的深度的杂质扩散层,该部分是 从每个单位单元和部分的源层和漏层中的剩余部分的下方的部分中选择 在栅极布线的下方,杂质扩散层用于允许每个单元电池的剩余的一个源极和漏极层延伸到半导体衬底;以及第二主电极,形成在半导体衬底的背面 。
    • 17. 发明授权
    • Lateral insulated gate bipolar transistor
    • 横向绝缘栅双极晶体管
    • US5869850A
    • 1999-02-09
    • US990077
    • 1997-12-12
    • Koichi EndoNobuyuki Sato
    • Koichi EndoNobuyuki Sato
    • H01L21/331H01L29/06H01L29/739H01L29/74
    • H01L29/66325H01L29/0696H01L29/7393H01L29/7394
    • A lateral insulated gate bipolar transistor has an emitter region that is displaced from a main path for passing carriers from a collector region to a base region through a first semiconductor layer. This arrangement suppresses the operation of a parasitic transistor composed of the emitter region, base region, and first semiconductor layer and prevents a latch-up. The width of the gate electrode of covering the first semiconductor layer serving as a drift region of carriers may be widened to form a carrier accumulation layer in the first semiconductor layer adjacent to the gate electrode. The accumulation layer increases the total number of carriers in the drift region, to reduce a saturation voltage between the collector region and the emitter region. As a result, the lateral insulated gate bipolar transistor operates with a low voltage to reduce power consumption.
    • 横向绝缘栅双极晶体管具有从主路径偏移的发射极区域,用于使载流子从集电极区域通过第一半导体层通过基极区域。 这种布置抑制由发射极区域,基极区域和第一半导体层构成的寄生晶体管的操作,并且防止闩锁。 覆盖用作载流子漂移区域的第一半导体层的栅电极的宽度可以加宽,以在与栅电极相邻的第一半导体层中形成载流子堆积层。 累积层增加了漂移区域中的载流子总数,以减小集电极区域和发射极区域之间的饱和电压。 结果,横向绝缘栅双极晶体管以低电压工作以降低功耗。