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11. 发明授权

US07551166B2 Display device, method for driving the same, and electronic device using the same 有权
标题翻译：显示装置及其驱动方法以及使用其的电子装置
公开(公告)号：US07551166B2
公开(公告)日：2009-06-23
申请号：US10844522
申请日：2004-05-13
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： G06F3/038
CPC分类号： G09G5/399 , G09G3/3208
摘要： An object of the present invention is to provide a display device in which a frame frequency does not decrease even in the case of employing a method for driving having little difference between reading time of a memory and writing time of a memory. According to the present invention, a reading device and a writing device are synchronized by determining allotment of two memories every cycle of a writing signal and by determining a start of reading through a start signal for writing and horizontal synchronizing signals.
摘要翻译：本发明的目的是提供一种即使在使用存储器的读取时间和存储器的写入时间之间几乎没有差别的驱动方法的情况下，帧频也不降低的显示装置。根据本发明，读取装置和写入装置通过每个写入信号的每个周期确定两个存储器的分配并通过确定用于写入的开始信号和水平同步信号的开始读取来同步。

12. 发明申请

US20080054976A1 Clock Generation Circuit and Semiconductor Device Including the Same 有权
标题翻译：时钟发生电路和包括其的半导体器件
公开(公告)号：US20080054976A1
公开(公告)日：2008-03-06
申请号：US11845391
申请日：2007-08-27
申请人： Masami Endo , Takayuki Ikeda , Daisuke Kawae , Yoshiyuki Kurokawa
发明人： Masami Endo , Takayuki Ikeda , Daisuke Kawae , Yoshiyuki Kurokawa
IPC分类号： H03K3/283
CPC分类号： H04L7/0331 , H03L7/00
摘要： Objects of the invention are to provide a clock generation circuit, in which, even when different clock signals are used among a plurality of circuits such as a transmitting circuit and a receiving circuit, stabilized communication is possible; and to provide a semiconductor device including the clock generation circuit. The clock generation circuit includes an edge detection circuit, a reference clock generation circuit, a reference clock counter circuit, and a frequency-divider circuit. The reference clock counter circuit is a circuit which outputs a counter value, which is obtained by counting the number of waves of a reference clock signal outputted from the reference clock generation circuit, in a period of time from when the edge detection circuit detects an edge of a signal which is externally inputted to the edge detection circuit to when the edge detection circuit detects the next edge, to the frequency-divider circuit. The frequency-divider circuit is a circuit which frequency-divides the reference clock signal based on the counter value.
摘要翻译：本发明的目的是提供一种时钟发生电路，其中即使在诸如发送电路和接收电路的多个电路中使用不同的时钟信号，也可以进行稳定的通信; 并提供包括时钟发生电路的半导体器件。时钟产生电路包括边缘检测电路，参考时钟产生电路，参考时钟计数器电路和分频器电路。参考时钟计数器电路是在从边缘检测电路检测到边缘的时间段内输出计数值的电路，该计数值是从基准时钟产生电路输出的基准时钟信号的波数来计算的将外部输入到边缘检测电路的信号当边缘检测电路检测到下一个边沿时，分配给分频器电路。分频器电路是基于计数器值对参考时钟信号进行分频的电路。

13. 发明申请

US20080012616A1 Clock synchronization circuit and semiconductor device provided therewith 有权
标题翻译：时钟同步电路和提供的半导体器件
公开(公告)号：US20080012616A1
公开(公告)日：2008-01-17
申请号：US11820245
申请日：2007-06-19
申请人： Masami Endo , Daisuke Kawae , Yoshiyuki Kurokawa , Takayuki Ikeda
发明人： Masami Endo , Daisuke Kawae , Yoshiyuki Kurokawa , Takayuki Ikeda
IPC分类号： H03L7/00 , H04Q5/22
CPC分类号： H04L7/0331
摘要： An object is to provide a clock synchronization circuit capable of stable communication even in the case where different clock signals are used in a plurality of circuits, and a semiconductor device provided therewith. Circuit for detecting a change point of received data, and outputting a reset signal; reference clock generating means for generating a clock signal; and circuit for counting the clock signals outputted from the reference clock generation means, and resetting a counter value obtained by counting the clock signals in the case where the reset signal is inputted are provided.
摘要翻译：目的在于提供即使在多个电路中使用不同的时钟信号的情况下也能够稳定通信的时钟同步电路以及与其配合的半导体装置。用于检测接收数据的变化点并输出复位信号的电路; 用于产生时钟信号的参考时钟产生装置; 以及用于对从基准时钟产生装置输出的时钟信号进行计数的电路，以及在输入复位信号的情况下复位通过对时钟信号进行计数而获得的计数器值。

14. 发明授权

US4783003A Ultrasonic injecting method and injection nozzle 失效
标题翻译：超声波注射法和注射喷嘴
公开(公告)号：US4783003A
公开(公告)日：1988-11-08
申请号：US21085
申请日：1987-03-03
申请人： Hideo Hirabayashi , Masami Endo , Kakuro Kokubo
发明人： Hideo Hirabayashi , Masami Endo , Kakuro Kokubo
IPC分类号： B05B17/06 , F02B1/04 , F02M27/08 , F02M51/06 , F02M69/04 , F23D11/34 , B05B1/08
CPC分类号： B05B17/0623 , F02M27/08 , F02M69/041 , F23D11/345 , F02B1/04
摘要： An ultrasonic injection nozzle includes an ultrasonic vibration generating device and a vibrating element. The vibrating element; connected to the vibration generating device so as to be vibrated thereby. The vibrating element has formed at its forward end an edged portion to and along which a liquid material is delivered to be atomized.

15. 发明授权

US09024317B2 Semiconductor circuit, method for driving the same, storage device, register circuit, display device, and electronic device 有权
标题翻译：半导体电路，其驱动方法，存储装置，寄存器电路，显示装置和电子装置
公开(公告)号：US09024317B2
公开(公告)日：2015-05-05
申请号：US13310824
申请日：2011-12-05
申请人： Masami Endo , Kazuaki Ohshima
发明人： Masami Endo , Kazuaki Ohshima
IPC分类号： H01L29/786 , G09G3/36 , H01L27/12
CPC分类号： H01L27/1225 , G09G3/3648 , G09G2300/043 , G09G2300/0819 , G09G2320/0214 , H01L27/1255 , H01L28/40 , H01L29/7869
摘要： A semiconductor circuit capable of controlling and holding the threshold voltage of a transistor at an optimal level and a driving method thereof are disclosed. A storage device, a display device, or an electronic device including the semiconductor circuit is also provided. The semiconductor circuit comprises a diode and a first capacitor provided in a node to which a transistor to be controlled is connected through its back gate. This structure allows the application of desired voltage to the back gate so that the threshold voltage of the transistor is controlled at an optimal level and can be held for a long time. A second capacitor connected in parallel with the diode is optionally provided so that the voltage of the node can be changed temporarily.
摘要翻译：公开了能够控制并保持晶体管的阈值电压达到最佳水平的半导体电路及其驱动方法。还提供了存储装置，显示装置或包括半导体电路的电子装置。该半导体电路包括一个二极管和一个设置在一个节点上的第一电容器，待控制的晶体管通过其后门连接到该节点上。这种结构允许将期望的电压施加到背栅极，使得晶体管的阈值电压被控制在最佳水平并且可以保持很长时间。可选地提供与二极管并联连接的第二电容器，使得可以暂时改变节点的电压。

16. 发明授权

US08570065B2 Programmable LSI 有权
标题翻译：可编程LSI
公开(公告)号：US08570065B2
公开(公告)日：2013-10-29
申请号：US13437961
申请日：2012-04-03
申请人： Hidetomo Kobayashi , Masami Endo , Yutaka Shionoiri , Hiroki Dembo , Tatsuji Nishijima , Kazuaki Ohshima , Seiichi Yoneda , Jun Koyama
发明人： Hidetomo Kobayashi , Masami Endo , Yutaka Shionoiri , Hiroki Dembo , Tatsuji Nishijima , Kazuaki Ohshima , Seiichi Yoneda , Jun Koyama
IPC分类号： H03K19/177 , G11C11/24
CPC分类号： H03K19/17796 , G11C16/0433 , H01L27/11803 , H01L27/1203
摘要： A low-power programmable LSI that can perform dynamic configuration is provided. The programmable LSI includes a plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements, in accordance with the configuration data stored in the configuration memory. The configuration memory includes a set of a volatile storage circuit and a nonvolatile storage circuit. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer and a capacitor whose one of a pair of electrodes is electrically connected to a node that is set in a floating state when the transistor is turned off.
摘要翻译：提供了可以执行动态配置的低功耗可编程LSI。可编程LSI包括多个逻辑元件。多个逻辑元件各自包括配置存储器。多个逻辑元件中的每一个执行不同的运算处理，并且根据存储在配置存储器中的配置数据改变逻辑元件之间的电连接。配置存储器包括一组易失性存储电路和非易失性存储电路。非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管和一对电极中的一个电极与晶体管截止时被设置为浮置状态的节点电连接的电容器。

17. 发明授权

US08103897B2 Clock generation circuit and semiconductor device including the same 有权
标题翻译：时钟生成电路和包括其的半导体器件
公开(公告)号：US08103897B2
公开(公告)日：2012-01-24
申请号：US11845391
申请日：2007-08-27
申请人： Masami Endo , Takayuki Ikeda , Daisuke Kawae , Yoshiyuki Kurokawa
发明人： Masami Endo , Takayuki Ikeda , Daisuke Kawae , Yoshiyuki Kurokawa
IPC分类号： G06F1/04
CPC分类号： H04L7/0331 , H03L7/00
摘要： Objects of the invention are to provide a clock generation circuit, in which, even when different clock signals are used among a plurality of circuits such as a transmitting circuit and a receiving circuit, stabilized communication is possible; and to provide a semiconductor device including the clock generation circuit. The clock generation circuit includes an edge detection circuit, a reference clock generation circuit, a reference clock counter circuit, and a frequency-divider circuit. The reference clock counter circuit is a circuit which outputs a counter value, which is obtained by counting the number of waves of a reference clock signal outputted from the reference clock generation circuit, in a period of time from when the edge detection circuit detects an edge of a signal which is externally inputted to the edge detection circuit to when the edge detection circuit detects the next edge, to the frequency-divider circuit. The frequency-divider circuit is a circuit which frequency-divides the reference clock signal based on the counter value.
摘要翻译：本发明的目的是提供一种时钟发生电路，其中即使在诸如发送电路和接收电路的多个电路中使用不同的时钟信号，也可以进行稳定的通信; 并提供包括时钟发生电路的半导体器件。时钟产生电路包括边缘检测电路，参考时钟产生电路，参考时钟计数器电路和分频器电路。参考时钟计数器电路是在从边缘检测电路检测到边缘的时间段内输出计数值的电路，该计数值是从基准时钟产生电路输出的基准时钟信号的波数来计算的将外部输入到边缘检测电路的信号当边缘检测电路检测到下一个边沿时，分配给分频器电路。分频器电路是基于计数器值对参考时钟信号进行分频的电路。

18. 发明授权

US08087647B2 Fluid filled type cylindrical vibration damping device 失效
标题翻译：流体填充型圆柱形减震装置
公开(公告)号：US08087647B2
公开(公告)日：2012-01-03
申请号：US12292246
申请日：2008-11-14
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： F16F5/00 , F16F13/00
CPC分类号： F16F13/1409
摘要： A fluid filled type cylindrical vibration damping device, wherein a circumferential end of a stopper member is formed as a mating element smaller in diameter than a circumferentially center section of the stopper member, and is juxtaposed against and supported on a bottom face of a mating groove in a communication passage, to form the communication passage along an entire area between diametrically opposed faces of the mating element and an outer tubular member. A cutout portion is formed extending in a circumferential direction from a circumferential end in a widthwise medial section of the mating element, with the communication passage opening into and communicating with a first fluid chamber at a distal end section of the cutout portion, and at two widthwise side sections of the mating element, respectively, thereby defining an orifice passage connecting the first fluid chamber with a second fluid chamber.
摘要翻译：一种流体填充型圆柱形减震装置，其中止动件的周向端部形成为直径小于止动件的周向中心部分的配合元件，并且与配合槽的底面并置并支撑在其上在连通通道中，沿着配合元件的直径相对的面和外部管状构件之间的整个区域形成连通通道。从配合元件的宽度方向中间部的周向端部沿圆周方向形成有切口部，连通路与开口部的前端部的第一流体室开口连通，两端从而限定了将第一流体室与第二流体室连接的孔口通道。

19. 发明授权

US07986216B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07986216B2
公开(公告)日：2011-07-26
申请号：US11812618
申请日：2007-06-20
申请人： Yoshiyuki Kurokawa , Takayuki Ikeda , Masami Endo , Hiroki Dembo , Daisuke Kawae , Takayuki Inoue
发明人： Yoshiyuki Kurokawa , Takayuki Ikeda , Masami Endo , Hiroki Dembo , Daisuke Kawae , Takayuki Inoue
IPC分类号： H04Q5/22
CPC分类号： G06K19/07749
摘要： In a case where an ASK method is used for a communication method between a semiconductor device and a reader/writer, the amplitude of a radio signal is changed by data transmitted from the semiconductor device to the reader/writer when data is not transmitted from the reader/writer to the semiconductor device. Therefore, in some cases, the semiconductor device mistakes data transmitted from the semiconductor device itself for data transmitted from the reader/writer to the semiconductor device. The semiconductor device includes an antenna circuit, a transmission circuit, a reception circuit, and an arithmetic processing circuit. The antenna circuit transmits and receives a radio signal. The transmission circuit outputs to the reception circuit a signal showing whether or not the antenna circuit is transmitting the radio signal.
摘要翻译：在使用ASK方式进行半导体装置与读取器/写入器之间的通信方式的情况下，通过从半导体装置发送到读取器/写入器的数据，无线信号的振幅由数据不从读取器/写入器到半导体器件。因此，在某些情况下，半导体器件将从半导体器件本身发送的数据错误地从读取器/写入器发送到半导体器件的数据。半导体器件包括天线电路，发送电路，接收电路和运算处理电路。天线电路发送和接收无线电信号。发送电路向接收电路输出表示天线电路是否正在发送无线信号的信号。

20. 发明授权

US07847793B2 Control circuit of display device, and display device and electronic appliance incorporating the same 有权
标题翻译：显示装置的控制电路以及包含其的显示装置和电子装置
公开(公告)号：US07847793B2
公开(公告)日：2010-12-07
申请号：US11561975
申请日：2006-11-21
申请人： Masami Endo
发明人： Masami Endo
IPC分类号： G06F3/038
CPC分类号： G09G3/3275 , G09G5/399 , G09G2360/18
摘要： An object is to realize downsizing and cost reduction of a display device by efficiently using a physical region of a memory in a control circuit of the display device. A structure of a video data storage portion of the control circuit is that provided with a video data storage portion for storing video data of an n-th frame (n is a natural number), a video data storage portion for storing video data of an (n+1)th frame, and a video data storage portion for sharing video data of the n-th frame and the (n+1)th frame among received video data.
摘要翻译：目的是通过有效地使用显示装置的控制电路中的存储器的物理区域来实现显示装置的小型化和降低成本。控制电路的视频数据存储部分的结构是设置有用于存储第n帧（n是自然数）的视频数据的视频数据存储部分，用于存储第n帧的视频数据的视频数据存储部分（n + 1）帧，以及用于共享所接收的视频数据中的第n帧和第（n + 1）帧的视频数据的视频数据存储部分。

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