会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 11. 发明申请
    • Method of manufacturing a semiconductor device and a semiconductor device obtained by means of said method
    • 通过所述方法获得的制造半导体器件和半导体器件的方法
    • US20060046439A1
    • 2006-03-02
    • US10527777
    • 2003-08-21
    • Ronald DekkerJan Baptist Van Der PuttenRamon Havens
    • Ronald DekkerJan Baptist Van Der PuttenRamon Havens
    • H01L21/20H01L21/30H01L21/332H01L21/8234H01L21/50
    • H01L29/66712H01L21/78H01L29/6631H01L29/781
    • The invention relates to a method of manufacturing a semiconductor device (10) in which, in a semiconductor body (1) with a temporary substrate (2), at least one semiconductor element (3) is formed which, on a side of the semiconductor body (1) opposite to the substrate (2), is provided with at least one connection region (4), and, on the said side, a dielectric (5) is formed and patterned to leave free the connection region (4), after which a metal layer (6) is deposited over the dielectric (5) so as to be in contact with the connection region (4), which metal layer (6) serves as an electric connection conductor of the connection region (4), after which the temporary substrate (2) is removed and the metal layer (6) also serves as a substrate of the device (10). According to the invention, before the metal layer (6) is deposited, there is formed, around the patterned part of the dielectric (5) and around the semiconductor element (3), an annular region (7) of a resin having a larger thickness than the dielectric (5), and the metal layer (6) is deposited within the rectangular annular region (7). In this way, an individual device (10) can readily be formed after the metal layer (6) has been deposited, preferably by pushing the device (10) out of the region (7). Preferably, a (different) photoresist is chosen for the dielectric (5) and the region (7). The invention also comprises a semiconductor device (10) obtained in this way.
    • 本发明涉及一种制造半导体器件(10)的方法,其中在具有临时衬底(2)的半导体本体(1)中,形成至少一个半导体元件(3),其在半导体 本体(1)与基板(2)相对设置有至少一个连接区域(4),并且在所述侧面上形成有电介质(5)并图案化以使连接区域(4)免费, 之后将金属层(6)沉积在电介质(5)上以与连接区域(4)接触,该金属层(6)用作连接区域(4)的电连接导体, 之后移除临时衬底(2),金属层(6)也用作器件(10)的衬底。 根据本发明,在金属层(6)沉积之前,在电介质(5)的图案化部分周围形成围绕半导体元件(3)的环形区域(7),具有较大的 厚度比电介质(5)厚,并且金属层(6)沉积在矩形环形区域(7)内。 以这种方式,优选地,通过将​​装置(10)推出区域(7)之后,可以容易地在沉积金属层(6)之后形成单个装置(10)。 优选地,为电介质(5)和区域(7)选择(不同的)光致抗蚀剂。 本发明还包括以这种方式获得的半导体器件(10)。
    • 12. 发明授权
    • Semiconductor device with special emitter connection
    • 具有特殊发射极连接的半导体器件
    • US6046493A
    • 2000-04-04
    • US887980
    • 1997-07-03
    • Ronald DekkerRonald Koster
    • Ronald DekkerRonald Koster
    • H01L29/73H01L21/331H01L29/08H01L29/417H01L29/732H01L27/082H01L27/102H01L29/70
    • H01L29/7322H01L29/41708
    • A semiconductor device provided with a semiconductor substrate with a bipolar transistor having a collector region of a first conductivity type, a base region adjoining the collector region and of a second conductivity type opposed to the first, and an elongate emitter region of the first conductivity type adjoining the base region; the collector region, the base region, and the emitter region being provided with conductor tracks which are connected to conductive connection surfaces. The conductor track on the elongate emitter region of the semiconductor device has a connection to a connection surface for a further electrical connection at each of the two ends of the emitter region. The emitter region may be made longer in this manner because the length of the emitter region is effectively halved by the connections at the two ends. Consequently, charge carriers need be transported over no more than at most half the emitter length. The semiconductor device according to the invention is thus capable of supplying high powers because the charge transport is not limited by charge transport through the conductor track on the elongate emitter region.
    • 一种具有半导体衬底的半导体器件,其具有双极晶体管,该双极晶体管具有第一导电类型的集电极区域,与该集电极区域相邻的基极区域和与该第一导电类型相对的第二导电类型,以及第一导电类型的细长发射极区域 邻接基部区域; 集电极区域,基极区域和发射极区域设置有连接到导电连接表面的导体轨道。 在半导体器件的细长发射极区域上的导体轨道具有到连接表面的连接,用于在发射极区域的两端中的每一端处进一步的电连接。 发射极区域可以以这种方式更长,因为发射极区域的长度被两端的连接有效地减半。 因此,电荷载体需要不超过发射极长度的一半以下。 因此,根据本发明的半导体器件能够提供高功率,因为​​电荷传输不受通过细长发射极区域上的导体轨道的电荷传输的限制。
    • 13. 发明授权
    • Method of manufacturing a semiconductor device with a pn junction
provided through epitaxy
    • 通过外延生产具有pn结的半导体器件的方法
    • US5915187A
    • 1999-06-22
    • US768482
    • 1996-12-18
    • Frederikus R. J. HuismanWiebe B. De BoerOscar J. A. BulikRonald Dekker
    • Frederikus R. J. HuismanWiebe B. De BoerOscar J. A. BulikRonald Dekker
    • H01L21/205H01L21/302H01L21/56H01L21/78H01L29/864H01L29/93H01L21/20
    • H01L21/02381H01L21/0245H01L21/02532H01L21/0262H01L21/02664H01L21/78H01L29/93
    • The invention relates to a method of manufacturing a semiconductor device with a pn junction, whereby an epitaxial layer (2) with a first zone (3) of a first conductivity type and with a second zone (4) of a second conductivity type opposed to the first is provided on a silicon substrate (1), a pn junction (5) being formed between the second and first zones (3, 4, respectively). According to the invention, the method is characterized in that the epitaxial layer (2) is provided by means of a CVD process at a temperature below 800.degree. C., the epitaxial layer (2) being provided in that first the first zone (3) and then the second zone (4) are epitaxially provided on the substrate (1), while no heat treatments at temperatures above 800.degree. C. take place after the epitaxial layer (2) has been provided. The measure according to the invention renders it possible to achieve properties of semiconductor devices manufactured in accordance with the invention, for example the capacitance-voltage (CV) relation of varicap diodes, within wide limits according to specifications. In addition, semiconductor devices manufactured by the method according to the invention require no post-diffusion or measurement steps in order to bring the properties of the semiconductor device up to specifications.
    • 本发明涉及制造具有pn结的半导体器件的方法,由此具有第一导电类型的第一区(3)和与第二导电类型相反的第二导电类型的第二区(4)的外延层(2) 第一设置在硅衬底(1)上,pn结(5)分别形成在第二区和第一区之间(3,4)。 根据本发明,该方法的特征在于外延层(2)通过CVD工艺在低于800℃的温度下提供,外延层(2)设置在第一区域(3) ),然后第二区(4)外延地设置在基板(1)上,而在提供了外延层(2)之后,在高于800℃的温度下不进行热处理。 根据本发明的措施使得可以根据本发明制造的半导体器件的性质,例如变容二极管的电容 - 电压(CV)关系在根据规格的宽范围内。 此外,通过根据本发明的方法制造的半导体器件不需要后扩散或测量步骤,以使半导体器件的性能达到规格。
    • 16. 发明授权
    • Semiconductor device with a bipolar transistor formed in a layer of
semiconductor material provided on an insulating substrate
    • 半导体器件具有形成在绝缘衬底上的半导体材料层中的双极晶体管
    • US5629554A
    • 1997-05-13
    • US637012
    • 1996-04-24
    • Henricus G. R. MaasRonald DekkerArmand Pruijmboom
    • Henricus G. R. MaasRonald DekkerArmand Pruijmboom
    • H01L29/73H01L21/331H01L29/735H01L27/082H01L27/102H01L29/70H01L31/11
    • H01L29/66265H01L29/7317
    • A semiconductor device with a bipolar transistor formed in a layer of semiconductor material (2) provided on an insulating substrate (1), in which material a collector zone (4), a base zone (5), and an emitter zone (6) are provided below a strip of insulating material (3) situated on the layer (2), which zones are connected to contact regions (7, 8, 9, 10) lying adjacent the strip (3), three of the contact regions (8, 9, 10) lying next to one another at a same side of the strip (3), of which two (8 and 9) are connected to the base zone (5) while the third (10), which lies between the former two (8 and 9), is connected to the emitter zone (6). The three contact regions (8, 9, 10) situated next to another at the same side of the strip (3) are provided alternately in the layer of semiconductor material (2) and in a further layer of semiconductor material (19) extending up to the strip (3). The three contact regions (8, 9, 10) connected to the base zone (5) and the emitter zone (6) may be provided with mutual interspacings which are smaller than the details which can be realised in a photoresist layer by means of the photolithographic process to be used in the manufacture of the transistor. As a result, the transistor can be manufactured with a very small extrinsic base.
    • 一种具有双极晶体管的半导体器件,其形成在设置在绝缘基板(1)上的半导体材料层(2)中,其中,集电区(4),基极区(5)和发射极区(6) 设置在位于层(2)上的绝缘材料条(3)的下方,这些区域连接到位于条带(3)附近的接触区域(7,8,9,10),三个接触区域(8) ,9,10)彼此相邻放置在条带(3)的同一侧,其中两个(8和9)连接到基部区域(5),而第三个(10)位于前者 两个(8和9)连接到发射区(6)。 位于带(3)的同一侧的另一侧的三个接触区域(8,9,10)交替地设置在半导体材料层(2)中,并在另一层半导体材料(19)中向上延伸 (3)。 连接到基部区域(5)和发射极区域(6)的三个接触区域(8,9,10)可以具有相对的间隔,该相互间隔小于可以通过光刻胶层 光刻工艺用于制造晶体管。 结果,晶体管可以用非常小的外在基极制造。