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11. 发明授权

US06613189B2 Apparatus for controlling the temperature of a gas distribution plate in a process reactor 失效
标题翻译：用于控制处理反应器中的气体分配板的温度的装置
公开(公告)号：US06613189B2
公开(公告)日：2003-09-02
申请号：US10127104
申请日：2002-04-22
申请人： Kevin G. Donohoe , Guy T. Blalock
发明人： Kevin G. Donohoe , Guy T. Blalock
IPC分类号： H05H100
CPC分类号： C23C16/45565 , C23C16/4405 , C23C16/45508 , C23C16/4558 , C23C16/507 , H01J37/321 , H01J37/3244 , H01J37/32522 , H01L21/67109
摘要： A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber.
摘要翻译：公开了一种等离子体处理反应器，其允许在改变用于增强半导体加工和反应器清洁的功能温度范围方面的更大控制。通过将来自单个气体歧管的工艺气体流分解为将气体分配板后面的工艺气体喷射到两个流中来控制温度，其中第一流在气体分配板后面并且第二流直接注入到腔室中。

12. 发明授权

US06565721B1 Use of heavy halogens for enhanced facet etching 失效
标题翻译：使用重质卤素进行增强刻面蚀刻
公开(公告)号：US06565721B1
公开(公告)日：2003-05-20
申请号：US08948179
申请日：1997-10-09
申请人： Guy T. Blalock , Kevin G. Donohoe
发明人： Guy T. Blalock , Kevin G. Donohoe
IPC分类号： C23C1434
CPC分类号： H01L21/31116 , H01L21/32136
摘要： An ion bombardment sputter etch of a layer to be etched is performed in an inert gas plasma including therein a small amount of a heavy halogen gas, such as iodine or bromine. The heavy halogen gas, in the form ions that are ionized by the plasma and halogen molecules, have the effect of bonding with the material of the layer to be etched, decreasing the sputter rate at areas normal to the ion bombardment, relative to the sputter rate at areas at an angle to the ion bombardmen. The redeposition rate of material sputtered from areas at an angle is also increased. A small amount of oxygen may also be included in the plasma to enhance the above effects.
摘要翻译：待蚀刻层的离子轰击溅射蚀刻在包括少量重卤素气体如碘或溴的惰性气体等离子体中进行。通过等离子体和卤素分子离子化形成的重质卤素气体具有与待蚀刻层的材料结合的作用，相对于溅射器降低了垂直于离子轰击的区域处的溅射速率在与离子轰炸者有一定角度的地区。从一个角度溅射的材料的再沉积速率也增加。也可以在等离子体中包含少量的氧以增强上述效果。

13. 发明授权

US06475814B1 Method for improved low pressure inductively coupled high density plasma reactor 失效
标题翻译：改进型低压感应耦合高密度等离子体反应器的方法
公开(公告)号：US06475814B1
公开(公告)日：2002-11-05
申请号：US09634208
申请日：2000-08-09
申请人： Guy T. Blalock , Kevin G. Donohoe
发明人： Guy T. Blalock , Kevin G. Donohoe
IPC分类号： H01L2100
CPC分类号： H01J37/32091 , H01J37/321 , H01J37/32183 , H05H1/46
摘要： A plasma reactor comprises an electromagnetic energy source coupled to a radiator through first and second variable impedance networks. The plasma reactor includes a chamber having a dielectric window that is proximate to the radiator. A shield is positioned between the radiator and the dielectric window. The shield substantially covers a surface of the radiator near the dielectric window. A portion of the radiator that is not covered by the shield is proximate to a conductive wall of the chamber. Plasma reactor operation includes the following steps. A plasma is ignited in a chamber with substantially capacitive electric energy coupled from the radiator. A variable impedance network is tuned so that the capacitive electric energy coupled into the chamber is diminished. The plasma is then powered with substantially magnetic energy.
摘要翻译：等离子体反应器包括通过第一和第二可变阻抗网络耦合到散热器的电磁能量源。等离子体反应器包括具有靠近散热器的电介质窗口的室。屏蔽件位于散热器和电介质窗口之间。屏蔽件基本上覆盖在电介质窗口附近的散热器的表面。辐射体未被屏蔽物覆盖的部分靠近腔室的导电壁。等离子体反应器操作包括以下步骤。等离子体在具有从散热器耦合的基本上电容的电能的室中点燃。调整可变阻抗网络，使得耦合到腔室中的电容性电能减弱。然后等离子体用大体上的磁能驱动。

14. 发明授权

US06299725B1 Method and apparatus for controlling the temperature of a gas distribution plate in a process reactor 失效
公开(公告)号：US06299725B1
公开(公告)日：2001-10-09
申请号：US09680638
申请日：2000-10-06
申请人： Kevin G. Donohoe , Guy T. Blalock
发明人： Kevin G. Donohoe , Guy T. Blalock
IPC分类号： H05H100
CPC分类号： C23C16/45565 , C23C16/4405 , C23C16/45508 , C23C16/4558 , C23C16/507 , H01J37/321 , H01J37/3244 , H01J37/32522 , H01L21/67109
摘要： A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.

15. 发明授权

US06617256B2 Method for controlling the temperature of a gas distribution plate in a process reactor 失效
标题翻译：控制工艺反应器中气体分布板温度的方法
公开(公告)号：US06617256B2
公开(公告)日：2003-09-09
申请号：US10127273
申请日：2002-04-22
申请人： Kevin G. Donohoe , Guy T. Blalock
发明人： Kevin G. Donohoe , Guy T. Blalock
IPC分类号： H01L2100
CPC分类号： C23C16/45565 , C23C16/4405 , C23C16/45508 , C23C16/4558 , C23C16/507 , H01J37/321 , H01J37/3244 , H01J37/32522 , H01L21/67109
摘要： A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.
摘要翻译：公开了一种等离子体处理反应器，其允许在改变用于增强半导体加工和反应器清洁的功能温度范围方面的更大控制。通过将来自单个气体歧管的工艺气体流分解为将气体分配板后面的工艺气体喷射到两个流中来控制温度，其中第一流在气体分配板后面并且第二流直接注入到腔室中。通过减少在气体分配板后面注入的流量分数，可以增加气体分配板的温度。气体分配板的温度升高导致来自气体分配板的沉积材料的较高的O 2等离子体去除速率。此外，更高的等离子体温度有助于在固定温度反应器中不可能在高温下操作的其它过程。

16. 发明授权

US06387816B2 Method and apparatus for controlling the temperature of a gas distribution plate in a process reactor 失效
标题翻译：用于控制处理反应器中的气体分配板的温度的方法和装置
公开(公告)号：US06387816B2
公开(公告)日：2002-05-14
申请号：US09944503
申请日：2001-08-30
申请人： Kevin G. Donohoe , Guy T. Blalock
发明人： Kevin G. Donohoe , Guy T. Blalock
IPC分类号： H01L2100
CPC分类号： C23C16/45565 , C23C16/4405 , C23C16/45508 , C23C16/4558 , C23C16/507 , H01J37/321 , H01J37/3244 , H01J37/32522 , H01L21/67109
摘要： A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.
摘要翻译：公开了一种等离子体处理反应器，其允许在改变用于增强半导体加工和反应器清洁的功能温度范围方面的更大控制。通过将来自单个气体歧管的工艺气体流分解为将气体分配板后面的工艺气体喷射到两个流中来控制温度，其中第一流在气体分配板后面并且第二流直接注入到腔室中。通过减少在气体分配板后面注入的流量分数，可以增加气体分配板的温度。气体分配板的温度升高导致来自气体分配板的沉积材料的较高的O 2等离子体去除速率。此外，更高的等离子体温度有助于在固定温度反应器中不可能在高温下操作的其它过程。

17. 发明授权

US06184146B2 Plasma producing tools, dual-source plasma etchers, dual-source plasma etching methods, and method of forming planar coil dual-source plasma etchers 有权
标题翻译：等离子体处理工具，双源等离子体蚀刻器，双源等离子体蚀刻方法和形成平面线圈双源等离子体蚀刻器的方法
公开(公告)号：US06184146B2
公开(公告)日：2001-02-06
申请号：US09598589
申请日：2000-06-20
申请人： Kevin G. Donohoe , Guy T. Blalock
发明人： Kevin G. Donohoe , Guy T. Blalock
IPC分类号： H01L2100
CPC分类号： H01J37/32477 , H01J37/321
摘要： Plasma processing tools, dual-source plasma etchers, and etching methods are described. In one embodiment, a processing chamber is provided having an interior base and an interior sidewall joined with the base. A generally planar inductive source is mounted proximate the chamber. A dielectric liner is disposed within the chamber over the interior sidewall with the liner being received over less than an entirety of the interior sidewall. In a preferred embodiment, the interior sidewall has a groundable portion and the dielectric liner has a passageway positioned to expose the groundable interior sidewall portion. Subsequently, a plasma developed within the chamber is disposed along a grounding path which extends to the exposed interior sidewall. In another preferred embodiment, the dielectric liner is removably mounted within the processing chamber.
摘要翻译：描述了等离子体处理工具，双源等离子体蚀刻器和蚀刻方法。在一个实施例中，提供处理室，其具有与基部连接的内部基部和内部侧壁。大致平面的感应源安装在腔室附近。电介质衬垫设置在腔室内部的内侧壁上，衬垫被接纳在小于内侧壁的整体上。在优选实施例中，内侧壁具有可磨削部分，并且电介质衬垫具有定位成暴露可磨削内侧壁部分的通道。随后，在室内展开的等离子体沿着延伸到暴露的内侧壁的接地路径设置。在另一个优选实施例中，电介质衬垫可移除地安装在处理室内。

18. 发明授权

US06323133B1 Method and apparatus for controlling the temperature of a gas distribution plate in a process reactor 失效
标题翻译：用于控制处理反应器中的气体分配板的温度的方法和装置
公开(公告)号：US06323133B1
公开(公告)日：2001-11-27
申请号：US09514820
申请日：2000-02-28
申请人： Kevin G. Donohoe , Guy T. Blalock
发明人： Kevin G. Donohoe , Guy T. Blalock
IPC分类号： H01L2100
CPC分类号： C23C16/45565 , C23C16/4405 , C23C16/45508 , C23C16/4558 , C23C16/507 , H01J37/321 , H01J37/3244 , H01J37/32522 , H01L21/67109
摘要： A plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the temperature of the gas distribution plate results in higher O2 plasma removal rates of deposited material from the gas distribution plate. Additionally, the higher plasma temperature aids other processes that only operate at elevated temperatures not possible in a fixed temperature reactor.
摘要翻译：公开了一种等离子体处理反应器，其允许在改变用于增强半导体加工和反应器清洁的功能温度范围方面的更大控制。通过将来自单个气体歧管的工艺气体流分解为将气体分配板后面的工艺气体喷射到两个流中来控制温度，其中第一流在气体分配板后面并且第二流直接注入到腔室中。通过减少在气体分配板后面注入的流量分数，可以增加气体分配板的温度。气体分配板的温度升高导致来自气体分配板的沉积材料的较高的O 2等离子体去除速率。此外，更高的等离子体温度有助于在固定温度反应器中不可能在高温下操作的其它过程。

19. 发明授权

US6114252A Plasma processing tools, dual-source plasma etchers, dual-source plasma etching methods, and methods of forming planar coil dual-source plasma etchers 有权
标题翻译：等离子体处理工具，双源等离子体蚀刻器，双源等离子体蚀刻方法和形成平面线圈双源等离子体蚀刻器的方法
公开(公告)号：US6114252A
公开(公告)日：2000-09-05
申请号：US435237
申请日：1999-11-05
申请人： Kevin G. Donohoe , Guy T. Blalock
发明人： Kevin G. Donohoe , Guy T. Blalock
IPC分类号： B01J19/08 , H01J37/32 , H01L21/00 , H01L21/302 , H01L21/3065
CPC分类号： H01J37/32477 , H01J37/321
摘要： Plasma processing tools, dual-source plasma etchers, and etching methods are described. In one embodiment, a processing chamber is provided having an interior base and an interior sidewall joined with the base. A generally planar inductive source is mounted proximate the chamber. A dielectric liner is disposed within the chamber over the interior sidewall with the liner being received over less than an entirety of the interior sidewall. In a preferred embodiment, the interior sidewall has a groundable portion and the dielectric liner has a passageway positioned to expose the groundable interior sidewall portion. Subsequently, a plasma developed within the chamber is disposed along a grounding path which extends to the exposed interior sidewall. In another preferred embodiment, the dielectric liner is removably mounted within the processing chamber.
摘要翻译：描述了等离子体处理工具，双源等离子体蚀刻器和蚀刻方法。在一个实施例中，提供处理室，其具有与基部连接的内部基部和内部侧壁。大致平面的感应源安装在腔室附近。电介质衬垫设置在腔室内部的内侧壁上，衬垫被接纳在小于内侧壁的整体上。在优选实施例中，内侧壁具有可磨削部分，并且电介质衬垫具有定位成暴露可磨削内侧壁部分的通道。随后，在室内展开的等离子体沿着延伸到暴露的内侧壁的接地路径设置。在另一个优选实施例中，电介质衬垫可移除地安装在处理室内。

20. 发明授权

US6080672A Self-aligned contact formation for semiconductor devices 失效
标题翻译：用于半导体器件的自对准接触形成
公开(公告)号：US6080672A
公开(公告)日：2000-06-27
申请号：US915386
申请日：1997-08-20
申请人： Werner Juengling , Kirk Prall , Trung T. Doan , Guy T. Blalock , David Dickerson , David S. Becker
发明人： Werner Juengling , Kirk Prall , Trung T. Doan , Guy T. Blalock , David Dickerson , David S. Becker
IPC分类号： H01L21/316 , H01L21/60 , H01L21/8242 , H01L21/00
CPC分类号： H01L27/10894 , H01L21/76897 , H01L21/316 , H01L21/31625
摘要： In accordance with the present invention, there is provided a method for fabricating a contact on an integrated circuit, such as a DRAM. The method includes the following steps. A gate stack is formed on the integrated circuit. A spacer is formed on sidewalls of the gate stack. An insulating film is formed on the integrated circuit. The insulating film is planarized. Finally, a gate contact opening is formed through the planarized insulating film. In one embodiment, the gate contact opening is formed by removing the insulator, spacer and insulating film by etching. In this embodiment, the insulator, spacer and insulating film are etched at substantially similar rates. As a result, the integrated circuit is tolerant of mask misalignments, and does not over-etch field oxide or create silicon nitride slivers. In another embodiment, the planarizing step is performed with chemical mechanical planarization to form a substantially flat topography on the surface of the integrated circuit. Thus, the present invention does not require lithography equipment with a relatively large field of depth. In yet a third embodiment, the method may comprise additional steps, including forming additional dielectric on the integrated circuit. Then, gate and bitline contact openings are formed through the additional dielectric. Finally, gate and bitline contacts are formed in self-alignment to the gate stacks. This embodiment may be implemented by forming the gate and bitline contact openings with an etch that removes the additional dielectric, but does not substantially remove the spacer. As a result, the bitline contact cannot be inadvertently connected to a gate stack that functions as a wordline. This connection might disable the integrated circuit.
摘要翻译：根据本发明，提供了一种用于在诸如DRAM的集成电路上制造接触的方法。该方法包括以下步骤。在集成电路上形成栅极堆叠。在栅叠层的侧壁上形成间隔物。在集成电路上形成绝缘膜。绝缘膜平坦化。最后，通过平坦化绝缘膜形成栅极接触开口。在一个实施例中，通过蚀刻去除绝缘体，间隔物和绝缘膜来形成栅极接触开口。在该实施例中，以基本相似的速率蚀刻绝缘体，间隔物和绝缘膜。因此，集成电路容忍掩模未对准，并且不会过度蚀刻场氧化物或产生氮化硅条。在另一个实施例中，平面化步骤通过化学机械平面化进行，以在集成电路的表面上形成基本平坦的形貌。因此，本发明不需要具有相当大的深度场的光刻设备。在第三个实施例中，该方法可以包括额外的步骤，包括在集成电路上形成附加电介质。然后，通过附加电介质形成栅极和位线接触开口。最后，栅极和位线触点形成为与栅极堆叠自对准。该实施例可以通过用蚀刻去除附加电介质但不基本上去除间隔物的栅极和位线接触开口来实现。因此，位线接触不能无意中连接到用作字线的栅极堆叠。此连接可能会禁用集成电路。

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