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11. 发明授权

US4990973A Method of producing an MMIC and the integrated circuit produced thereby 失效
标题翻译：制造MMIC的方法和由此产生的集成电路
公开(公告)号：US4990973A
公开(公告)日：1991-02-05
申请号：US436615
申请日：1989-11-15
申请人： Takahide Ishikawa , Kazuhiko Nakahara
发明人： Takahide Ishikawa , Kazuhiko Nakahara
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8232 , H01L27/06 , H01L27/095 , H03F1/30 , H03F3/195 , H03F3/60
CPC分类号： H01L27/0605 , H03F1/306
摘要： A method of producing MMIC's and the MMIC thus produced having a reproducible quiescent operating point from lot to lot under the same bias conditions. The source to drain saturation current of the amplifier MESFET in the MMIC can vary from lot to lot if the depth of the gate recess varies from lot to lot. As a result, the quiescent operating point of the amplifier under the same bias conditions can vary from lot to lot. A compensated gate bias source, preferably in the form of an extra MESFET on the MMIC, is fabricated at the same time as the amplifier MESFET and thus has a gate recess having a depth which precisely matches that of the amplifier MESFET. The extra MESFET is connected as a compensated gate bias source and has a resistance which is a function of the depth of the gate recess and thus compensates the quiescent operating point of the amplifier MESFET.

12. 发明授权

US08546510B2 Crystalline resin cured product, crystalline resin composite material, and method for producing the same 失效
标题翻译：结晶性树脂固化物，结晶性树脂复合材料及其制造方法
公开(公告)号：US08546510B2
公开(公告)日：2013-10-01
申请号：US12312369
申请日：2007-11-08
申请人： Masashi Kaji , Koichiro Ogami , Kazuhiko Nakahara , Tomomi Fukunaga
发明人： Masashi Kaji , Koichiro Ogami , Kazuhiko Nakahara , Tomomi Fukunaga
IPC分类号： C08G59/00 , C08G65/38 , C08G59/50 , C08L63/00
CPC分类号： C08G59/245 , C08G59/5033 , C08G59/621 , C08G63/42
摘要： Provided are a crystalline resin cured product which shows high thermal conductivity, low thermal expansion, high heat resistance, low moisture absorption, and good gas barrier properties and a crystalline resin composite material produced therefrom. Further provided is a method for producing the crystalline resin cured product and the crystalline resin composite material. The crystalline resin cured product is obtained by the reaction of an aromatic diglycidyl compound or a diglycidyl resin with an aromatic dihydroxy compound or with a dihydroxy resin and it shows a heat of melting of 10 J/g or more in differential thermal analysis while the endothermic peak corresponding to the melting appears in the range of 120 to 320° C. The crystalline resin composite material is obtained by combining the crystalline resin cured product with a filler or a base material. The crystalline resin cured product has a unit represented by -A-O—CH2—CH(OH)—CH2—O—B—, wherein A and B are divalent aromatic groups.
摘要翻译：提供一种显示出高导热性，低热膨胀，高耐热性，低吸湿性和良好阻气性的结晶树脂固化产物和由其制备的结晶树脂复合材料。另外提供了结晶性树脂固化物和结晶性树脂复合材料的制造方法。结晶性树脂固化物通过芳香族二缩水甘油基化合物或二缩水甘油基树脂与芳香族二羟基化合物或二羟基树脂的反应而得到，并且在差热分析中显示出10J / g以上的熔融热，同时吸热对应于熔化的峰出现在120〜320℃的范围内。结晶性树脂复合材料通过将结晶性树脂固化物与填料或基材结合而得到。结晶性树脂固化物具有由-A-O-CH 2 -CH（OH）-CH 2 -O-B-表示的单元，其中A和B是二价芳族基团。

13. 发明授权

US06462622B1 High-frequency amplifier and high-frequency multistage amplifier 失效
标题翻译：高频放大器和高频多级放大器
公开(公告)号：US06462622B1
公开(公告)日：2002-10-08
申请号：US09988326
申请日：2001-11-19
申请人： Kazutomi Mori , Kazuhisa Yamauchi , Koji Yamanaka , Kazuhiko Nakahara , Tadashi Takagi
发明人： Kazutomi Mori , Kazuhisa Yamauchi , Koji Yamanaka , Kazuhiko Nakahara , Tadashi Takagi
IPC分类号： H03F304
CPC分类号： H03F1/3205 , H03F3/1935 , H03F2200/294 , H03F2200/372
摘要： A T-type circuit having series resistors and a parallel resistor is arranged on the outside of an amplifier, a signal is amplified in the amplifier while stabilizing the signal by using the T-type circuit functioning as a stabilizing circuit, and the amplified signal is output. In this case, values of the series resistors and the parallel resistor of the T-type circuit are determined so as to set an output load impedance obtained by seeing the output side of the high-frequency amplifier from the amplifier to a value near to or slightly lower than a value of the conjugate complex impedance of an output impedance of the amplifier. Therefore, the output signal having a high output electric power and a low distortion can be obtained in the high-frequency amplifier while keeping a gain and a noise characteristic of the high-frequency amplifier.
摘要翻译：具有串联电阻器和并联电阻器的T型电路布置在放大器的外部，通过使用用作稳定电路的T型电路稳定信号，放大器中的信号被放大，放大的信号为输出。在这种情况下，确定T型电路的串联电阻器和并联电阻器的值，以便将通过从放大器看到高频放大器的输出侧而获得的输出负载阻抗设置为接近或等于略低于放大器的输出阻抗的共轭复阻抗的值。因此，在保持高频放大器的增益和噪声特性的同时，可以在高频放大器中获得具有高输出功率和低失真的输出信号。

14. 发明授权

US5424696A Switched line phase shifter 失效
标题翻译：开关线移相器
公开(公告)号：US5424696A
公开(公告)日：1995-06-13
申请号：US53203
申请日：1993-04-28
申请人： Kazuhiko Nakahara , Naoto Andoh
发明人： Kazuhiko Nakahara , Naoto Andoh
IPC分类号： H01P1/185 , H01P1/18 , H01P3/08
CPC分类号： H01P1/185
摘要： A switched line phase shifter includes at least three transmission lines having different electrical lengths disposed between an input terminal and an output terminal and connectable in parallel to each other, at least three input side FET switches for connecting and disconnecting the input terminal and the input ends of the transmission lines, and at least three output side FET switches for connecting and disconnecting the output terminal and the output ends of the transmission lines. As many signal transmission paths as transmission lines are produced between the input terminal and the output terminal by controlling the input side and the output side FET switches. When one of the signal transmission paths is selected as a reference and a signal is transmitted through the remaining at least two signal transmission paths, at least two different phase shift quantities are obtained in the phase shifter.
摘要翻译：开关线路移相器包括至少三条具有不同电长度的传输线，其布置在输入端子和输出端子之间并且彼此并联连接，至少三个输入侧FET开关用于连接和断开输入端子和输入端的传输线，以及至少三个输出侧FET开关，用于连接和断开输出端和传输线的输出端。通过控制输入侧和输出侧FET开关，在输入端子和输出端子之间产生传输线路的许多信号传输路径。当选择信号传输路径中的一个作为参考，并且通过剩余的至少两个信号传输路径发送信号时，在移相器中获得至少两个不同的相移量。

15. 发明授权

US5414387A Distributed amplifier and bidirectional amplifier 失效
标题翻译：分布式放大器和双向放大器
公开(公告)号：US5414387A
公开(公告)日：1995-05-09
申请号：US258831
申请日：1994-06-13
申请人： Kazuhiko Nakahara , Yoshinobu Sasaki
发明人： Kazuhiko Nakahara , Yoshinobu Sasaki
IPC分类号： H03F3/60 , H03F3/62
CPC分类号： H03F3/607
摘要： A distributed amplifier includes an input side circuit including a plurality of distributed constant lines connected in series between an input terminal and ground and a plurality of source-grounded FETs for switching operation having drains connected to respective junctions of the distributed constant lines, an output side circuit including a plurality of distributed constant lines connected in series between an output terminal and ground, and a plurality of source-grounded amplifier FETs having gates connected to respective junctions of the distributed constant lines of the input side circuit via capacitors and drains connected to junctions of the distributed constant lines of the output side circuit. In this structure, since the input side circuit also serves as a distributed switch, when a T/R module is fabricated using the distributed amplifier, it is not necessary to add a distributed switch for controlling signal input and output, so that the chip size of the T/R module is reduced compared to the conventional T/R module. In addition, the signal transmission loss is reduced.
摘要翻译：分布式放大器包括：输入侧电路，其包括串联连接在输入端子和地之间的多个分布常数线路;以及多个源极接地FET，用于具有连接到分布常数线路的各个接点的漏极的开关操作;输出侧包括串联连接在输出端子和地之间的多个分布常数线路的多个源极接地放大器FET，以及多个源极接地放大器FET，其栅极经由电容器连接到输入侧电路的分布常数线路的各个结和连接到接点的输出侧电路的分布常数线。在这种结构中，由于输入侧电路也用作分布式开关，当使用分布式放大器制造T / R模块时，不需要添加用于控制信号输入和输出的分布式开关，使得芯片尺寸的T / R模块比传统的T / R模块减少了。此外，信号传输损耗减小。

16. 发明授权

US5392010A 90 degree phase shifter 失效
标题翻译： 90度移相器
公开(公告)号：US5392010A
公开(公告)日：1995-02-21
申请号：US158772
申请日：1993-12-01
申请人： Kazuhiko Nakahara
发明人： Kazuhiko Nakahara
IPC分类号： H01P1/15 , H01P1/185 , H01P5/22 , H03H11/18 , H01P1/18 , H03H7/18
CPC分类号： H01P1/185
摘要： A switched line type 90.degree. phase shifter includes two single pole double throw switches, a reference transmission line having an electrical length of .alpha. connected between output terminals of the first and the second single pole double throw switches, a phase difference producing transmission line having an electrical length of (90.degree.+.alpha.) at a usage frequency, connected between other output terminals of the first and the second single pole double throw switches, and a phase inverting circuit switchablely connected for serial connection to and between two parts of the reference transmission line, which two parts produce the entirety of the reference transmission line, the one terminal of the first single pole double throw switch is an input terminal of the entire terminal and one terminal of the second single pole double throw switch is an output terminal.
摘要翻译：开关线型90°移相器包括两个单极双掷开关，具有连接在第一和第二单极双掷开关的输出端之间的电长度为α的参考传输线，相位差产生传输线具有连接在第一和第二单极双掷开关的其他输出端子之间的使用频率处的（90°+α）的电长度，以及可转换地连接到参考传输器的两个部分之间和之间的相位反相电路线，其中两个部分产生参考传输线的整体，第一单极双掷开关的一个端子是整个端子的输入端子，第二单极双掷开关的一个端子是输出端子。

17. 发明授权

US5357121A Optoelectronic integrated circuit 失效
标题翻译：光电集成电路
公开(公告)号：US5357121A
公开(公告)日：1994-10-18
申请号：US944981
申请日：1992-09-15
申请人： Miyo Miyashita , Takayuki Katoh , Teruyuki Shimura , Kazuhiko Nakahara
发明人： Miyo Miyashita , Takayuki Katoh , Teruyuki Shimura , Kazuhiko Nakahara
IPC分类号： G02B6/13 , H01L27/06 , H01L27/14 , H01L27/144 , H01L31/10 , H01L29/161 , H01L29/205 , H01L29/225 , H01L33/00
CPC分类号： H01L27/1443 , H01L27/0694
摘要： An optoelectronic integrated circuit includes a light responsive element for converting an optical signal into an electrical signal and an electronic circuit for processing the electrical signal. The light responsive element is disposed on a first surface of a substrate and includes p side electrodes and n side electrodes alternatingly arranged parallel to each other. The electronic circuit is disposed on a second surface of the substrate. The light responsive element is electrically connected to the electronic circuit by a via hole penetrating the substrate. In this structure, light incident on the first surface is almost completely absorbed by the substrate and hardly reaches the electronic circuit on the second surface. Therefore, variations in operation of the electronic circuit, such as an increase in drain current, are reduced. In addition, since the degree of freedom in arranging these elements on both surfaces of the substrate is increased, high-density integration is achieved, resulting in a small-sized IC chip.
摘要翻译：光电集成电路包括用于将光信号转换成电信号的光响应元件和用于处理电信号的电子电路。光响应元件设置在基板的第一表面上，并且包括彼此平行地交替布置的p侧电极和n侧电极。电子电路设置在基板的第二表面上。光响应元件通过穿透基板的通孔电连接到电子电路。在该结构中，入射到第一表面的光几乎完全被基板吸收，并且几乎不到达第二表面上的电子电路。因此，减小了电子电路的工作变化，例如漏极电流的增加。此外，由于在衬底的两个表面上布置这些元件的自由度增加，所以实现了高密度的集成，导致了小尺寸的IC芯片。

18. 发明授权

US4921814A Method of producing an MMIC 失效
标题翻译：生产MMIC的方法
公开(公告)号：US4921814A
公开(公告)日：1990-05-01
申请号：US289210
申请日：1988-12-22
申请人： Takahide Ishikawa , Kazuhiko Nakahara
发明人： Takahide Ishikawa , Kazuhiko Nakahara
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8232 , H01L27/06 , H01L27/095 , H03F1/30 , H03F3/195 , H03F3/60
CPC分类号： H01L27/0605 , H03F1/306
摘要： A method of producing MMIC's and the MMIC thus produced having a reproducible quiescent operating point from lot to lot under the same bias conditions. The source to drain saturation current of the amplifier MESFET in the MMIC can vary from lot to lot if the depth of the gate recess varies from lot to lot. As a result, the quiescent operating point of the amplifier under the same bias conditions can vary from lot to lot. A compensated gate bias source, preferably in the form of an extra MESFET on the MMIC, is fabricated at the same time as the amplifier MESFET and thus has a gate recess having a depth which precisely matches that of the amplifier MESFET. The extra MESFET is connected as a compensated gate bias source and has a resistance which is a function of the depth of the gate recess and thus compensates the quiescent operating point of the amplifier MESFET.
摘要翻译：在相同的偏压条件下，生产MMIC和MMIC的方法具有可批次的静态工作点。如果栅极凹槽的深度随批次而变化，则MMIC中放大器MESFET的漏极饱和电流源可能会随批次而异。因此，在相同偏置条件下，放大器的静态工作点可以随批次而变化。与放大器MESFET同时地制造补偿栅极偏置源，优选地在MMIC上以额外的MESFET的形式，因此具有与放大器MESFET的深度精确匹配的深度的栅极凹槽。额外的MESFET作为补偿栅极偏置源连接，具有作为栅极凹槽深度的函数的电阻，从而补偿放大器MESFET的静态工作点。

19. 发明授权

US07127382B2 Apparatus and method for simulating production with electronic-component mounting apparatus 有权
公开(公告)号：US07127382B2
公开(公告)日：2006-10-24
申请号：US10188531
申请日：2002-07-03
申请人： Akihiko Kikuchi , Kazuhiko Nakahara
发明人： Akihiko Kikuchi , Kazuhiko Nakahara
IPC分类号： G06G7/48
CPC分类号： G06Q10/04 , H05K13/085
摘要： An apparatus and method for production simulation simulates to calculate a total number of assembly boards manufactured with time by an electronic-component-mounting apparatus which includes a component feeding section having plural component feeders for feeding various components. The apparatus and the method allow a result of the simulation to be displayed. The production simulation apparatus is linked with a host computer for generating, transmitting, receiving, and storing data. When data for mounting components on a bare board is generated, production data for providing local maximum mounting efficiency is generated through carrying out an optimization process. The simulation for manufacturing the assembly boards is carried out using the production data and a production command data.

20. 发明授权

US06550135B2 Method of part mounting 有权
标题翻译：零件安装方法
公开(公告)号：US06550135B2
公开(公告)日：2003-04-22
申请号：US09793458
申请日：2001-02-26
申请人： Kazuhiko Nakahara , Hideki Sumi , Takahiro Noda
发明人： Kazuhiko Nakahara , Hideki Sumi , Takahiro Noda
IPC分类号： H05K330
CPC分类号： H05K3/0008 , H05K1/0269 , H05K3/0097 , H05K3/30 , H05K13/08 , H05K2201/09918 , Y10T29/4913 , Y10T29/49131 , Y10T29/53009 , Y10T29/53087 , Y10T29/53178
摘要： When plural board blocks formed in one board undergo sequential part-mountings at plural mounting stages, particular recognition points and recognition points in the board blocks target of a downstream mounting stage are recognized at an upstream mounting stage. Relative positional data of each recognition point of the board block with respect to the particular recognition points are thus obtained at the upstream mounting stage. At the mounting stage on downstream side, only the particular recognition points are recognized thereby detecting a whole position of the board. Based on the whole position and the relative positional data, a positional deviation of the board block at the mounting stage can be detected, so that repeated recognition of the same recognition points is avoided thereby shortening a total time of position recognition.
摘要翻译：当形成在一个板上的多个板块在多个安装阶段进行顺序的部分安装时，在上游安装阶段可以识别出在下游安装阶段的板块目标中的特定识别点和识别点。因此，在上游安装阶段获得板块相对于特定识别点的每个识别点的相对位置数据。在下游侧的安装阶段，仅识别特定的识别点，从而检测电路板的整体位置。基于整个位置和相对位置数据，可以检测安装台上的板块的位置偏差，从而避免对相同识别点的反复识别，从而缩短位置识别的总时间。

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