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11. 发明申请

US20100064895A1 Dust Prevention And Removal Device 有权
标题翻译：防尘除尘装置
公开(公告)号：US20100064895A1
公开(公告)日：2010-03-18
申请号：US12544393
申请日：2009-08-20
申请人： Matthew N. Thurin , Jeremy F. Knopow , Patrick C. Sanders , Julie L. Bates , David H. Leifheit , Nitin Sharma , John R. Wietfeldt
发明人： Matthew N. Thurin , Jeremy F. Knopow , Patrick C. Sanders , Julie L. Bates , David H. Leifheit , Nitin Sharma , John R. Wietfeldt
IPC分类号： B01D46/42 , B01D46/00 , A61L9/00
CPC分类号： F24F3/1603 , F24F2001/0096 , F24F2221/12
摘要： A device is provided that is capable of circulating air throughout a personal space as well as collecting and preventing the build up of dust and other particulate matter by drawing in air from the surrounding environment and removing some dust, allergens and other such particulate matter therefrom. The filtered air is then expelled out of the device and back into the surrounding environment. The device includes a housing defining an interior space having a motor and fan assembly disposed therein. The housing includes an inlet with a filter provided therein such that air drawn in through the inlet is filtered. The air is then expelled through a circumferentially disposed outlet. The filter element preferably includes a lock and key system configured to prevent operation of the device in the absence of a properly keyed filter.
摘要翻译：提供一种能够在个人空间中循环空气并且通过从周围环境吸入空气并从其中除去一些灰尘，过敏原和其它这样的颗粒物质来收集和防止灰尘和其它颗粒物质的积聚的装置。然后将经过滤的空气排出设备并返回周围环境。该装置包括限定具有设置在其中的电动机和风扇组件的内部空间的壳体。壳体包括其中设置有过滤器的入口，使得通过入口吸入的空气被过滤。然后将空气通过周向设置的出口排出。过滤元件优选地包括锁和钥匙系统，其被配置为防止在没有适当键合的过滤器的情况下操作该设备。

12. 发明申请

US20090268541A1 DESIGN STRUCTURE FOR ESTIMATING AND/OR PREDICTING POWER CYCLE LENGTH, METHOD OF ESTIMATING AND/OR PREDICTING POWER CYCLE LENGTH AND CIRCUIT THEREOF 有权
标题翻译：用于估计和/或预测功率循环长度的设计结构，估计和/或预测功率循环长度及其电路的方法
公开(公告)号：US20090268541A1
公开(公告)日：2009-10-29
申请号：US12109379
申请日：2008-04-25
申请人： Kenneth J. Goodnow , Clarence R. OGILVIE , Nitin SHARMA , Sebastian T. VENTRONE , Charles S. WOODRUFF
发明人： Kenneth J. Goodnow , Clarence R. OGILVIE , Nitin SHARMA , Sebastian T. VENTRONE , Charles S. WOODRUFF
IPC分类号： G11C5/14
CPC分类号： G11C5/143
摘要： A design structure is embodied in a machine readable medium for designing, manufacturing, or testing a design. The design structure includes a threshold register having a counter, a count register, and a non-volatile storage for storing a state when a value of the count register equals or exceeds a value of the threshold register. Also provided is a method of predicting and/or estimating a power cycle duration in order to save a state in non-volatile memory and a circuit. The method includes setting a threshold value; determining that the threshold value has been equaled or exceeded; and saving the state in the non-volatile memory at a first checkpoint based on the threshold value being equaled or exceeded.
摘要翻译：设计结构体现在用于设计，制造或测试设计的机器可读介质中。该设计结构包括具有计数器，计数寄存器和非易失性存储器的阈值寄存器，用于当计数寄存器的值等于或超过阈值寄存器的值时存储状态。还提供了一种预测和/或估计功率周期持续时间以便将状态保存在非易失性存储器和电路中的方法。该方法包括设置阈值; 确定阈值已经相等或超过; 并且基于所述阈值相等或超过，在第一检查点处将所述状态保存在所述非易失性存储器中。

13. 发明申请

US20090157334A1 MEASUREMENT OF POWER CONSUMPTION WITHIN AN INTEGRATED CIRCUIT 审中-公开
标题翻译：在集成电路中测量功耗
公开(公告)号：US20090157334A1
公开(公告)日：2009-06-18
申请号：US11956836
申请日：2007-12-14
申请人： Kenneth Joseph Goodnow , Clarence Rosser Ogilvie , Nitin Sharma , Sebastian Theodore Ventrone , Charles S. Woodruff
发明人： Kenneth Joseph Goodnow , Clarence Rosser Ogilvie , Nitin Sharma , Sebastian Theodore Ventrone , Charles S. Woodruff
IPC分类号： G06F19/00 , G01R21/00
CPC分类号： H03K19/0008 , G01R31/318575
摘要： An apparatus and method for measuring power consumed during operation of an integrated circuit. The apparatus including: a data processing circuit having an input and an output, the data processing circuit configured to generate an output data signal on based on an input data signal; a power measurement circuit configured to measure an amount of electrical power consumed by the processing circuit in generating the output signal from the input signal, the power measurement circuit connected between the processing circuit and a power supply for the processing circuit; and a memory element configured to store a tag containing a value representing the amount of electrical power consumed by the processing circuit in generating the output data signal from the input data signal and either (a) the input data of the input data signal or (b) a pointer to the input data of the input data signal.
摘要翻译：一种用于测量集成电路操作期间消耗的功率的装置和方法。该装置包括：具有输入和输出的数据处理电路，该数据处理电路被配置为基于输入数据信号产生一个输出数据信号; 功率测量电路，被配置为测量由所述输入信号产生所述输出信号时由所述处理电路消耗的电力量;连接在所述处理电路和所述处理电路的电源之间的功率测量电路; 以及存储元件，被配置为存储包含表示由处理电路消耗的电力量的值的标签，用于从输入数据信号生成输出数据信号，以及（a）输入数据信号的输入数据或（b ）指向输入数据信号的输入数据的指针。

14. 发明申请

US20090045839A1 ASIC LOGIC LIBRARY OF FLEXIBLE LOGIC BLOCKS AND METHOD TO ENABLE ENGINEERING CHANGE 审中-公开
标题翻译：柔性逻辑块的ASIC逻辑库和使用工程变更的方法
公开(公告)号：US20090045839A1
公开(公告)日：2009-02-19
申请号：US11876263
申请日：2007-10-22
申请人： Robert D. HERZL , Robert S. Horton , Kenneth A. Lauricella , David W. Milton , Clarence R. Ogilvie , Paul M. Schanely , Nitin Sharma , Tad J. Wilder , Charles B. Winn
发明人： Robert D. HERZL , Robert S. Horton , Kenneth A. Lauricella , David W. Milton , Clarence R. Ogilvie , Paul M. Schanely , Nitin Sharma , Tad J. Wilder , Charles B. Winn
IPC分类号： H03K19/177 , G06F17/50
CPC分类号： G06F17/505
摘要： A chip design methodology and an integrated circuit chip. The methodology includes providing a plurality of logic gates in a net list, wherein each of the logic gates comprises at least one spare input, synthesizing the net list, and connecting the spare inputs for performing an engineering change late in the design process. The invention is also directed to a design structure on which a circuit resides.
摘要翻译：芯片设计方法和集成电路芯片。该方法包括在网络列表中提供多个逻辑门，其中每个逻辑门包括至少一个备用输入，合成网络列表，以及在设计过程的后期连接用于执行工程变更的备用输入。本发明还涉及电路所在的设计结构。

15. 发明申请

US20090020621A1 AEROSOL DISPENSER ASSEMBLY HAVEING VOC-FREE PROPELLANT AND DISPENSING MECHANISM THEREFOR 有权
标题翻译：航空发动机组件具有无挥发性无油推进剂及其分配机制
公开(公告)号：US20090020621A1
公开(公告)日：2009-01-22
申请号：US11778912
申请日：2007-07-17
申请人： Paul A. Clark , Richard S. Valpey, III , Prabodh Padma Varanasi , Jeffrey J. Christianson , Nitin Sharma , Milind A. Jog
发明人： Paul A. Clark , Richard S. Valpey, III , Prabodh Padma Varanasi , Jeffrey J. Christianson , Nitin Sharma , Milind A. Jog
IPC分类号： B05B7/24 , B65D83/14
CPC分类号： B65D83/205 , B05B1/14 , B05B1/3436 , B05B1/3442 , B05B7/262 , B65D83/28 , B65D83/30 , B65D83/48 , B65D83/752 , B65D83/753 , C09K3/30
摘要： An aerosol dispenser assembly is disclosed that includes a container holding a liquid product and a compressed gas propellant for propelling the liquid product from the container. A design methodology for the actuator body and swirl nozzle insert is disclosed for maintaining a small particle size or Sauter Mean Diameter (D[3, 2]) of less than 48 μm at a suitable spray rate (1.5-2 g/s), while utilizing a compressed gas VOC-free propellant for an air freshener product. As obtaining reduced particle size to compete with LPG propellants may result in a reduced spray rate, it is anticipated that one or more nozzles may be designed into the actuator body to maintain a suitable spray rate.
摘要翻译：公开了一种气溶胶分配器组件，其包括容纳液体产品的容器和用于从容器推进液体产品的压缩气体推进剂。公开了一种致动器主体和涡流喷嘴插入件的设计方法，用于以合适的喷射速率（1.5-2g / s）维持小于48μm的小粒径或Sauter平均直径（D [3,2）），同时使用压缩气体无VOC的推进剂用于空气清新剂产品。由于获得降低的粒度以与LPG推进剂竞争可能导致喷射速率降低，所以预期可以将一个或多个喷嘴设计到致动器主体中以保持合适的喷射速率。

16. 发明授权

US07480888B1 Design structure for facilitating engineering changes in integrated circuits 失效
标题翻译：集成电路工程变更的设计结构
公开(公告)号：US07480888B1
公开(公告)日：2009-01-20
申请号：US12124771
申请日：2008-05-21
申请人： Clarence Rosser Ogilvie , Charles B. Winn , David Wills Milton , Kenneth Anthony Lauricella , Nitin Sharma , Paul Mark Schanely , Robert Dov Herzl , Robert Spencer Horton , Tad Jeffrey Wilder , Douglas P. Nadeau
发明人： Clarence Rosser Ogilvie , Charles B. Winn , David Wills Milton , Kenneth Anthony Lauricella , Nitin Sharma , Paul Mark Schanely , Robert Dov Herzl , Robert Spencer Horton , Tad Jeffrey Wilder , Douglas P. Nadeau
IPC分类号： G06F17/50
CPC分类号： G06F17/5054
摘要： A design structure embodied in a machine-readable medium is disclosed in one embodiment of the invention as including a flexible logic block to facilitate engineering changes at selected locations within an IC. The flexible logic block has a consistent and identifiable structure such that a simple automated process may be used to reconfigure the structure to perform different logical operations. In certain embodiments, the flexible logic block includes a circuit, such as a multiplexer, having multiple inputs and at least one output. A metal interconnect structure is coupled to the inputs and enables connection of each of the inputs to one of several electrical potentials using a focused-ion-beam (FIB) tool. In this way, the circuit may be configured to perform different logical operations after components in the IC exist in hardware.
摘要翻译：在本发明的一个实施例中公开了体现在机器可读介质中的设计结构，包括用于促进在IC内的选定位置进行工程变更的灵活逻辑块。灵活的逻辑块具有一致且可识别的结构，使得可以使用简单的自动化过程来重新配置结构以执行不同的逻辑操作。在某些实施例中，柔性逻辑块包括具有多个输入和至少一个输出的电路，例如多路复用器。金属互连结构耦合到输入端，并且能够使用聚焦离子束（FIB）工具将每个输入端连接到几个电势之一。以这种方式，电路可以被配置为在硬件中存在IC中的部件之后执行不同的逻辑操作。

17. 发明申请

US20070244739A1 Techniques for measuring user engagement 审中-公开
标题翻译：测量用户参与度的技巧
公开(公告)号：US20070244739A1
公开(公告)日：2007-10-18
申请号：US11404493
申请日：2006-04-13
申请人： Francesca Soito , Nitin Sharma
发明人： Francesca Soito , Nitin Sharma
IPC分类号： G06F17/30
CPC分类号： G06Q30/02 , G06Q30/0201
摘要： Methods and apparatus are described for measuring engagement of a plurality of users with a product. User engagement data are generated representative of interaction with the product by the plurality of users. The user engagement data correspond to a plurality of user engagement variables. A user engagement score is generated for each of the plurality of users. Each user engagement score includes contributions corresponding to at least two of the user engagement variables for the corresponding user. Each contribution is weighted in accordance with at least one correlation among the plurality of user engagement variables.
摘要翻译：描述了用于测量多个用户与产品的接合的方法和装置。生成用户参与数据代表由多个用户与产品的交互。用户参与数据对应于多个用户参与变量。为多个用户中的每一个生成用户参与分数。每个用户参与度分数包括对应于相应用户的至少两个用户参与变量的贡献。根据多个用户参与变量中的至少一个相关性对每个贡献进行加权。

18. 发明授权

US07228120B2 Circuit and method for reducing direct current biases 有权
标题翻译：减少直流偏压的电路和方法
公开(公告)号：US07228120B2
公开(公告)日：2007-06-05
申请号：US10990400
申请日：2004-11-18
申请人： Terence L. Johnson , Nitin Sharma , Ryan W. Lobo
发明人： Terence L. Johnson , Nitin Sharma , Ryan W. Lobo
IPC分类号： H04B1/10
CPC分类号： H03D3/008 , H04B1/71637
摘要： A method is provided for reducing a DC bias in a receiver. This method includes isolating a second circuit portion from a first circuit portion (535) and determining a second DC bias correction value for the second circuit portion that will eliminate a second DC bias at the isolated second circuit portion (540). The second circuit portion is then connected to the first circuit portion (550) and a bias-maximizing code word is generated at the first circuitry (505). A first DC bias correction value is then determined that will eliminate a first DC bias at the first circuit portion (555). The bias-maximizing code word is formed such that: a first integrated value of a first half of the bias-maximizing code word has a positive value, and a second integrated value of a second half of the bias-maximizing code word over half of the code word length has a negative value.
摘要翻译：提供了一种减少接收机中的直流偏压的方法。该方法包括从第一电路部分（535）隔离第二电路部分，并且确定将消除隔离的第二电路部分（540）处的第二DC偏置的第二电路部分的第二DC偏置校正值。然后，第二电路部分连接到第一电路部分（550），并且在第一电路（505）处产生偏置最大化码字。然后确定将消除第一电路部分处的第一DC偏压（555）的第一DC偏置校正值。偏置最大化码字形成为：偏置最大化码字的前半部分的第一积分值具有正值，偏差最大化码字的第二半的第二积分值超过偏差最大化码字的一半以上码字长度为负值。

19. 发明申请

US20050228775A1 Method and apparatus for adaptive personalization of navigation 审中-公开
标题翻译：导航自适应个性化的方法和装置
公开(公告)号：US20050228775A1
公开(公告)日：2005-10-13
申请号：US11000431
申请日：2004-11-30
申请人： Lars Nilsen , Donna Boyer , Nilesh Gohel , Nitin Sharma , Pete Orelup , Ken Thomas , Scott Gatz , Jawahar Malhotra , Harry Fung
发明人： Lars Nilsen , Donna Boyer , Nilesh Gohel , Nitin Sharma , Pete Orelup , Ken Thomas , Scott Gatz , Jawahar Malhotra , Harry Fung
IPC分类号： G06F17/30 , G06Q30/00
CPC分类号： G06Q30/02 , G06F16/9535
摘要： A system for dynamically adaptively personalizing at least one navigation control for a web site. Based on collected behaviors for a user, at least one navigation control is dynamically updated to link to a portion of the web site that may be of most interest to the user. Personalized navigation controls for accessing portions of the web site can be dynamically arranged on the web page displayed to the user. Additionally, the personalized navigation may be employed to drives screens of a mobile or living room device.
摘要翻译：一种用于动态自适应地个性化至少一个网站导航控制的系统。基于针对用户的收集的行为，动态地更新至少一个导航控件以链接到可能对用户最感兴趣的网站的一部分。可以在显示给用户的网页上动态地布置用于访问网站部分的个性化导航控件。此外，可以采用个性化导航来驱动移动或客厅设备的屏幕。

20. 发明申请

US20050068910A1 Method of optimizing a network 有权
标题翻译：优化网络的方法
公开(公告)号：US20050068910A1
公开(公告)日：2005-03-31
申请号：US10661653
申请日：2003-09-12
申请人： Douglas Sandy , Nitin Sharma
发明人： Douglas Sandy , Nitin Sharma
IPC分类号： H04J1/16 , H04J3/14 , H04L5/22 , H04L12/28 , H04L12/56
CPC分类号： H04L49/45
摘要： An optimized network (300), includes providing a switch card topology (350) having a plurality of switching elements (305), where the plurality of switching elements are arranged to form a switch configuration (303). N number of payload interfaces (307) are coupled to the switch configuration, where each of the N number of payload interfaces is coupled to interface with one of a plurality of payload slots (308). A set of N payload module configurations (402, 502) is characterized by a sequential addition (320) of a payload module (304) into each of the plurality of payload slots, where the sequential addition of the payload module couples the payload module to the network. N number of payload interfaces are coupled to the switch configuration such that a latency function (616) is minimized for the switch configuration and the set of N payload module configurations.
摘要翻译：优化网络（300）包括提供具有多个开关元件（305）的开关卡拓扑（350），其中多个开关元件布置成形成开关配置（303）。 N个有效负载接口（307）耦合到交换机配置，其中N个有效负载接口中的每一个耦合到与多个有效负载时隙（308）中的一个的接口。一组N个有效载荷模块配置（402,502）的特征在于有效负载模块（304）向多个有效负载隙中的每一个顺序加法（320），其中有效载荷模块的顺序添加将有效负载模块耦合到网络。 N个有效负载接口耦合到交换机配置，使得等待时间功能（616）被最小化用于交换机配置和N个有效载荷模块配置的集合。

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