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11. 发明申请

US20030047811A1 Diffusion barrier layer for semiconductor device and fabrication method thereof 有权
公开(公告)号：US20030047811A1
公开(公告)日：2003-03-13
申请号：US10270351
申请日：2002-10-15
申请人： LG Semicon Co., Ltd.
发明人： Jae-Hee Ha , Hong Koo Baik , Sung-Man Lee
IPC分类号： H01L023/48 , H01L029/40 , H01L021/4763
CPC分类号： H01L21/76864 , H01L21/28568 , H01L21/31604 , H01L21/76843 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： The present invention relates to a diffusion barrier layer for a semiconductor device and fabrication method thereof. The diffusion barrier layer according to the present invention is fabricated by forming a diffusion barrier layer containing a refractory metal material and an insulating material on an insulating layer and in a contact hole, wherein the insulating layer being partially etched to form the contact hole, is formed on a semiconductor substrate; and annealing the diffusion barrier layer. Therefore, an object of the present invention is to provide a diffusion barrier layer for a semiconductor device, which is of an amorphous or microcrystalline state and thermodynamically stable even at a high temperature since an insulating material is bonded to a refractory metal material in the diffusion barrier layer.

12. 发明申请

US20020029329A1 User initiated microcode modification 失效
标题翻译：用户启动微码修改
公开(公告)号：US20020029329A1
公开(公告)日：2002-03-07
申请号：US09927398
申请日：2001-08-13
申请人： LG Semicon Co.,Ltd.
发明人： Dong Soo Cho
IPC分类号： G06F009/00
CPC分类号： G06F9/30145 , G06F9/30181
摘要： An instruction decoding unit in a microcomputer is disclosed having an instruction word capable of being selected by a user to conveniently produce application software while maintaining security. The decoding unit in a microcomputer includes an instruction register for storing instructions fetched from a memory, an instruction decoder for decoding instruction codes of the instructions stored in the instruction register and for designating micro-instructions to be executed, a micro-ROM for outputting a series of the micro-instructions designated by the instruction decoder, and a user instruction selector for selecting or changing the micro-instructions of the micro-ROM in response to user's selection so as to change the operation of an instruction word.
摘要翻译：公开了一种微型计算机中的指令解码单元，其具有能够由用户选择以方便地产生应用软件同时保持安全性的指令字。微型计算机中的解码单元包括用于存储从存储器取出的指令的指令寄存器，用于对存储在指令寄存器中的指令的指令代码进行解码并指定要执行的微指令的指令译码器，用于输出由指令解码器指定的一系列微指令，以及用户指令选择器，用于响应于用户的选择来选择或改变微ROM的微指令，以便改变指令字的操作。

13. 发明申请

US20010028073A1 Solid state image sensor and method for fabricating the same 有权
标题翻译：固态图像传感器及其制造方法
公开(公告)号：US20010028073A1
公开(公告)日：2001-10-11
申请号：US09879061
申请日：2001-06-13
申请人： LG Semicon Co., Ltd.
发明人： Jin Seop Shim , Seo Kyu Lee
IPC分类号： H01L031/062 , H01L031/113
CPC分类号： H01L27/14806 , H01L27/14818
摘要： Provided with a solid state image sensor, which is adapted to simplify the process with enhancement of the morphology of the device and has photo-diodes formed on a semiconductor substrate, and transfer gates disposed around the photo-diodes to transfer signal charges generated from the photo-diodes, the solid state image sensor including: an insulating layer forming on the whole surface of the semiconductor substrate and having a contact hole exposing a defined portion of the transfer gates; a metal line formed to include the inside of the contact hole; and a light-shielding layer formed in the same layer with the metal line without overlapping the upper parts of the photo-diodes.
摘要翻译：提供了一种固态图像传感器，其适于通过增强器件的形态来简化工艺，并且具有形成在半导体衬底上的光电二极管，以及设置在光电二极管周围的传输门，以传输由光电二极管，固态图像传感器包括：绝缘层，形成在半导体衬底的整个表面上，并具有暴露传输门限定部分的接触孔; 形成为包括接触孔的内部的金属线; 以及与金属线形成在同一层中而不与光电二极管的上部重叠的遮光层。

14. 发明申请

US20030084921A1 Semiconductor wafer cleaning apparatus and method 失效
公开(公告)号：US20030084921A1
公开(公告)日：2003-05-08
申请号：US10326486
申请日：2002-12-23
申请人： LG Semicon Co., Ltd.
发明人： Yun Jun Huh , Suk Bin Han , Jae Jeong Kim
IPC分类号： C25F001/00
CPC分类号： H01L21/67057 , B08B3/048 , B08B3/102 , B08B3/12 , H01L21/67051 , Y10S134/902
摘要： A semiconductor wafer cleaning apparatus comprises an outer tank, a cleaning tank provided within the outer tank, a wafer carrier provided within the cleaning tank, a plurality of jet nozzles directed toward the wafer carrier, a main pipe connected to the jet nozzles, a circulating pump connected to the main pipe and the outer tank for circulating a cleansing solution from the outer tank, through the main pipe, the jet nozzles, and the cleaning tank, and a filter for filtering the circulated cleansing solution.

15. 发明申请

US20020030281A1 Structure of wires for a semiconductor device 审中-公开
标题翻译：半导体器件的电线结构
公开(公告)号：US20020030281A1
公开(公告)日：2002-03-14
申请号：US09946366
申请日：2001-09-06
申请人： LG Semicon Co., Ltd.
发明人： Hyuck-Chai Jung
IPC分类号： H01L023/48
CPC分类号： H01L21/76843 , H01L21/76802 , H01L21/76877
摘要： Disclosed are a method for forming a structure of wires for a semiconductor device in which pads are formed for contact in cell regions as well as core regions and periphery regions where cell aspect ratios are very high, and a structure of wires so formed. The semiconductor device includes a semiconductor substrate arranged into cell regions and periphery and/or core regions, the periphery and/or core regions having a well formed in the semiconductor substrate, the semiconductor substrate being arranged into active regions and field regions, the semiconductor device also having field insulating layers in the field regions, plural gate structures on portions of the semiconductor substrate in the active regions, and impurity regions in the semiconductor substrate between the gate structures. The method includes the steps of: forming an interlayer insulating structure on the semiconductor device; forming contact holes through the interlayer insulating structure to expose the impurity regions; lining contact-hole-portions of the interlayer insulating layer with portions of a barrier layer, respectively, such that the portions of the barrier layer contact the impurity regions; forming conductive pads on the portions of the barrier layer such that remainders of the contact holes are filled; and forming a wire layer on each one of the conductive pads.
摘要翻译：公开了一种用于形成用于半导体器件的布线结构的方法，其中形成用于在单元区域中接触的焊盘以及单元宽高比非常高的芯区域和外围区域以及如此形成的导线的结构。半导体器件包括布置在单元区域和外围和/或芯区域中的半导体衬底，其中外围和/或芯区域在半导体衬底中形成良好，半导体衬底被布置成有源区域和场区域，半导体器件在场区域中也具有场绝缘层，在有源区域中的半导体衬底的部分上的多个栅极结构以及栅极结构之间的半导体衬底中的杂质区域。该方法包括以下步骤：在半导体器件上形成层间绝缘结构; 通过所述层间绝缘结构形成接触孔以暴露所述杂质区域; 分别将层间绝缘层的接触孔部分与阻挡层的部分层叠，使得阻挡层的部分与杂质区接触; 在所述阻挡层的所述部分上形成导电焊盘，使得所述接触孔的剩余部分被填充; 以及在每个导电焊盘上形成导线层。

16. 发明申请

US20010017423A1 Semiconductor device having sidewall spacers manifesting a self-aligned contact hole 审中-公开
标题翻译：具有表示自对准接触孔的侧壁间隔物的半导体器件
公开(公告)号：US20010017423A1
公开(公告)日：2001-08-30
申请号：US09813834
申请日：2001-03-22
申请人： LG Semicon Co. Ltd.
发明人： Jae Sung Roh , Woun S. Yang
IPC分类号： H01L023/48 , H01L023/52 , H01L029/40
CPC分类号： H01L21/76897 , H01L21/76805 , H01L21/76831 , H01L21/823425
摘要： A semiconductor device and a method for manufacturing the same that forms a self-aligned contact hole between two gate lines. A substrate is provided that has a first gate line formed thereon. An insulator is formed on the first gate line and substrate. Then a portion of the insulator and a portion of the first gate line is selectively removed to split the first gate line into a second gate line and a third gate line and to concurrently expose the substrate. Thus, producing a self-aligned contact hole between the second and third gate lines.
摘要翻译：一种在两条栅极线之间形成自对准接触孔的半导体器件及其制造方法。提供具有形成在其上的第一栅极线的衬底。在第一栅极线和衬底上形成绝缘体。然后选择性地去除绝缘体的一部分和第一栅极线的一部分，以将第一栅极线分成第二栅极线和第三栅极线并同时暴露衬底。因此，在第二和第三栅极线之间产生自对准接触孔。

17. 发明申请

US20020148112A1 Encapsulation method for ball grid array semiconductor package 审中-公开
公开(公告)号：US20020148112A1
公开(公告)日：2002-10-17
申请号：US10171976
申请日：2002-06-17
申请人： LG Semicon Co., Ltd.
发明人： Seong-Jae Heo , Chi-Jung Song
IPC分类号： H01K003/22 , H05K003/30
CPC分类号： H01L21/565 , H01L23/3128 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/05599 , H01L2224/48091 , H01L2224/49171 , H01L2224/73265 , H01L2224/85399 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01033 , H01L2924/15153 , H01L2924/1517 , Y10T29/49144 , Y10T29/49146 , Y10T29/49158 , Y10T29/49172 , H01L2224/85 , H01L2224/83 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： An encapsulation method for a ball grid array (BGA) semiconductor package, includes: adhering one sided adhesive tape to an upper portion of the semiconductor package after performing a wire bonding; carrying out a molding by using a mold having a groove of a certain size inside; and removing the one side adhesive tape after completing the molding, whereby a flash is prevented from occurring during the BGA encapsulation process.

18. 发明申请

US20020058401A1 Metal line of semiconductor device and method for fabricating the same 审中-公开
标题翻译：半导体器件的金属线及其制造方法
公开(公告)号：US20020058401A1
公开(公告)日：2002-05-16
申请号：US10043175
申请日：2002-01-14
申请人： LG Semicon Co., Ltd.
发明人： Chang Yong Kim
IPC分类号： H01L021/28 , H01L021/44 , H01L021/4763
CPC分类号： H01L28/92 , H01L21/32139 , H01L23/5283 , H01L23/53223 , H01L2924/0002 , H01L2924/00
摘要： A metal line of a semiconductor device and method of fabricating the same are provided in which the metal line deterioration due to electromigration is minimized to improve its reliability. The method of fabricating the metal line includes forming a barrier layer on an interlevel insulating layer including a contact hole; forming a plug to fill the contact hole; sequentially forming a metal layer and first anti-reflective coating layer on the plug and barrier layer; coating a bilevel resist on the first anti-reflective coating layer; patterning the bilevel resist using a half tone mask to form grooves on the surface of the bilevel resist; etching the bilevel resist, first anti-reflective layer and metal layer to a predetermined depth until a portion of the first antireflective coating layer placed under the grooves of the bilevel resist is exposed; simultaneously etching the bilevel resist, first anti-reflective coating layer and metal layer to expose the interlevel insulating layer, thereby forming a metal line with uneven surface having grooves; and forming a second anti-reflective coating layer on both sides of the first antireflective coating layer, metal line and barrier layer.
摘要翻译：提供半导体器件的金属线及其制造方法，其中由于电迁移而导致的金属线劣化被最小化以提高其可靠性。制造金属线的方法包括在包括接触孔的层间绝缘层上形成阻挡层; 形成插头以填充接触孔; 顺序地在插塞和阻挡层上形成金属层和第一抗反射涂层; 在第一抗反射涂层上涂覆双层抗蚀剂; 使用半色调掩模对双层抗蚀剂进行图案化以在双层抗蚀剂的表面上形成凹槽; 将双层抗蚀剂，第一抗反射层和金属层蚀刻到预定深度，直到暴露出位于双层抗蚀剂下面的第一抗反射涂层的一部分; 同时蚀刻双层抗蚀剂，第一抗反射涂层和金属层以暴露层间绝缘层，从而形成具有凹槽的凹凸表面的金属线; 以及在所述第一抗反射涂层，金属线和阻挡层的两侧上形成第二抗反射涂层。

19. 发明申请

US20010033007A1 Solid state image sensor and method for fabricating the same 有权
标题翻译：固态图像传感器及其制造方法
公开(公告)号：US20010033007A1
公开(公告)日：2001-10-25
申请号：US09879887
申请日：2001-06-14
申请人： LG Semicon Co., Ltd.
发明人： Chun Tak Lee
IPC分类号： H01L031/0232
CPC分类号： H01L27/14685 , H01L27/14621 , H01L27/14627 , H01L31/02327
摘要： Solid state image sensor having photodiode regions for converting optical image signal into an electrical signal and charge coupled device regions for transferring video charges generated in the photodiode regions in one direction, including first microlens layers spaced from one another and formed over the photodiode regions to be opposite thereto for focusing lights onto the photodiode regions, and second microlens layers formed of a material having a refractive index greater than the first microlens layers on an entire surface of the first microlens layers for focusing lights incident to edge portions of the first microlens layers and spaces between the first microlens layers onto the photodiode regions.
摘要翻译：具有光电二极管区域的固态图像传感器，用于将光学图像信号转换为电信号，并且对耦合的器件区域进行电荷耦合器件区域，以在一个方向上传输在光电二极管区域中产生的视频电荷，包括彼此间隔开并形成在光电二极管区域上的第一微透镜层，第二微透镜层由在第一微透镜层的整个表面上具有大于第一微透镜层的折射率的材料形成，用于聚焦入射到第一微透镜层的边缘部分的光;以及第一微透镜层之间的空间在光电二极管区域上。

20. 发明授权

US6271064B2 Thin film transistor and method of manufacturing the same 有权
公开(公告)号：US6271064B2
公开(公告)日：2001-08-07
申请号：US72501800
申请日：2000-11-29
申请人： LG SEMICON CO LTD
发明人： PARK SUNG KGE
IPC分类号： H01L21/336 , H01L29/786 , H01L21/84
CPC分类号： H01L29/78624
摘要： A thin film transistor includes a substrate, a gate electrode formed on the substrate, and including opposing edge portions and a middle portion. An insulating film is formed on the surface of the gate electrode having a greater thickness on one of the gate edge portions. An active region is formed on the surface of the insulating film and the exposed substrate. The active region includes an off-set region, a channel region, a source region, and a drain region.

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