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11. 发明授权

US09300321B2 Light detection and ranging (LiDAR)data compression and decompression methods and apparatus 有权
标题翻译：光检测和测距（LiDAR）数据压缩和解压缩方法和装置
公开(公告)号：US09300321B2
公开(公告)日：2016-03-29
申请号：US13289839
申请日：2011-11-04
申请人： Borut Zalik , Domen Mongus
发明人： Borut Zalik , Domen Mongus
IPC分类号： G06F17/50 , H03M7/40 , G06T9/00 , G06K9/00 , H03M7/30
CPC分类号： H03M7/40 , G06K9/00 , G06T9/00 , H03M7/3075 , H03M7/6011
摘要： Methods and apparatus for lossless LiDAR LAS file compression and decompression are provided that include predictive coding, variable-length coding, and arithmetic coding. The predictive coding uses four different predictors including three predictors for x, y, and z coordinates and a constant predictor for scalar values, associated with each LiDAR data point.
摘要翻译：提供了无损LiDAR LAS文件压缩和解压缩的方法和装置，包括预测编码，可变长度编码和算术编码。预测编码使用四个不同的预测因子，包括x，y和z坐标的三个预测因子，以及与每个LiDAR数据点相关联的用于标量值的常数预测变量。

12. 发明授权

US08683022B2 Methods and apparatus for assigning a physical adapter to a virtual adapter 失效
标题翻译：将物理适配器分配给虚拟适配器的方法和装置
公开(公告)号：US08683022B2
公开(公告)日：2014-03-25
申请号：US11670633
申请日：2007-02-02
申请人： Randall S. Nelson , Eric G. Thiemann
发明人： Randall S. Nelson , Eric G. Thiemann
IPC分类号： G06F15/173
CPC分类号： H04L43/50 , H04L29/06
摘要： Apparatus and methods of assigning a physical adapter local to a computer to a virtual adapter in a computer through which the virtual adapter may receive and transmit data is provided. The apparatus and methods may include (1) providing a system including a plurality of computers coupled via a network, wherein a first computer of the plurality of computers includes a plurality of physical adapters and at least one virtual adapter; (2) for each virtual adapter in the first computer, assigning a rank to each physical adapter in the first computer; and (3) based on the ranks, testing one or more of the physical adapters in the first computer for connectivity to a physical adapter in a second computer with which a first virtual adapter is likely to communicate. Connectivity tests are started in a staggered manner that favors highly ranked physical adapters. Numerous other aspects are provided.
摘要翻译：提供了将本地计算机的物理适配器分配给虚拟适配器可以通过其接收和发送数据的计算机中的虚拟适配器的装置和方法。所述装置和方法可以包括（1）提供包括经由网络耦合的多个计算机的系统，其中所述多个计算机中的第一计算机包括多个物理适配器和至少一个虚拟适配器; （2）针对第一计算机中的每个虚拟适配器，为第一计算机中的每个物理适配器分配等级; 和（3）基于所述等级，测试所述第一计算机中的一个或多个物理适配器用于与第一虚拟适配器可能与之通信的第二计算机中的物理适配器连接。连接测试以交错的方式开始，有利于高度排名的物理适配器。提供了许多其他方面。

13. 发明授权

US07684895B2 Wafer loading station that automatically retracts from a moving conveyor in response to an unscheduled event 有权
标题翻译：晶圆加载站，响应于非计划事件，自动从运动的输送机回缩
公开(公告)号：US07684895B2
公开(公告)日：2010-03-23
申请号：US10987452
申请日：2004-11-12
申请人： Michael R. Rice , Eric A. Englhardt , Robert B. Lowrance , Martin R. Elliott , Jeffrey C. Hudgens
发明人： Michael R. Rice , Eric A. Englhardt , Robert B. Lowrance , Martin R. Elliott , Jeffrey C. Hudgens
IPC分类号： G06F19/00
CPC分类号： H01L21/67769 , H01L21/67775 , H01L21/67778 , Y10S414/135 , Y10S414/136
摘要： In a first aspect, a wafer loading station adapted to exchange wafer carriers with a wafer carrier transport system comprises a biasing element adapted to urge the end effector of the wafer loading station away from a moveable conveyor of the wafer carrier transport system upon the occurrence of a unscheduled event such as a power failure or an emergency shutdown. In a second aspect, an uninterruptible power supply commands a controller to cause the wafer carrier handler to retract the end effector from the wafer carrier transport system upon the occurrence of the unscheduled event, and provides the power necessary for the same. Numerous other aspects are provided.
摘要翻译：在第一方面，一种适于与晶片载体传输系统交换晶片载体的晶片装载站包括偏置元件，该偏置元件适于在晶片载体传输系统发生时将晶片载体站的末端执行器远离晶片载体传输系统的可移动传送器一个非计划的事件，如停电或紧急停机。在第二方面，不间断电源命令控制器使晶片载体处理器在发生非预定事件时从晶片载体传输系统缩回端部执行器，并提供其所需的功率。提供了许多其他方面。

14. 发明授权

US07310345B2 Empty indicators for weighted fair queues 有权
标题翻译：用于加权公平队列的空指示符
公开(公告)号：US07310345B2
公开(公告)日：2007-12-18
申请号：US10002085
申请日：2001-11-01
申请人： William John Goetzinger , Glen Howard Handlogten , James Francis Mikos , David Alan Norgaard , Daniel James Sucher
发明人： William John Goetzinger , Glen Howard Handlogten , James Francis Mikos , David Alan Norgaard , Daniel James Sucher
IPC分类号： H04L12/54
CPC分类号： H04L49/901 , H04L47/50 , H04L47/623
摘要： A scheduler for a network processor includes one or more scheduling queues. Each scheduling queue defines a respective sequence in which flows are to be serviced. A respective empty indicator is associated with each scheduling queue to indicate whether the respective scheduling queue is empty. By referring to the empty indicators, it is possible to avoid wasting operating cycles of the scheduler on searching scheduling queues that are empty.
摘要翻译：网络处理器的调度器包括一个或多个调度队列。每个调度队列定义要在其中服务流的相应序列。相应的空指示符与每个调度队列相关联，以指示相应的调度队列是否为空。通过参考空指示符，可以避免在搜索空的调度队列时浪费调度器的操作周期。

15. 发明授权

US07833843B2 Method for forming a memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide 有权
标题翻译：一种用于形成存储单元的方法，所述存储单元包括与硅化物相邻结晶的半导体结二极管
公开(公告)号：US07833843B2
公开(公告)日：2010-11-16
申请号：US11613151
申请日：2006-12-19
申请人： Scott Brad Herner
发明人： Scott Brad Herner
IPC分类号： H01L21/82
CPC分类号： H01L27/1021 , G11C13/0069 , G11C17/16 , G11C2013/009 , G11C2213/33 , H01L23/5252 , H01L27/101 , H01L2924/0002 , H01L2924/3011 , Y10S438/957 , H01L2924/00
摘要： A method of forming a memory cell involves forming a semiconductor junction diode in series with an antifuse. The cell is programmed by rupture of the antifuse. The semiconductor junction diode comprises silicon, the silicon crystallized in contact with a silicide. The silicide apparently provides a template for crystallization, improving crystallinity and conductivity of the diode, and reducing the programming voltage required to program the cell. It is advantageous to reduce a dielectric layer (such as an oxide, nitride, or oxynitride) intervening between the silicon and the silicon-forming metal during the step of forming the silicide.
摘要翻译：形成存储单元的方法涉及形成与反熔丝串联的半导体结二极管。电池通过反熔丝断裂来编程。半导体结二极管包括硅，硅与硅化物接触。硅化物显然提供了用于结晶的模板，提高了二极管的结晶度和导电性，并降低了编程电池所需的编程电压。有利的是在形成硅化物的步骤期间减少介于硅和形成硅的金属之间的介电层（例如氧化物，氮化物或氮氧化物）。

16. 发明授权

US07830694B2 Large array of upward pointing p-i-n diodes having large and uniform current 有权
标题翻译：大型的向上指向的p-i-n二极管阵列具有大且均匀的电流
公开(公告)号：US07830694B2
公开(公告)日：2010-11-09
申请号：US12478481
申请日：2009-06-04
申请人： S. Brad Herner
发明人： S. Brad Herner
IPC分类号： G11C17/06
CPC分类号： H01L45/122 , B82Y10/00 , G11C13/0007 , G11C17/16 , G11C2213/16 , G11C2213/32 , G11C2213/71 , H01L27/1021 , H01L27/24 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/149 , H01L45/16 , Y10S977/742 , Y10S977/842
摘要： A first memory level includes a first plurality of memory cells that includes every memory cell in the first memory level. Each memory cell includes a vertically oriented p-i-n diode in the form of a pillar that includes a bottom heavily doped p-type region, a middle intrinsic or lightly doped region, and a top heavily doped n-type region. The first plurality of memory cells includes programmed cells and unprogrammed cells, wherein programmed cells comprise at least half of the first plurality of memory cells. Current flowing through the p-i-n diodes of at least 99 percent of the programmed cells when a voltage between about 1.5 volts and about 3.0 volts is applied between the bottom heavily doped p-type region and the top heavily doped n-type region is at least 1.5 microamps.
摘要翻译：第一存储器级包括包括第一存储器级中的每个存储单元的第一多个存储单元。每个存储单元包括柱形形式的垂直取向的p-i-n二极管，其包括底部重掺杂p型区域，中间固有或轻掺杂区域和顶部重掺杂n型区域。第一组多个存储单元包括编程单元和未编程单元，其中编程单元包括第一多个存储单元的至少一半。在底部重掺杂p型区域和顶部重掺杂n型区域之间施加约1.5伏和约3.0伏特之间的电压时，流经至少99％编程单元的引脚二极管的电流为至少1.5 微电脑

17. 发明授权

US07452475B2 Cleaning process and apparatus for silicate materials 有权
标题翻译：硅酸盐材料清洗工艺和设备
公开(公告)号：US07452475B2
公开(公告)日：2008-11-18
申请号：US11061013
申请日：2005-02-17
申请人： Samantha S. H. Tan , Ning Chen
发明人： Samantha S. H. Tan , Ning Chen
IPC分类号： B44C1/22
CPC分类号： C23C16/4404 , C23C16/4407
摘要： A method for treating a surface of a quartz substrate includes preparing a substrate to provide a working surface having an initial roughness; and then ultrasonically acid-etching the working surface to increase the roughness of the working surface by at least about 10%. In one embodiment, the initial surface roughness is greater than about 10 Ra, and in another embodiment the initial surface roughness is greater than about 200 Ra. In a still further embodiment, the initial surface area, if less than about 200 Ra, is increased to greater than about 200 Ra. In other embodiments of the present invention, the working surface roughness is increased by at least about 25% or at least about 50%. Simultaneous with the increase in surface area (as measured by the roughness), the surface defects are reduced to reduce particulate contamination from the substrate.
摘要翻译：一种用于处理石英基板的表面的方法包括制备基板以提供具有初始粗糙度的工作表面; 然后对工作表面进行超声波酸蚀，使工作表面的粗糙度增加至少约10％。在一个实施方案中，初始表面粗糙度大于约10Ra，在另一个实施方案中，初始表面粗糙度大于约200Ra。在另一个实施方案中，初始表面积（如果小于约200Ra）增加至大于约200Ra。在本发明的其它实施例中，工作表面粗糙度增加至少约25％或至少约50％。与表面积增加同步（通过粗糙度测量），表面缺陷减少，从而降低基材的颗粒污染。

18. 发明授权

US06891419B2 Methods and apparatus for employing feedback body control in cross-coupled inverters 失效
标题翻译：在交叉耦合逆变器中采用反馈体控制的方法和装置
公开(公告)号：US06891419B2
公开(公告)日：2005-05-10
申请号：US10604554
申请日：2003-07-30
申请人： Paul D. Kartschoke , Stephen V. Kosonocky , Randy W. Mann , Norman J. Rohrer
发明人： Paul D. Kartschoke , Stephen V. Kosonocky , Randy W. Mann , Norman J. Rohrer
IPC分类号： H03K3/037 , H03K3/356
CPC分类号： H03K3/356104 , H03K3/0375
摘要： In a first aspect, a cross-coupled inverter is provided that includes a first inverter circuit having a first NFET coupled to a first PFET and a second inverter circuit having a second NFET coupled to a second PFET. The second inverter circuit is cross-coupled with the first inverter circuit at a plurality of nodes. The body of at least one of the first NFET, the second NFET, the first PFET and the second PFET is coupled so as to form a feedback path that reduces discharging at one or more of the plurality of nodes in response to a soft error event at the cross-coupled inverter.
摘要翻译：在第一方面，提供一种交叉耦合的反相器，其包括具有耦合到第一PFET的第一NFET的第一反相器电路和具有耦合到第二PFET的第二NFET的第二反相器电路。第二逆变器电路在多个节点处与第一反相器电路交叉耦合。第一NFET，第二NFET，第一PFET和第二PFET中的至少一个的主体被耦合以形成反馈路径，其减少响应于软错误事件的多个节点中的一个或多个的放电在交叉耦合的逆变器。

19. 发明授权

US06865501B2 Using clock gating or signal gating to partition a device for fault isolation and diagnostic data collection 失效
公开(公告)号：US06865501B2
公开(公告)日：2005-03-08
申请号：US10697365
申请日：2003-10-30
申请人： Leendert M. Huisman , William V. Huott , Franco Motika , Leah M. Pfeifer Pastel
发明人： Leendert M. Huisman , William V. Huott , Franco Motika , Leah M. Pfeifer Pastel
IPC分类号： G01R31/319 , G01R31/3193 , G06F19/00
CPC分类号： G01R31/31725 , G01R31/318594 , G01R31/31922 , G01R31/31937
摘要： In one aspect, an electronic device that has been partitioned into segments by using clock gating or signal gating is tested. One of the segments that is a source of a failure is identified. Diagnostic procedures are applied to the identified segment to determine a cause of the failure.

20. 发明授权

US09750104B2 Systems, apparatus, and methods for converting a bi-level lighting system to a dimmable lighting system 有权
公开(公告)号：US09750104B2
公开(公告)日：2017-08-29
申请号：US15167962
申请日：2016-05-27
申请人： ABL IP HOLDING, LLC
发明人： William J. Fassbender , Stephen H. Lydecker , Glen A. Kruse , Ryan A. Zaveruha , David M. Behnke
IPC分类号： H05B33/08 , H05B37/02 , H05B41/39 , H05B39/08 , H05B41/36
CPC分类号： H05B33/0854 , B23P6/00 , H05B33/0815 , H05B33/0845 , H05B33/0851 , H05B37/0209 , H05B37/0227 , H05B37/0254 , H05B39/086 , H05B41/36 , H05B41/39 , Y02B20/40 , Y02B20/46
摘要： A dimmable lighting system may replace a bi-level lighting system without having to modify or supplement the existing wiring between a bi-level control unit and one or more light fixtures. The dimmable lighting system may include a dimming controller that may be configured to replace a bi-level control unit in situ (i.e., e.g., in a wall-mounted dual-gang switch box). The dimmable lighting system may also include a dimming driver that may be coupled to the dimming controller via the existing wiring of the bi-level lighting system. The dimming controller may output to the dimming driver a 0-10 volt DC dimming signal referenced to an AC utility voltage. In response, a dimmable lighting device coupled to the dimming driver may output light over a wide range of dimming light levels. Methods of replacing a bi-level lighting system with a dimmable lighting system are also provided, as are other aspects.

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