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141. 发明授权

US06214800B1 Angiogenesis inhibitor 失效
标题翻译：血管生成抑制剂
公开(公告)号：US06214800B1
公开(公告)日：2001-04-10
申请号：US09282501
申请日：1999-04-09
申请人： Chiho Fukiage , Mitsuyoshi Azuma , Jun Inoue , Masayuki Nakamura , Yuka Yoshida
发明人： Chiho Fukiage , Mitsuyoshi Azuma , Jun Inoue , Masayuki Nakamura , Yuka Yoshida
IPC分类号： A61K3800
CPC分类号： A61K38/55 , C07C311/19 , C07D303/48
摘要： An angiogenesis inhibitor comprising a cysteine protease inhibitory compound. As the preferable cysteine protease inhibitory compound, epoxysuccinic acid compounds, peptide halohydrazide compounds, calpain inhibitory compounds, compounds of the formula (I) and compounds of the formula (VI) can be used. The angiogenesis inhibitor of the present invention suppresses new formation of blood vessels in the living tissues, so that it can be used as a superior therapeutic or prophylactic agent of angiogenesis associated with wound healing, inflammation, growth of tumor and the like; and angiogenesis as seen in diabetic retinopathy, prematurity retinopathy, retinal venous occlusion, senile discoid macular degeneration and the like, as well as for prevention of metastasis of tumors.
摘要翻译：一种包含半胱氨酸蛋白酶抑制化合物的血管生成抑制剂。作为优选的半胱氨酸蛋白酶抑制化合物，可以使用环氧琥珀酸化合物，肽卤代酰肼化合物，钙蛋白酶抑制化合物，式（I）的化合物和式（VI）的化合物。本发明的血管发生抑制剂抑制活组织中血管的新形成，可以用作与伤口愈合，炎症，肿瘤生长等有关的血管生成的优异治疗或预防剂。和血管生成，如糖尿病视网膜病变，早产儿视网膜病变，视网膜静脉闭塞，老年性盘状黄斑变性等，以及用于预防肿瘤转移。

142. 发明授权

US6111512A Fire detection method and fire detection apparatus 失效
标题翻译：火灾探测方法和火灾探测装置
公开(公告)号：US6111512A
公开(公告)日：2000-08-29
申请号：US41571
申请日：1998-03-12
申请人： Iwao Sugimoto , Masayuki Nakamura , Hiroki Kuwano
发明人： Iwao Sugimoto , Masayuki Nakamura , Hiroki Kuwano
IPC分类号： G08B17/10 , G08B17/12
CPC分类号： G08B17/10 , G08B17/113
摘要： Novel fire detection method and apparatus for positively detecting a fire in the stage of initial smoldering fire or smokeless burning with a high sensitivity. A sensor apparatus disposed in an area i makes gas detection and gas recognition using an existing pattern recognition method such as principal component analysis. If no gas is detected, flag f.sub.i =0 is set. If a gas is detected and recognized as a water vapor, f.sub.i =1 is set. If it is not recognized as a water vapor, f.sub.i =0 is set. Monitoring N areas as above, J=f.sub.1 +f.sub.2 + . . . +f.sub.N is calculated, if 0
摘要翻译：新型火灾探测方法和装置，用于在初始闷烧火灾或无烟无烟燃烧阶段积极检测火灾。设置在区域i中的传感器装置使用诸如主成分分析的现有模式识别方法进行气体检测和气体识别。如果没有检测到气体，则设置标志fi = 0。如果检测到气体并将其识别为水蒸汽，则设置fi = 1。如果不识别为水蒸汽，则设定为fi = 0。监测上述N个区域，J = f1 + f2 +。。。 + fN计算，如果0

143. 发明授权

US5976929A Method of manufacturing a semiconductor integrated circuit device having a capacitor 失效
标题翻译：具有电容器的半导体集成电路器件的制造方法
公开(公告)号：US5976929A
公开(公告)日：1999-11-02
申请号：US962878
申请日：1997-11-03
申请人： Kazuhiko Kajigaya , Masayuki Nakamura , Toshikazu Tachibana , Goro Kitsukawa
发明人： Kazuhiko Kajigaya , Masayuki Nakamura , Toshikazu Tachibana , Goro Kitsukawa
IPC分类号： H01L27/105 , H01L27/108 , H01L21/8242
CPC分类号： H01L27/105 , H01L27/10805
摘要： A semiconductor integrated circuit device having a DRAM consisting of memory cells, comprises; a first conductive film deposited over the main surface of a semiconductor substrate and used to form a gate electrode of a memory cell selection MISFET; a second conductive film deposited over the first conductive film and used to form bit lines to transfer data of a memory cell to a sense amplifier; a third conductive film deposited over the second conductive film and used to form a storage node of a capacitor; a fourth conductive film deposited over the third conductive film and used to form a plate electrode of the capacitor; and a fifth conductive film deposited over the fourth conductive film and used to form an interconnect, wherein a transistor in a direct peripheral circuit arranged close to a memory array is electrically connected, through a pad layer formed of the third conductive film, to the interconnection of the fifth conductive film deposited over the fourth conductive film, thereby allowing the aspect ratio of the contact hole formed over the pad layer to be reduced.
摘要翻译：一种具有由存储单元组成的DRAM的半导体集成电路器件，包括：沉积在半导体衬底的主表面上并用于形成存储器单元选择MISFET的栅电极的第一导电膜; 沉积在第一导电膜上并用于形成位线以将存储器单元的数据传送到读出放大器的第二导电膜; 沉积在所述第二导电膜上并用于形成电容器的存储节点的第三导电膜; 沉积在所述第三导电膜上并用于形成所述电容器的平板电极的第四导电膜; 以及沉积在第四导电膜上并用于形成互连的第五导电膜，其中布置在存储器阵列附近的直接外围电路中的晶体管通过由第三导电膜形成的焊盘层电连接到互连所述第五导电膜沉积在所述第四导电膜上，从而允许形成在所述焊盘层上的所述接触孔的纵横比减小。

144. 外观设计

USD399491S Electric actuator 失效
公开(公告)号：USD399491S
公开(公告)日：1998-10-13
申请号：US063378
申请日：1996-12-06
申请人： Shigekazu Nagai , Shuuzou Sakurai , Masayuki Nakamura
设计人： Shigekazu Nagai , Shuuzou Sakurai , Masayuki Nakamura

145. 发明授权

US5802005A Four bit pre-fetch sDRAM column select architecture 失效
标题翻译：四位预取sDRAM列选择架构
公开(公告)号：US5802005A
公开(公告)日：1998-09-01
申请号：US717540
申请日：1996-09-23
申请人： Masayuki Nakamura , Jeffrey E. Koelling , Paulette Thurston , Hugh P. McAdams
发明人： Masayuki Nakamura , Jeffrey E. Koelling , Paulette Thurston , Hugh P. McAdams
IPC分类号： G11C11/401 , G11C7/10 , G11C7/18 , G11C11/407 , G11C11/4091 , G11C11/4097 , G11C8/00
CPC分类号： G11C11/4091 , G11C11/4097 , G11C7/10 , G11C7/1018 , G11C7/1072 , G11C7/18
摘要： A synchronous DRAM memory device has four banks B0, B1, B2 and B3 of memory cell arrays 302-332 arranged across the length of the substrate 300. Each received address causes column address generators to select four bits of data for each bit of data in a data word. Data sequence circuits convey the four selected data bits to data bit bond pads 334,336 on the substrate in timed and selected sequential or interleaved order.
摘要翻译：同步DRAM存储器件具有布置在衬底300的长度上的存储器单元阵列302-332的四个存储体B0，B1，B2和B3。每个接收到的地址使得列地址生成器为每个数据位选择四位数据一个数据字。数据序列电路以定时和选择的顺序或交错顺序将四个所选择的数据位传送到衬底上的数据位接合焊盘334,336。

146. 发明授权

US5761149A Dynamic RAM 失效
标题翻译：动态RAM
公开(公告)号：US5761149A
公开(公告)日：1998-06-02
申请号：US679724
申请日：1996-07-12
申请人： Yukihide Suzuki , Kanehide Kenmizaki , Tsugio Takahashi , Masayuki Nakamura , Makoto Saeki , Chisa Makimura , Katsuo Komatsuzaki , Shunichi Sukegawa
发明人： Yukihide Suzuki , Kanehide Kenmizaki , Tsugio Takahashi , Masayuki Nakamura , Makoto Saeki , Chisa Makimura , Katsuo Komatsuzaki , Shunichi Sukegawa
IPC分类号： H01L27/108 , G11C8/14 , G11C11/401 , G11C11/407 , G11C11/418 , G11C29/00 , G11C29/04 , H01L21/8242 , H01L27/105 , G11C8/00
CPC分类号： G11C29/80 , G11C11/418 , G11C29/83 , G11C8/14 , H01L27/105
摘要： A dynamic RAM is provided with a main word lines; a plurality of subsidiary word lines which are arranged in the direction of bit lines crossing the main word line and to which a plurality of dynamic memory cells are connected; a plurality of subsidiary word selection lines which are extended so as to perpendicularly intersect the main word line and through which a selection signal for selecting one of the plurality of subsidiary word lines is transmitted; and a logic circuit for receiving a selection signal from the main word line and a selection signal from each of the subsidiary word selection lines to thereby form a selection signal for selecting one of the subsidiary word lines. In the dynamic RAM, the voltage level of each of the main word line and the subsidiary word selection lines is made to be equal to the ground potential when the line is in a not-selected state.
摘要翻译：动态RAM具有主字线; 多个辅助字线，沿着与主字线交叉的位线的方向排列，多个动态存储单元被连接到该多个辅助字线; 多个副字选择线，其被延伸成与主字线垂直相交，并且通过该多个副字选择线发送用于选择多个辅助字线中的一个的选择信号; 以及用于从主字线接收选择信号的逻辑电路和来自每个辅助字选择线的选择信号，从而形成用于选择一个辅助字线的选择信号。在动态RAM中，当线处于未选择状态时，使主字线和副字选择线中的每一个的电压电平等于地电位。

147. 发明授权

US5654577A Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US5654577A
公开(公告)日：1997-08-05
申请号：US476761
申请日：1995-06-07
申请人： Masayuki Nakamura , Kazuyuki Miyazawa , Hidetoshi Iwai
发明人： Masayuki Nakamura , Kazuyuki Miyazawa , Hidetoshi Iwai
IPC分类号： H01L27/04 , G11C11/408 , H01L21/822 , H01L21/8238 , H01L27/092 , H01L27/10 , H01L27/105 , H01L27/108 , H01L29/76
CPC分类号： H01L27/105
摘要： A semiconductor integrated circuit device includes in a substrate a P-type well region containing a memory array section in which dynamic memory cells are arranged in a matrix. The P-type well region is fed with a back bias voltage whose absolute value is reduced so as to be the most suitable for the refresh characteristics. Also included is a P-well region wherein there are formed N-channel MOSFETs of a peripheral circuit this P-well region is fed with a back bias voltage whose absolute value is smaller than that of the potential fed to the P-type well of the memory array section, considering the high-speed operation. A P-type well section, wherein there is formed are N-channel MOSFETs of an input circuit or an output circuit connected with external terminals, is fed with a back bias voltage whose absolute value is made large considering an undershoot voltage. The P-type well region provided with the memory array section is fed with a requisite minimum back bias voltage. Accordingly, the P-type well region provided with the input circuit or the output circuit corresponding to the external terminals is fed with the back bias voltage to provide a measure of protection against undershoot, while the refresh characteristics are improved by reducing the leakage current between the source/drain region connected with a capacitor and the P-type well, to thereby raise the operation speed of the peripheral circuit can be raised.
摘要翻译：半导体集成电路器件在衬底中包括含有存储器阵列部分的P型阱区域，其中动态存储器单元被布置成矩阵。 P型阱区域馈送有绝对值减小的背偏置电压，以便最适合刷新特性。还包括P阱区，其中形成外围电路的N沟道MOSFET，该P阱区被馈送反馈偏压，其绝对值小于馈送到P型阱的电位的绝对值存储器阵列部分，考虑高速运行。其中形成有输入电路的N沟道MOSFET或与外部端子连接的输出电路的P型阱区，考虑到下冲电压，馈送绝对值较大的反向偏置电压。设置有存储器阵列部分的P型阱区域被馈送必需的最小反向偏置电压。因此，设置有与外部端子相对应的输入电路或输出电路的P型阱区域被馈送有反向偏置电压，以提供对下冲的保护措施，同时通过减小刷新特性来减小可以提高与电容器和P型阱连接的源极/漏极区域，从而提高外围电路的操作速度。

148. 发明授权

US5386394A Semiconductor memory device for performing parallel operations on hierarchical data lines 失效
标题翻译：用于在分层数据线上执行并行操作的半导体存储器件
公开(公告)号：US5386394A
公开(公告)日：1995-01-31
申请号：US114633
申请日：1993-09-02
申请人： Takayuki Kawahara , Masakazu Aoki , Yoshinobu Nakagome , Makoto Hanawa , Kunio Uchiyama , Masayuki Nakamura , Goro Kitsukawa , Kanji Oishi
发明人： Takayuki Kawahara , Masakazu Aoki , Yoshinobu Nakagome , Makoto Hanawa , Kunio Uchiyama , Masayuki Nakamura , Goro Kitsukawa , Kanji Oishi
IPC分类号： G06F12/08 , G11C7/10 , G11C11/401 , G11C11/409 , G11C7/00 , G11C11/40
CPC分类号： G11C7/1048 , G11C7/1006
摘要： The semiconductor device has more-significant global data lines and less-significant data lines hierarchically formed, and switches for controlling the more-significant global data lines and the less-significant data lines to be connected each other. In addition, the semiconductor device has the unit for precharging the global data lines independently of the data lines.
摘要翻译：半导体器件具有分层形成的更重要的全局数据线和较不重要的数据线，以及用于控制更有意义的全局数据线和不太重要的数据线彼此连接的开关。此外，半导体器件具有用于独立于数据线预充电全局数据线的单元。

149. 发明授权

US5346877A Heat transfer sheets 失效
公开(公告)号：US5346877A
公开(公告)日：1994-09-13
申请号：US86874
申请日：1993-07-08
申请人： Masayuki Nakamura
发明人： Masayuki Nakamura
IPC分类号： B41M5/035 , B41M5/26 , B41M5/39 , C09B53/02 , B41M5/38
CPC分类号： B41M5/39 , C09B53/02 , Y10S428/913 , Y10S428/914 , Y10T428/31786
摘要： A heat transfer sheet is provided, which includes a base sheet and a dye carrier layer formed on one side of said base sheet, said dye carrier layer carrying a mixture of at least one dye expressed by the following general formula (I) with at least one other sublimable dye showing a maximum absorption wavelength at from 560 to 700 nm and having a molecular weight of at least 345: ##STR1## wherein: R.sub.1 to R.sub.4 each are a C.sub.1 to C.sub.6 alkyl group, a cycloalkyl group or a phenyl group, provided that R.sub.2 may be a hydrogen atom or an alkoxy group and R.sub.3 and R.sub.4 may form together a ring.

150. 发明授权

US5252530A Heat transfer sheets 失效
标题翻译：换热片
公开(公告)号：US5252530A
公开(公告)日：1993-10-12
申请号：US614266
申请日：1990-11-16
申请人： Masayuki Nakamura
发明人： Masayuki Nakamura
IPC分类号： B41M5/39 , C09B53/02 , B41M5/035 , B41M5/38
CPC分类号： B41M5/39 , C09B53/02 , Y10S428/913 , Y10S428/914
摘要： A heat transfer sheet is provided, which includes a base sheet and a dye carrier layer formed on one side of said base sheet, said dye carrier layer carrying a mixture of at least one dye expressed by the following general formula (I) with at least one other sublimable dye showing a maximum absorption wavelength at from 560 to 700 nm and having a molecular weight of at least 345: ##STR1## wherein: R.sub.1 to R.sub.4 each are a C.sub.1 to C.sub.6 alkyl group, a cycloalkyl group or a phenyl group, provided that R.sub.2 may be a hydrogen atom or an alkoxy group and R.sub.3 and R.sub.4 may form together a ring.
摘要翻译：提供了一种传热片，其包括基片和形成在所述基片的一侧上的染料载体层，所述染料载体层至少携带由以下通式（I）表示的至少一种染料的混合物另一种可升华的染料显示在560至700nm处的最大吸收波长，分子量至少为345：（I）其中：R1至R4各自为C1至C6烷基，环烷基或苯基，条件是R2可以是氢原子或烷氧基，R3和R4可以一起形成环。

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