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    • 121. 发明授权
    • Dense nanoscale logic circuitry
    • 密集的纳米级逻辑电路
    • US08390323B2
    • 2013-03-05
    • US13256234
    • 2009-04-30
    • Dmitri Borisovich StrukovPhilip J. Kuekes
    • Dmitri Borisovich StrukovPhilip J. Kuekes
    • H03K19/177
    • H01L27/24B82Y10/00
    • One embodiment of the present invention is directed to hybrid-nanoscale/microscale device comprising a microscale layer that includes microscale and/or submicroscale circuit components and that provides an array of microscale or submicroscale pins across an interface surface; and at least two nanoscale-layer sub-layers within a nanoscale layer that interfaces to the microscale layer, each nanoscale-layer sub-layer containing regularly spaced, parallel nanowires, each nanowire of the at least two nanoscale-layer sub-layers in electrical contact with at most one pin provided by the microscale layer, the parallel nanowires of successive nanoscale-layer sub-layers having different directions, with the nanowires of successive nanoscale-layer sub-layers intersecting to form programmable crosspoints.
    • 本发明的一个实施方案涉及包含微尺度层的混合纳米尺度/微米级器件,所述微米级层包括微米级和/或亚微米级电路部件,并且通过界面表面提供微米级或亚微米级引脚阵列; 以及在纳米尺度层内与微米级层相接触的至少两个纳米层子层,每个纳米级层子层含有规则间隔的平行纳米线,所述至少两个纳米级子层的每个纳米线在电 与由微尺度层提供的至多一个引脚接触,具有不同方向的连续纳米级子层的平行纳米线与连续的纳米级层子层的纳米线相交以形成可编程的交叉点。
    • 122. 发明授权
    • Nanoscale electronic device with anisotropic dielectric material
    • 具有各向异性介电材料的纳米级电子器件
    • US08314475B2
    • 2012-11-20
    • US12942131
    • 2010-11-09
    • Gilberto Medeiros RibeiroPhilip J. KuekesAlexandre M. BratkovskiJanice H. Nickel
    • Gilberto Medeiros RibeiroPhilip J. KuekesAlexandre M. BratkovskiJanice H. Nickel
    • H01L29/93
    • H01L45/14B82Y10/00H01L27/24
    • One example of the present invention is a nanoscale electronic device comprising a first conductive electrode, a second conductive electrode, and an anisotropic dielectric material layered between the first and second electrodes having a permittivity in a direction approximately that of the shortest distance between the first and second electrodes less than the permittivity in other directions within the anisotropic dielectric material. Additional examples of the present invention include integrated circuits that contain multiple nanoscale electronic devices that each includes an anisotropic dielectric material layered between first and second electrodes having a permittivity in a direction approximately that of the shortest distance between the first and second electrodes less than the permittivity in other directions within the anisotropic dielectric material.
    • 本发明的一个实例是纳米级电子器件,其包括第一导电电极,第二导电电极和各向异性介电材料,其分层在第一和第二电极之间,其电介质的方向大致在第一和第二电极之间的最短距离的方向上 在各向异性介电材料内的第二电极小于其它方向的介电常数。 本发明的另外的实例包括集成电路,其包含多个纳米尺度的电子器件,每个电子器件包括分层在第一和第二电极之间的各向异性介电材料,其电介质的方向大致在第一和第二电极之间的最短距离之间的介电常数小于介电常数 在各向异性介电材料内的其它方向。
    • 125. 发明申请
    • Dense Nanoscale Logic Circuitry
    • 密集的纳米级逻辑电路
    • US20120001653A1
    • 2012-01-05
    • US13256234
    • 2009-04-30
    • Dmitri Borisovich StrukovPhilip J. Kuekes
    • Dmitri Borisovich StrukovPhilip J. Kuekes
    • H03K19/173B82Y99/00
    • H01L27/24B82Y10/00
    • One embodiment of the present invention is directed to hybrid-nanoscale/microscale device comprising a microscale layer that includes microscale and/or submicroscale circuit components and that provides an array of microscale or submicroscale pins across an interface surface; and at least two nanoscale-layer sub-layers within a nanoscale layer that interfaces to the microscale layer, each nanoscale-layer sub-layer containing regularly spaced, parallel nanowires, each nanowire of the at least two nanoscale-layer sub-layers in electrical contact with at most one pin provided by the microscale layer, the parallel nanowires of successive nanoscale-layer sub-layers having different directions, with the nanowires of successive nanoscale-layer sub-layers intersecting to form programmable crosspoints.
    • 本发明的一个实施方案涉及包含微尺度层的混合纳米尺度/微米级器件,所述微米级层包括微米级和/或亚微米级电路部件,并且通过界面表面提供微米级或亚微米级引脚阵列; 以及在纳米尺度层内与微米级层相接触的至少两个纳米层子层,每个纳米级层子层含有规则间隔的平行纳米线,所述至少两个纳米级子层的每个纳米线在电 与由微尺度层提供的至多一个引脚接触,具有不同方向的连续纳米级子层的平行纳米线与连续的纳米级层子层的纳米线相交以形成可编程的交叉点。
    • 127. 发明申请
    • Nanoscale multiplexer
    • 纳米复合器
    • US20110181307A1
    • 2011-07-28
    • US12380910
    • 2009-03-05
    • Philip J. Kuekes
    • Philip J. Kuekes
    • G01R27/08H03K17/00B82Y99/00
    • G11C13/025B82Y10/00G11C13/0002G11C13/0023G11C2213/77G11C2213/81
    • In one embodiment of the present invention, a microscale or sub-microscale signal line, interconnected with one set of parallel nanowires of a nanowire crossbar, serves as a multiplexer. The multiplexer is used to detect the conductivity state of a nanowire junction within the nanowire crossbar. In one method embodiment of the present invention, a first signal is output to the two nanowires interconnected by the nanowire junction, while a second signal is output to the remaining nanowires of the nanowire crossbar. Then, the second signal is output to the two nanowires interconnected by the nanowire junction, while the first signal is output to the remaining nanowires of the nanowire crossbar. The resulting signal detected on the multiplexer is reflective of the conductivity state of the nanowire junction.
    • 在本发明的一个实施例中,与纳米线横截面的一组平行纳米线互连的微尺度或亚微米级信号线用作多路复用器。 多路复用器用于检测纳米线横截面内的纳米线结的导电性状态。 在本发明的一个方法实施例中,第一信号被输出到由纳米线结互连的两个纳米线,而第二个信号被输出到纳米线横截面的剩余纳米线。 然后,第二信号被输出到通过纳米线结互连的两个纳米线,而第一个信号被输出到纳米线横截面的剩余纳米线。 在多路复用器上检测到的结果信号反映了纳米线结的导电性状态。