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101. 发明授权

US06985385B2 Magnetic memory element utilizing spin transfer switching and storing multiple bits 有权
标题翻译：磁存储元件利用自旋转移切换和存储多个位
公开(公告)号：US06985385B2
公开(公告)日：2006-01-10
申请号：US10649119
申请日：2003-08-26
申请人： Paul P. Nguyen , Yiming Huai
发明人： Paul P. Nguyen , Yiming Huai
IPC分类号： G11C11/15
CPC分类号： G11C11/16 , B82Y25/00 , G11C11/5607 , H01F10/3263 , H01L43/08
摘要： A method and system for providing a magnetic element capable of storing multiple bits is disclosed. The method and system include providing first pinned layer, a first nonmagnetic layer, a first free layer, a connecting layer, a second pinned layer, a second nonmagetic layer and a second free layer. The first pinned layer is ferromagnetic and has a first pinned layer magnetization pinned in a first direction. The first nonmagnetic layer resides between the first pinned layer and the first free layer. The first free layer being ferromagnetic and has a first free layer magnetization. The second pinned layer is ferromagnetic and has a second pinned layer magnetization pinned in a second direction. The connecting layer resides between the second pinned layer and the first free layer. The second nonmagnetic layer resides between the second pinned layer and the second free layer. The second free layer being ferromagnetic and having a second free layer magnetization. The magnetic element is configured to allow the first free layer magnetization and the second free layer magnetization to change direction due to spin transfer when a write current is passed through the magnetic element.
摘要翻译：公开了一种用于提供能够存储多个位的磁性元件的方法和系统。该方法和系统包括提供第一被钉扎层，第一非磁性层，第一自由层，连接层，第二钉扎层，第二非弹性层和第二自由层。第一固定层是铁磁性的并且具有沿第一方向固定的第一固定层磁化。第一非磁性层位于第一被钉扎层和第一自由层之间。第一自由层是铁磁性的并且具有第一自由层磁化。第二被钉扎层是铁磁性的并且具有沿第二方向固定的第二钉扎层磁化。连接层位于第二被钉扎层和第一自由层之间。第二非磁性层位于第二被钉扎层和第二自由层之间。第二自由层是铁磁性的并且具有第二自由层磁化。磁性元件被配置为当写入电流通过磁性元件时，由于自旋转移使第一自由层磁化和第二自由层磁化改变方向。

102. 发明授权

US06967863B2 Perpendicular magnetization magnetic element utilizing spin transfer 有权
标题翻译：垂直磁化磁性元素利用自旋转移
公开(公告)号：US06967863B2
公开(公告)日：2005-11-22
申请号：US10787701
申请日：2004-02-25
申请人： Yiming Huai
发明人： Yiming Huai
IPC分类号： G11C11/00 , G11C11/14 , G11C11/16
CPC分类号： G11C11/16 , B82Y25/00 , B82Y40/00 , G01R33/093 , H01F10/3236 , H01F10/3263 , H01F10/3272 , H01F10/3286 , H01F41/302 , H01L43/08
摘要： A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The method and system include providing a first pinned layer, a barrier layer, a free layer, a conductive nonmagnetic spacer layer, and a second pinned layer. Each pinned layer has a pinned layer easy axis. At least a portion of the pinned layer easy axis is in a perpendicular direction. The barrier layer resides between the first pinned layer and the free layer. The spacer layer is between the free layer and the second pinned layer. The free layer has a free layer easy axis, at least a portion of which is in the perpendicular direction. The magnetic element is also configured to allow the free layer to be switched due to spin transfer effect when a write current is passed through the magnetic element. Because of the perpendicular magnetization(s), the writing current for spin transfer may be significantly reduced.
摘要翻译：公开了一种用于提供可用于磁存储器中的磁性元件的方法和系统。该方法和系统包括提供第一被钉扎层，阻挡层，自由层，导电非磁性间隔层和第二钉扎层。每个钉扎层具有固定层易轴。被钉扎层容易轴的至少一部分处于垂直方向。阻挡层位于第一被钉扎层和自由层之间。间隔层位于自由层和第二被钉扎层之间。自由层具有自由层易轴，其至少一部分在垂直方向。磁性元件还被配置为当写入电流通过磁性元件时由于自旋转移效应而允许自由层被切换。由于垂直磁化（s），自旋转移的写入电流可能会显着降低。

103. 发明授权

US06958927B1 Magnetic element utilizing spin-transfer and half-metals and an MRAM device using the magnetic element 有权
标题翻译：使用自旋转移和半金属的磁性元件和使用磁性元件的MRAM器件
公开(公告)号：US06958927B1
公开(公告)日：2005-10-25
申请号：US10269011
申请日：2002-10-09
申请人： Paul P. Nguyen , Yiming Huai
发明人： Paul P. Nguyen , Yiming Huai
IPC分类号： G11C11/00 , G11C11/16
CPC分类号： G11C11/16 , H01L43/08
摘要： A magnetic element that can be used in a memory array having high density includes a pinned layer, a half-metallic material layer, a spacer (or a barrier) layer and a free layer. The half-metallic material layer is formed on the pinned layer and preferably has a thickness that is less than about 100 Å. The half-metallic material layer can be formed to be a continuous layer or a discontinuous on the pinned layer. The spacer (or barrier) layer is formed on the half-metallic material layer, such that the spacer (or barrier) layer is nonmagnetic and conductive (or insulating). The free layer is formed on the spacer (or barrier) layer and has a second magnetization that changes direction based on the spin-transfer effect when a write current passes through the magnetic element.
摘要翻译：可用于具有高密度的存储器阵列中的磁性元件包括钉扎层，半金属材料层，间隔物（或阻挡层）层和自由层。半金属材料层形成在钉扎层上，优选地具有小于约的厚度。半金属材料层可以形成为连续层或在被钉扎层上形成不连续的。间隔物（或阻挡层）形成在半金属材料层上，使得间隔物（或阻挡层）是非磁性的并且是导电的（或绝缘的）。自由层形成在间隔物（或阻挡层）上，并具有当写入电流通过磁性元件时基于自旋转移效应改变方向的第二磁化。

104. 发明申请

US20050185455A1 PERPENDICULAR MAGNETIZATION MAGNETIC ELEMENT UTILIZING SPIN TRANSFER 有权
标题翻译：使用旋转传递的全能磁化元件
公开(公告)号：US20050185455A1
公开(公告)日：2005-08-25
申请号：US10787701
申请日：2004-02-25
申请人： Yiming Huai
发明人： Yiming Huai
IPC分类号： G11C11/00 , G11C11/14 , G11C11/16
CPC分类号： G11C11/16 , B82Y25/00 , B82Y40/00 , G01R33/093 , H01F10/3236 , H01F10/3263 , H01F10/3272 , H01F10/3286 , H01F41/302 , H01L43/08
摘要： A method and system for providing a magnetic element that can be used in a magnetic memory is disclosed. The method and system include providing a first pinned layer, a barrier layer, a free layer, a conductive nonmagnetic spacer layer, and a second pinned layer. Each pinned layer has a pinned layer easy axis. At least a portion of the pinned layer easy axis is in a perpendicular direction. The barrier layer resides between the first pinned layer and the free layer. The spacer layer is between the free layer and the second pinned layer. The free layer has a free layer easy axis, at least a portion of which is in the perpendicular direction. The magnetic element is also configured to allow the free layer to be switched due to spin transfer effect when a write current is passed through the magnetic element. Because of the perpendicular magnetization(s), the writing current for spin transfer may be significantly reduced.
摘要翻译：公开了一种用于提供可用于磁存储器中的磁性元件的方法和系统。该方法和系统包括提供第一被钉扎层，阻挡层，自由层，导电非磁性间隔层和第二钉扎层。每个钉扎层具有固定层易轴。被钉扎层容易轴的至少一部分处于垂直方向。阻挡层位于第一被钉扎层和自由层之间。间隔层位于自由层和第二被钉扎层之间。自由层具有自由层易轴，其至少一部分在垂直方向。磁性元件还被配置为当写入电流通过磁性元件时由于自旋转移效应而使自由层被切换。由于垂直磁化（s），自旋转移的写入电流可能会显着降低。

105. 发明申请

US20050106810A1 Stress assisted current driven switching for magnetic memory applications 有权
标题翻译：用于磁存储器应用的应力辅助电流驱动开关
公开(公告)号：US20050106810A1
公开(公告)日：2005-05-19
申请号：US10714357
申请日：2003-11-14
申请人： Mahendra Pakala , Yiming Huai
发明人： Mahendra Pakala , Yiming Huai
IPC分类号： G11C20060101 , G11C11/16 , G11C17/02 , H01L21/336 , H01L21/8246 , H01L27/22 , H01L43/08
CPC分类号： G11C11/16 , B82Y10/00 , B82Y25/00 , H01F10/3272 , H01F10/3286 , H01L27/228 , H01L43/08
摘要： A method and system for providing a magnetic memory is disclosed. The method and system include providing a plurality of magnetic elements and providing at least one stress-assist layer. Each of the plurality of magnetic elements is configured to be written using spin transfer. The at least one stress-assist layer is configured to exert at least one stress on at least one magnetic element of the plurality of magnetic elements during writing. The reduction of spin-transfer switching current is due to stress exerted by the stress-assist layer on the magnetic elements during writing. Stability of the magnetic memory with respect to thermal fluctuations is not compromised because the energy barrier between the two magnetization states is unchanged once the switching current is turned off.
摘要翻译：公开了一种用于提供磁存储器的方法和系统。该方法和系统包括提供多个磁性元件并提供至少一个应力辅助层。多个磁性元件中的每一个被配置为使用自旋转移来写入。所述至少一个应力辅助层被配置为在书写期间在所述多个磁性元件的至少一个磁性元件上施加至少一个应力。自旋转移开关电流的减小是由于应力辅助层在写入期间对磁性元件施加的应力。相对于热波动，磁存储器的稳定性不会受到损害，因为一旦切换电流关闭，两个磁化状态之间的能量势垒就不变。

106. 发明授权

US06714444B2 Magnetic element utilizing spin transfer and an MRAM device using the magnetic element 有权
公开(公告)号：US06714444B2
公开(公告)日：2004-03-30
申请号：US10213537
申请日：2002-08-06
申请人： Yiming Huai , Paul P. Nguyen
发明人： Yiming Huai , Paul P. Nguyen
IPC分类号： G11C1114
CPC分类号： H01F10/3263 , B82Y25/00 , B82Y40/00 , H01F41/302
摘要： A method and system for providing a magnetic element capable of being written using spin-transfer effect while generating a high output signal and a magnetic memory using the magnetic element are disclosed. The magnetic element includes a first ferromagnetic pinned layer, a nonmagnetic spacer layer, a ferromagnetic free layer, an insulating barrier layer and a second ferromagnetic pinned layer. The pinned layer has a magnetization pinned in a first direction. The nonmagnetic spacer layer is conductive and is between the first pinned layer and the free layer. The barrier layer resides between the free layer and the second pinned layer and is an insulator having a thickness allowing electron tunneling through the barrier layer. The second pinned layer has a magnetization pinned in a second direction. The magnetic element is configured to allow the magnetization of the free layer to change direction due to spin transfer when a write current is passed through the magnetic element.

107. 发明授权

US08890108B2 Memory device having vertical selection transistors with shared channel structure and method for making the same 有权
标题翻译：具有具有共享信道结构的垂直选择晶体管的存储器件及其制造方法
公开(公告)号：US08890108B2
公开(公告)日：2014-11-18
申请号：US13438845
申请日：2012-04-04
申请人： Kimihiro Satoh , Yiming Huai , Jing Zhang
发明人： Kimihiro Satoh , Yiming Huai , Jing Zhang
IPC分类号： H01L29/02 , H01L47/00 , H01L29/04 , H01L29/06 , H01L47/02 , H01L45/00 , H01L27/24
CPC分类号： H01L45/06 , H01L27/2436 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/16
摘要： The present invention relates to resistive memory devices incorporating therein vertical selection transistors and methods for making the same. A memory device comprises a semiconductor substrate having a first type conductivity and a plurality of parallel trenches therein; a plurality of parallel common source lines having a second type conductivity opposite to the first type conductivity formed in the trench bottoms; a plurality of parallel gate electrodes formed on the trench sidewalls with a gate dielectric layer interposed therebetween, the gate electrodes being lower in height than the trench sidewalls; and a plurality of drain regions having the second type conductivity formed in top regions of the trench sidewalls, at least two of the drain regions being formed in each of the trench sidewalls and sharing a respective common channel formed in the each of the trench sidewalls and a respective one of the source lines.
摘要翻译：本发明涉及结合有垂直选择晶体管的电阻式存储器件及其制造方法。存储器件包括其中具有第一类型导电性和多个平行沟槽的半导体衬底; 多个平行的公共源极线，其具有与在沟槽底部中形成的第一类型导电性相反的第二类型导电; 形成在沟槽侧壁上的多个平行栅电极，其间插入有栅介电层，栅电极的高度低于沟槽侧壁; 以及形成在所述沟槽侧壁的顶部区域中的具有所述第二类型导电体的多个漏极区域，所述漏极区域中的至少两个形成在所述沟槽侧壁中的每一个中并且共享形成在每个所述沟槽侧壁中的相应公共沟道，相应的源线之一。

108. 发明授权

US08885395B2 Magnetoresistive logic cell and method of use 有权
标题翻译：磁阻逻辑单元及其使用方法
公开(公告)号：US08885395B2
公开(公告)日：2014-11-11
申请号：US13402123
申请日：2012-02-22
申请人： Yuchen Zhou , Zihui Wang , Yiming Huai , Rajiv Yadav Ranjan , Roger K. Malmhall
发明人： Yuchen Zhou , Zihui Wang , Yiming Huai , Rajiv Yadav Ranjan , Roger K. Malmhall
IPC分类号： G11C11/00
CPC分类号： G11C11/00 , G11C11/161 , G11C11/1673 , H01L27/222 , H01L43/08
摘要： A magnetoresistive logic cell (MRLC) is described that includes two MTJs in series that share a common free layer (CFL). The relative magnetization orientations of the CFL and the switchable reference layer (SRL) in MTJ-1 dominate the overall resistance of the MRLC without regard to the fixed magnetization orientation of the nonswitchable reference layer in MTJ-2. The high resistance state of the MRLC occurs when the switchable reference and common free layers have opposite magnetization orientations. The low resistance state occurs when the orientations are the same. This behavior allows the MRLC to be used as a logical comparator. The CFL is switched by STT effect by application of selected relatively short voltage pulses that do not switch the SRL. The SRL is switched with reference to the CFL by a voltage effect generated by a selected longer voltage pulse that does not switch the CFL.
摘要翻译：描述了包含共享共同自由层（CFL）的两个串联MTJ的磁阻逻辑单元（MRLC）。 MTJ-1中CFL和可切换参考层（SRL）的相对磁化取向主导了MRLC的总体电阻，而不考虑MTJ-2中不可切换参考层的固定磁化方向。当可切换参考和公共自由层具有相反的磁化方向时，MRLC的高电阻状态发生。当取向相同时，发生低电阻状态。此行为允许将MRLC用作逻辑比较器。通过施加不切换SRL的选定的相对较短的电压脉冲，通过STT效应来切换CFL。通过由不会切换CFL的选定的较长电压脉冲产生的电压效应，SRL将根据CFL进行切换。

109. 发明授权

US08536063B2 MRAM etching processes 有权
公开(公告)号：US08536063B2
公开(公告)日：2013-09-17
申请号：US13199490
申请日：2011-08-30
申请人： Kimihiro Satoh , Yiming Huai , Jing Zhang , Rajiv Yadav Ranjan , Parviz Keshtbod , Roger K. Malmhall
发明人： Kimihiro Satoh , Yiming Huai , Jing Zhang , Rajiv Yadav Ranjan , Parviz Keshtbod , Roger K. Malmhall
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L43/12 , H01L29/00
摘要： Various embodiments of the invention relate to etching processes used in fabrication of MTJ cells in an MRAM device. The various embodiments can be used in combination with each other. The first embodiment adds a hard mask buffer layer between a hard mask and a top electrode. The second embodiment uses a multilayered etching hard mask. The third embodiment uses a multilayered top electrode structure including a first Cu layer under a second layer such as Ta. The fourth embodiment is a two-phase etching process used for the bottom electrode to remove re-deposited material while maintaining a more vertical sidewall etching profile. In the first phase the bottom electrode layer is removed using carbonaceous reactive ion etching until the endpoint. In the second phase an inert gas and/or oxygen plasma is used to remove the polymer that was deposited during the previous etching processes.

110. 发明申请

US20130126819A1 MEMORY DEVICE HAVING VERTICAL SELECTION TRANSISTORS WITH SHARED CHANNEL STRUCTURE AND METHOD FOR MAKING THE SAME 有权
标题翻译：具有共享通道结构的垂直选择晶体管的存储器件及其制造方法
公开(公告)号：US20130126819A1
公开(公告)日：2013-05-23
申请号：US13438845
申请日：2012-04-04
申请人： Kimihiro Satoh , Yiming Huai , Jing Zhang
发明人： Kimihiro Satoh , Yiming Huai , Jing Zhang
IPC分类号： H01L45/00 , H01L21/8239
CPC分类号： H01L45/06 , H01L27/2436 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/16
摘要： The present invention relates to resistive memory devices incorporating therein vertical selection transistors and methods for making the same. A memory device comprises a semiconductor substrate having a first type conductivity and a plurality of parallel trenches therein; a plurality of parallel common source lines having a second type conductivity opposite to the first type conductivity formed in the trench bottoms; a plurality of parallel gate electrodes formed on the trench sidewalls with a gate dielectric layer interposed therebetween, the gate electrodes being lower in height than the trench sidewalls; and a plurality of drain regions having the second type conductivity formed in top regions of the trench sidewalls, at least two of the drain regions being formed in each of the trench sidewalls and sharing a respective common channel formed in the each of the trench sidewalls and a respective one of the source lines.
摘要翻译：本发明涉及结合有垂直选择晶体管的电阻式存储器件及其制造方法。存储器件包括其中具有第一类型导电性和多个平行沟槽的半导体衬底; 多个平行的公共源极线，其具有与在沟槽底部中形成的第一类型导电性相反的第二类型导电; 形成在沟槽侧壁上的多个平行栅电极，其间插入有栅介电层，栅电极的高度低于沟槽侧壁; 以及形成在所述沟槽侧壁的顶部区域中的具有所述第二类型导电体的多个漏极区域，所述漏极区域中的至少两个形成在所述沟槽侧壁中的每一个中并且共享形成在每个所述沟槽侧壁中的相应公共沟道，相应的源线之一。

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