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    • 98. 发明授权
    • Power-on-reset circuit
    • 上电复位电路
    • US5300822A
    • 1994-04-05
    • US997191
    • 1992-12-28
    • Eiichi SugaharaTakashi Fujii
    • Eiichi SugaharaTakashi Fujii
    • H03K17/22G05F3/26
    • H03K17/223
    • A power-on-reset circuit includes a plurality of MOS transistors and a first depletion type N-channel MOS transistor connected in series to an input terminal of a current mirror circuit. A capacitor is connected between the input terminal and a voltage supply terminal. A second depletion type N-channel MOS transistor having a low current driving capacity is connected to an output terminal of the current mirror circuit. The degree of integration can be increased by constituting an integrating circuit with depletion type N-channel MOS transistors in place of a resistor. In addition, the voltage supply voltage is compared to the sum of the threshold voltage of the plurality of MOS transistors. This makes it possible to initialize the internal circuit positively even if the rise time of the voltage supply voltage becomes larger than the time constant of the integrating circuit.
    • 上电复位电路包括与电流镜电路的输入端串联连接的多个MOS晶体管和第一耗尽型N沟道MOS晶体管。 电容器连接在输入端子和电源端子之间。 具有低电流驱动能力的第二耗尽型N沟道MOS晶体管连接到电流镜电路的输出端。 可以通过构成具有耗尽型N沟道MOS晶体管的积分电路代替电阻来增加积分度。 此外,将电源电压与多个MOS晶体管的阈值电压之和进行比较。 这使得即使电源电压的上升时间变得大于积分电路的时间常数,也能够正确地初始化内部电路。
    • 99. 发明授权
    • Process for etching
    • 蚀刻工艺
    • US5110408A
    • 1992-05-05
    • US658254
    • 1991-02-20
    • Takashi FujiiHironobu KawaharaKazuo TakataMasaharu NishiumiNoriaki Yamamoto
    • Takashi FujiiHironobu KawaharaKazuo TakataMasaharu NishiumiNoriaki Yamamoto
    • H01L21/302H01L21/28H01L21/3065H01L21/308H01L21/3213
    • H01L21/3065H01L21/30655H01L21/3085H01L21/32136H01L21/32137H01L21/32139
    • The present invention relates to the etching of a gate film, a tungsten film, a silicon film, etc. In the present invention, use is made of an etching gas comprising a mixture composed of a reductive fluoride gas, a hydrocarbon gas and a halogen gas having a larger atomic diameter than a material to be etched, or a mixture composed of a reductive fluoride gas and a Cl-containing hydrocarbon gas, and the process comprises the step of conducting anisotropic etching of a material to be etched with an etching gas (a reductive fluoride gas), the step of forming a protective film by a depositing gas (a hydrocarbon gas), and the step of removing excess deposits formed as the protective film by means of a gas reactive with the protective film (a halogen gas or a Cl-containing hydrogen gas), wherein anisotropic etching is conducted by forming a protective film on a side wall while removing excess deposits formed as the protective film, thus enabling the anisotropic etching to be conducted with good accuracy.
    • 本发明涉及栅极膜,钨膜,硅膜等的蚀刻。在本发明中,使用包括由还原氟化物气体,烃气体和卤素组成的混合物的蚀刻气体 具有比待蚀刻材料更大的原子直径的气体或由还原性氟化物气体和含Cl的烃气体组成的混合物,该方法包括用蚀刻气体进行各向异性腐蚀蚀刻的步骤 (还原氟化物气体),通过沉积气体(烃气体)形成保护膜的步骤,以及通过与保护膜反应的气体(卤素气体)除去形成为保护膜的多余的沉积物的步骤 或含Cl的氢气),其中通过在侧壁上形成保护膜进行各向异性蚀刻,同时除去形成为保护膜的多余的沉积物,从而能够进行各向异性蚀刻 准确度好