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1. 发明授权

US06425080B1 Asynchronous Transfer Mode (ATM) cell descrambling circuit 失效
标题翻译：异步传输模式（ATM）单元解扰电路
公开(公告)号：US06425080B1
公开(公告)日：2002-07-23
申请号：US09124764
申请日：1998-07-29
申请人： Eiichi Sugahara
发明人： Eiichi Sugahara
IPC分类号： G06F126
CPC分类号： H04L25/03834 , H04L2012/5673 , H04Q11/0478
摘要： An ATM cell descrambling circuit for detecting a header portion and a payload portion of each cell of a scrambled asynchronous transfer mode (ATM) cell sequence in the state that each cell pre- or fully-synchronizes, descrambling the payload portion, and outputting a descrambled ATM cell sequence is disclosed, that comprises a means for determining whether each ATM cell is an unnecessary ATM cell that is not used in a higher layer of an ATM communication so as to stop a cell descrambling operation for a predetermined period.
摘要翻译：一种ATM信元解扰电路，用于在每个小区预先或完全同步的状态下检测加扰的异步传输模式（ATM）小区序列的每个小区的报头部分和有效载荷部分，对有效载荷部分进行解扰，并输出解扰的公开了ATM信元序列，其包括用于确定每个ATM信元是否是在ATM通信的较高层中未使用的不必要的ATM信元，以停止预定周期的信元解扰操作的装置。

2. 发明授权

US5300822A Power-on-reset circuit 失效
标题翻译：上电复位电路
公开(公告)号：US5300822A
公开(公告)日：1994-04-05
申请号：US997191
申请日：1992-12-28
申请人： Eiichi Sugahara , Takashi Fujii
发明人： Eiichi Sugahara , Takashi Fujii
IPC分类号： H03K17/22 , G05F3/26
CPC分类号： H03K17/223
摘要： A power-on-reset circuit includes a plurality of MOS transistors and a first depletion type N-channel MOS transistor connected in series to an input terminal of a current mirror circuit. A capacitor is connected between the input terminal and a voltage supply terminal. A second depletion type N-channel MOS transistor having a low current driving capacity is connected to an output terminal of the current mirror circuit. The degree of integration can be increased by constituting an integrating circuit with depletion type N-channel MOS transistors in place of a resistor. In addition, the voltage supply voltage is compared to the sum of the threshold voltage of the plurality of MOS transistors. This makes it possible to initialize the internal circuit positively even if the rise time of the voltage supply voltage becomes larger than the time constant of the integrating circuit.
摘要翻译：上电复位电路包括与电流镜电路的输入端串联连接的多个MOS晶体管和第一耗尽型N沟道MOS晶体管。电容器连接在输入端子和电源端子之间。具有低电流驱动能力的第二耗尽型N沟道MOS晶体管连接到电流镜电路的输出端。可以通过构成具有耗尽型N沟道MOS晶体管的积分电路代替电阻来增加积分度。此外，将电源电压与多个MOS晶体管的阈值电压之和进行比较。这使得即使电源电压的上升时间变得大于积分电路的时间常数，也能够正确地初始化内部电路。

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