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91. 发明申请

US20100182470A1 SOLID-STATE IMAGE SENSOR AND IMAGING DEVICE 有权
标题翻译：固态图像传感器和成像装置
公开(公告)号：US20100182470A1
公开(公告)日：2010-07-22
申请号：US12676532
申请日：2008-09-04
申请人： Shigetoshi Sugawa , Yasushi Kondo , Hideki Tominaga
发明人： Shigetoshi Sugawa , Yasushi Kondo , Hideki Tominaga
IPC分类号： H04N5/335
CPC分类号： H04N5/378 , H04N5/3415 , H04N5/374
摘要： A pixel output line (14) is independently provided for each of the pixels arranged in a two-dimensionally array within a pixel area so that pixel signals can be sequentially written in a plurality of memory sections (22) through the pixel output lines (14). When a plurality of frames of pixel signals are held in the memory sections (22), the pixel signals corresponding to two arbitrarily selected frames are read and respectively stored in sample-and-hold circuits (61 and 62), and their difference is obtained. Then, the difference signals corresponding to a predetermined range of the image are integrated, and the integrated value is compared with a threshold. If the integrated value exceeds the threshold, it is presumed that a change in an imaging object has occurred, and a pulse generation circuit (66) generates a trigger signal. By controlling the discontinuation and other imaging actions according to this trigger signal, it is possible to correctly take high-speed images of the situation before or after the occurrence of an objective phenomenon.
摘要翻译：像素输出线（14）被独立地设置在像素区域内以二维阵列布置的每个像素，使得可以通过像素输出线（14）将像素信号顺序地写入多个存储器部分（22））。当多个像素信号帧被保持在存储部分（22）中时，对应于两个任意选择的帧的像素信号被读取并分别存储在采样和保持电路（61和62）中，并且获得它们的差异。然后，对应于图像的预定范围的差分信号被积分，并将积分值与阈值进行比较。如果积分值超过阈值，则假设成像对象发生变化，脉冲发生电路（66）产生触发信号。通过根据该触发信号控制中断和其他成像动作，可以在目标现象发生之前或之后正确地拍摄情况。

92. 发明授权

US07718484B2 Method of forming a dielectic film that contains silicon, oxygen and nitrogen and method of fabricating a semiconductor device that uses such a dielectric film 有权
标题翻译：形成含有硅，氧和氮的介电膜的方法以及制造使用这种电介质膜的半导体器件的方法
公开(公告)号：US07718484B2
公开(公告)日：2010-05-18
申请号：US11979269
申请日：2007-10-31
申请人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama , Yasuyuki Shirai
发明人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama , Yasuyuki Shirai
IPC分类号： H01L21/336
CPC分类号： H01L21/28202 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02249 , H01L21/02252 , H01L21/02315 , H01L21/02332 , H01L21/0234 , H01L21/28211 , H01L21/2822 , H01L21/30604 , H01L21/3144 , H01L21/31662 , H01L21/3185 , H01L21/823462 , H01L27/105 , H01L27/1052 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L27/12 , H01L29/4908 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66757 , H01L29/78603 , H01L29/78645
摘要： In a film formation method of a semiconductor device including a plurality of silicon-based transistors or capacitors, there exist hydrogen at least in a part of the silicon surface in advance, and the film formation method removes the hydrogen by exposing the silicon surface to a first inert gas plasma. Thereafter a silicon compound layer is formed on the surface of the silicon gas by generating plasma while using a mixed gas of a second inert gas and one or more gaseous molecules, such that there is formed a silicon compound layer containing at least a pat of the elements constituting the gaseous molecules, on the surface of the silicon gas.
摘要翻译：在包括多个硅基晶体管或电容器的半导体器件的成膜方法中，预先至少在硅表面的一部分中存在氢，并且成膜方法通过将硅表面暴露于第一惰性气体等离子体。此后，通过在使用第二惰性气体和一种或多种气态分子的混合气体的同时产生等离子体，在硅气体的表面上形成硅化合物层，使得形成至少含有构成气体分子的元素在硅气体的表面上。

93. 发明申请

US20090295974A1 SOLID-STATE IMAGE PICKUP DEVICE AND METHOD OF RESETTING THE SAME 有权
标题翻译：固态图像拾取装置及其复位方法
公开(公告)号：US20090295974A1
公开(公告)日：2009-12-03
申请号：US12539782
申请日：2009-08-12
申请人： Toru Koizumi , Shigetoshi Sugawa , Tetsunobu Kochi
发明人： Toru Koizumi , Shigetoshi Sugawa , Tetsunobu Kochi
IPC分类号： H04N5/335
CPC分类号： H04N5/3597 , H04N5/238 , H04N5/353
摘要： A solid-state image pickup device comprises for each pixel a photoelectric converter PD, an input terminal FD of a signal amplifier and a transfer switch TX for transferring an optical signal from the photoelectric converter to the input terminal. The device additionally comprises means for resetting the photoelectric converter by opening the transfer switch TX under a condition of holding the voltage of the input terminal FD to a fixed high level before storing the optical signal in the photoelectric converter PD. With this arrangement, any residual electric charge in the photoelectric converter can be eliminated without paying the cost of reducing the manufacturing yield and degrading the chip performance.
摘要翻译：固态图像拾取装置包括每个像素光电转换器PD，信号放大器的输入端子FD和用于将光信号从光电转换器传送到输入端子的转移开关TX。该装置还包括用于在将光信号存储在光电转换器PD中之前将输入端子FD的电压保持在固定高电平的状态下打开转换开关TX来复位光电转换器的装置。通过这种布置，可以消除光电转换器中的任何剩余电荷，而不需要降低制造成品率和降低芯片性能的成本。

94. 发明申请

US20080277715A1 Dielectric film and formation method thereof, semiconductor device, non-volatile semiconductor memory device, and fabrication method for a semiconductor device 有权
标题翻译：电介质膜及其形成方法，半导体器件，非易失性半导体存储器件以及半导体器件的制造方法
公开(公告)号：US20080277715A1
公开(公告)日：2008-11-13
申请号：US11979269
申请日：2007-10-31
申请人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama , Yasuyuki Shirai
发明人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama , Yasuyuki Shirai
IPC分类号： H01L29/788 , H01L23/58 , H01L21/469 , H01L21/3205
CPC分类号： H01L21/28202 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02249 , H01L21/02252 , H01L21/02315 , H01L21/02332 , H01L21/0234 , H01L21/28211 , H01L21/2822 , H01L21/30604 , H01L21/3144 , H01L21/31662 , H01L21/3185 , H01L21/823462 , H01L27/105 , H01L27/1052 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L27/12 , H01L29/4908 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66757 , H01L29/78603 , H01L29/78645
摘要： In a film formation method of a semiconductor device including a plurality of silicon-based transistors or capacitors, there exist hydrogen at least in a part of the silicon surface in advance, and the film formation method removes the hydrogen by exposing the silicon surface to a first inert gas plasma. Thereafter a silicon compound layer is formed on the surface of the silicon gas by generating plasma while using a mixed gas of a second inert gas and one or more gaseous molecules, such that there is formed a silicon compound layer containing at least a pat of the elements constituting the gaseous molecules, on the surface of the silicon gas.
摘要翻译：在包括多个硅基晶体管或电容器的半导体器件的成膜方法中，预先至少在硅表面的一部分中存在氢，并且成膜方法通过将硅表面暴露于第一惰性气体等离子体。此后，通过在使用第二惰性气体和一种或多种气态分子的混合气体的同时产生等离子体，在硅气体的表面上形成硅化合物层，使得形成至少含有构成气体分子的元素在硅气体的表面上。

95. 发明授权

US07439121B2 Dielectric film and method of forming it, semiconductor device, non-volatile semiconductor memory device, and production method for semiconductor device 有权
标题翻译：电介质膜及其形成方法，半导体器件，非易失性半导体存储器件以及半导体器件的制造方法
公开(公告)号：US07439121B2
公开(公告)日：2008-10-21
申请号：US10451925
申请日：2001-12-27
申请人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama , Yasuyuki Shirai
发明人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama , Yasuyuki Shirai
IPC分类号： H01L21/33
CPC分类号： H01L21/28202 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02249 , H01L21/02252 , H01L21/02315 , H01L21/02332 , H01L21/0234 , H01L21/28211 , H01L21/2822 , H01L21/30604 , H01L21/3144 , H01L21/31662 , H01L21/3185 , H01L21/823462 , H01L27/105 , H01L27/1052 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L27/12 , H01L29/4908 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66757 , H01L29/78603 , H01L29/78645
摘要： In a film formation method of a semiconductor device including a plurality of silicon-based transistors or capacitors, there exist hydrogen at least in a part of the silicon surface in advance, and the film formation method removes the hydrogen by exposing the silicon surface to a first inert gas plasma. Thereafter a silicon compound layer is formed on the surface of the silicon gas by generating plasma while using a mixed gas of a second inert gas and one or more gaseous molecules, such that there is formed a silicon compound layer containing at least a pat of the elements constituting the gaseous molecules, on the surface of the silicon gas.
摘要翻译：在包括多个硅基晶体管或电容器的半导体器件的成膜方法中，预先至少在硅表面的一部分中存在氢，并且成膜方法通过将硅表面暴露于第一惰性气体等离子体。此后，通过在使用第二惰性气体和一种或多种气态分子的混合气体的同时产生等离子体，在硅气体的表面上形成硅化合物层，使得形成至少含有构成气体分子的元素在硅气体的表面上。

96. 发明申请

US20080220592A1 SUBSTRATE PROCESSING APPARATUS, SUBSTRATE PROCESSING METHOD, AND SUBSTRATE PLANARIZATION METHOD 审中-公开
标题翻译：基板处理装置，基板处理方法和基板平面化方法
公开(公告)号：US20080220592A1
公开(公告)日：2008-09-11
申请号：US12045321
申请日：2008-03-10
申请人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama , Tetsuya Goto
发明人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama , Tetsuya Goto
IPC分类号： H01L21/3213 , H01L21/321
CPC分类号： H01L21/67115 , H01L21/3003 , H01L21/324 , H01L21/67098 , H01L21/67109 , H01L27/1214 , H01L27/127 , H01L29/66757 , H01L29/78603
摘要： A substrate processing apparatus has a processing space provided with a holding stand for holding a substrate to be processed. A hydrogen catalyzing member is arranged in the processing space to face the substrate and for decomposing hydrogen molecules into hydrogen radicals H*. A gas feeding port is arranged in the processing space on an opposite side of the hydrogen catalyzing member to the substrate for feeding a processing gas including at least hydrogen gas. An interval between the hydrogen catalyzing member and the substrate on the holding stand is set less than the distance that the hydrogen radicals H* can reach.
摘要翻译：衬底处理设备具有设置有用于保持待处理衬底的保持架的处理空间。在处理空间中配置氢气催化构件以面对衬底并将氢分子分解成氢原子H *。气体供给口设置在处理空间中，在与氢气催化构件相对的基板上，供给至少包含氢气的处理气体。氢催化构件和保持架上的基板之间的间隔被设定为小于氢根H *可以达到的距离。

97. 发明授权

US07424595B2 System for managing circuitry of variable function information processing circuit and method for managing circuitry of variable function information processing circuit 失效
标题翻译：用于管理可变功能信息处理电路的电路的系统和用于管理可变功能信息处理电路的电路的方法
公开(公告)号：US07424595B2
公开(公告)日：2008-09-09
申请号：US10296640
申请日：2001-06-06
申请人： Tadahiro Ohmi , Tatsuo Morimoto , Akira Nakada , Shigetoshi Sugawa
发明人： Tadahiro Ohmi , Tatsuo Morimoto , Akira Nakada , Shigetoshi Sugawa
IPC分类号： G06F15/17 , G06F9/54
CPC分类号： G06F9/44505 , G06F9/3897
摘要： Configuration management information having circuit configuration information for altering a circuit configuration of an FPGA (12) is stored in a memory (13), the configuration management information according to information related to an instruction group, which is supplied by a configuration management unit (11) from the outside via a signal line group (14), is read from the memory (13), and the circuit configuration of the FPGA (12) is altered according to the read configuration management information to execute processing of the instruction group so that information processing by software is replaced by information processing by hardware in real time, which increases execution speed of information processing and shortens verification time of software, enabling software development in a shorter period and with higher efficiency.
摘要翻译：具有用于改变FPGA（12）的电路配置的电路配置信息的配置管理信息被存储在存储器（13）中，根据由配置管理单元（11）提供的与指令组相关的信息，）经由信号线组（14）从存储器（13）读取，并且根据读取的配置管理信息改变FPGA（12）的电路配置，以执行指令组的处理，使得软件信息处理由硬件实时信息处理取代，提高了信息处理的执行速度，缩短了软件验证时间，使软件开发更短，效率更高。

98. 发明申请

US20060278909A1 Mis transistor and cmos transistor 审中-公开
标题翻译：误差晶体管和cmos晶体管
公开(公告)号：US20060278909A1
公开(公告)日：2006-12-14
申请号：US10560706
申请日：2004-06-11
申请人： Takefumi Nishimuta , Hiroshi Miyagi , Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto
发明人： Takefumi Nishimuta , Hiroshi Miyagi , Tadahiro Ohmi , Shigetoshi Sugawa , Akinobu Teramoto
IPC分类号： H01L29/94
CPC分类号： H01L29/7851 , H01L21/823807 , H01L21/823821 , H01L21/82385 , H01L29/045
摘要： A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate (702, 910) comprising a projecting part (704, 910B) with at least two different crystal planes on the surface on a principal plane, a gate insulator (708, 920B) for covering at least a part of each of said at least two different crystal planes constituting the surface of the projecting part, a gate electrode (706, 930B), comprised on each of said at least two different crystal planes constituting the surface of the projecting part, which sandwiches the gate insulator with the said at least two different planes, and a single conductivity type diffusion region (710a, 710b, 910c, 910d) formed in the projecting part facing each of said at least two different crystal planes and individually formed on both sides of the gate electrode. Such a configuration allows control over increase in the element area and increase of channel width.
摘要翻译：形成在半导体衬底上的MIS晶体管被认为包括半导体衬底（702,910），该半导体衬底包括在主平面上的表面上具有至少两个不同晶面的突出部分（704,910B），栅极绝缘体 708,920B），用于覆盖构成突出部分的表面的所述至少两个不同晶面的每一个的至少一部分;栅电极（706,930B），包括在所述至少两个不同晶面中的每一个上构成突出部分的表面，其将栅极绝缘体与所述至少两个不同的平面夹住，并且形成在突出部分中的单个导电型扩散区域（710a，710b，910c，910d）所述至少两个不同的晶面并且分别形成在所述栅电极的两侧。这种配置允许控制元件面积的增加和通道宽度的增加。

99. 发明申请

US20060261037A1 Substrate processing method and substrate processing apparatus 审中-公开
标题翻译：基板处理方法和基板处理装置
公开(公告)号：US20060261037A1
公开(公告)日：2006-11-23
申请号：US11496440
申请日：2006-08-01
申请人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama
发明人： Tadahiro Ohmi , Shigetoshi Sugawa , Masaki Hirayama
IPC分类号： C23F1/00 , H01L21/302 , H01L21/306 , C03C25/68
CPC分类号： H01L21/02247 , C23C8/36 , H01J37/321 , H01J37/32357 , H01L21/02252 , H01L21/3143 , H01L21/318
摘要： In a substrate processing apparatus, a control electrode (131) separates a process space (11C) including a substrate to be processed and a plasma formation space (11B) not including the substrate. The control electrode includes a conductive member formed in a processing vessel and having a plurality of apertures (131a) for passing plasma. A surface of the control electrode is covered by an aluminum oxide or a conductive nitride. In the substrate processing apparatus, a gas containing He and N2 is supplied into the processing vessel. In the plasma formation space, there is formed plasma under a condition in which atomic state nitrogen N* are excited. The atomic state nitrogen N* are used to nitride a surface of the substrate.
摘要翻译：在衬底处理装置中，控制电极（131）分离包括待处理衬底和不包括衬底的等离子体形成空间（11B）的处理空间（11C）。控制电极包括形成在处理容器中并具有用于使等离子体通过的多个孔（131a）的导电构件。控制电极的表面被氧化铝或导电氮化物覆盖。在基板处理装置中，将含有He和N 2的气体供给到处理容器中。在等离子体形成空间中，在原子态氮N *被激发的条件下形成等离子体。原子态氮N *用于氮化衬底的表面。

100. 发明申请

US20060252160A1 Electron beam exposure device and exposure method 审中-公开
标题翻译：电子束曝光装置和曝光方法
公开(公告)号：US20060252160A1
公开(公告)日：2006-11-09
申请号：US10567828
申请日：2004-08-09
申请人： Tadahiro Ohmi , Shigetoshi Sugawa , Kimio Yanagida , Kiwamu Takehisa
发明人： Tadahiro Ohmi , Shigetoshi Sugawa , Kimio Yanagida , Kiwamu Takehisa
IPC分类号： C23C16/00 , H01L21/00
CPC分类号： B82Y10/00 , B82Y40/00 , G03F1/20 , H01J37/3174
摘要： A 1:1 mask and a wafer are arranged so as to be vertical. Thus, a pattern portion of the 1:1 mask does not warp at all and, therefore, even when the mask has no beam, it is not necessary to strongly stretch a pattern portion thereof. Further, a gap between the mask and the wafer can be further reduced. Since it is not necessary to strongly stretch the pattern portion of the stencil mask, a very thin membrane can be bonded to the pattern portion. Thus, even when the acceleration voltage of an electron beam is as low as several kV, it is possible to use a mask called a membrane mask and carry out pattern formation by one-time exposure even in the case of a doughnut-shaped pattern.
摘要翻译： 1：1掩模和晶片布置成垂直。因此，1：1掩模的图案部分根本不翘曲，因此即使当掩模没有光束时，也不需要强烈地拉伸图案部分。此外，可以进一步减小掩模和晶片之间的间隙。由于不需要强力地拉伸模板掩模的图案部分，所以可以将非常薄的膜结合到图案部分。因此，即使当电子束的加速电压低至几kV时，也可以使用称为膜掩模的掩模，并且即使在环形图案的情况下也可以通过一次曝光进行图案形成。

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