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91. 发明授权

US07157325B2 Method for fabricating semiconductor memory device 有权
标题翻译：半导体存储器件的制造方法
公开(公告)号：US07157325B2
公开(公告)日：2007-01-02
申请号：US10959984
申请日：2004-10-08
申请人： Masatoshi Arai
发明人： Masatoshi Arai
IPC分类号： H01L21/32
CPC分类号： H01L27/11568 , H01L27/105 , H01L27/11526 , H01L27/11539 , Y10S438/961
摘要： A method for fabricating a semiconductor memory device in which a logic circuit and a nonvolatile memory are provided on a semiconductor substrate includes the steps of: forming an isolation region; forming a protective film made of an insulating material over the semiconductor substrate in a logic circuit region and a nonvolatile memory region; selectively introducing impurity ions in part of the semiconductor substrate in the logic circuit region; and removing the protective film formed over the logic circuit region. The step of introducing the impurity ions is performed before the step of removing the protective film is performed.
摘要翻译：一种用于制造半导体存储器件的方法，其中在半导体衬底上设置有逻辑电路和非易失性存储器包括以下步骤：形成隔离区; 在逻辑电路区域和非易失性存储区域中在半导体衬底上形成由绝缘材料制成的保护膜; 在半导体衬底的一部分中选择性地将杂质离子引入到逻辑电路区域中; 以及去除在逻辑电路区域上形成的保护膜。引入杂质离子的步骤是在除去保护膜的步骤之前进行的。

92. 发明授权

US07146259B2 Movable personal computer using system in a motor vehicle 失效
标题翻译：可移动个人电脑在汽车中使用系统
公开(公告)号：US07146259B2
公开(公告)日：2006-12-05
申请号：US10801553
申请日：2004-03-17
申请人： Masatoshi Arai
发明人： Masatoshi Arai
IPC分类号： G06F19/00
CPC分类号： B60K35/00 , B60R11/0252 , B60R2011/0005 , B60R2011/0007
摘要： A movable personal computer using system is located inside an instrument panel of a motor vehicle, and has a PC holder on which a movable personal computer is set. The movable personal computer is connectable to a CAN of the motor vehicle, and has a screen showing different information on four partial areas of the screen at the same time. The screen is reflected by a mirror member toward a driver such that the driver sees a virtual image of the screen. The mirror member is moved to show a virtual image on a partial area of the screen, which displays information different from another partial area of the screen, and selectively shifts from the one partial area to the another partial area of the screen.
摘要翻译：可移动个人计算机使用系统位于机动车辆的仪表板内部，并且具有设置可移动个人计算机的PC支架。可移动个人计算机可连接到机动车辆的CAN，并且具有屏幕的四个部分区域同时显示不同信息的屏幕。屏幕被镜子反射到驾驶员，使得驾驶员看到屏幕的虚拟图像。移动镜构件以在屏幕的部分区域上显示虚拟图像，其显示与屏幕的另一部分区域不同的信息，并且从屏幕的一个局部区域选择性地移动到另一部分区域。

93. 发明授权

US07126174B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07126174B2
公开(公告)日：2006-10-24
申请号：US10995283
申请日：2004-11-24
申请人： Mizuki Segawa , Isao Miyanaga , Toshiki Yabu , Takashi Nakabayashi , Takashi Uehara , Kyoji Yamashita , Takaaki Ukeda , Masatoshi Arai , Takayuki Yamada , Michikazu Matsumoto
发明人： Mizuki Segawa , Isao Miyanaga , Toshiki Yabu , Takashi Nakabayashi , Takashi Uehara , Kyoji Yamashita , Takaaki Ukeda , Masatoshi Arai , Takayuki Yamada , Michikazu Matsumoto
IPC分类号： H01L29/76
CPC分类号： H01L29/6659 , H01L21/76224 , H01L29/665 , H01L2924/0002 , H01L2924/00
摘要： An isolation which is higher in a stepwise manner than an active area of a silicon substrate is formed. On the active area, an FET including a gate oxide film, a gate electrode, a gate protection film, sidewalls and the like is formed. An insulating film is deposited on the entire top surface of the substrate, and a resist film for exposing an area stretching over the active area, a part of the isolation and the gate protection film is formed on the insulating film. There is no need to provide an alignment margin for avoiding interference with the isolation and the like to a region where a connection hole is formed. Since the isolation is higher in a stepwise manner than the active area, the isolation is prevented from being removed by over-etch in the formation of a connection hole to come in contact with a portion where an impurity concentration is low in the active area. In this manner, the integration of a semiconductor device can be improved and an area occupied by the semiconductor device can be decreased without causing degradation of junction voltage resistance and increase of a junction leakage current in the semiconductor device.
摘要翻译：形成了比硅衬底的有源区域更高级的隔离。在有源区域上，形成包括栅极氧化膜，栅电极，栅极保护膜，侧壁等的FET。绝缘膜沉积在基板的整个顶表面上，并且在绝缘膜上形成用于暴露在有源区上延伸的区域，一部分隔离栅极保护膜的抗蚀剂膜。不需要提供用于避免与形成连接孔的区域的隔离等的干涉的取向余量。由于隔离比有源区域以逐步方式更高，所以通过在形成连接孔中的过度蚀刻来防止隔离物与有源区域中杂质浓度低的部分接触。以这种方式，可以改善半导体器件的集成，并且可以降低半导体器件占据的面积，而不会导致半导体器件中的结电阻的劣化和结漏电流的增加。

94. 发明授权

US07060627B2 Method of decreasing charging effects in oxide-nitride-oxide (ONO) memory arrays 失效
标题翻译：降低氧化物 - 氧化物（ONO）存储器阵列中的充电效应的方法
公开(公告)号：US07060627B2
公开(公告)日：2006-06-13
申请号：US10659042
申请日：2003-09-09
申请人： Micha Gutman , Yakov Roizin , Menachem Vofsy , Efraim Aloni , Avi Ben-Gigi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi , Koji Yoshida
发明人： Micha Gutman , Yakov Roizin , Menachem Vofsy , Efraim Aloni , Avi Ben-Gigi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi , Koji Yoshida
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L27/11568 , H01L27/115 , H01L29/66833
摘要： A fieldless array includes a semiconductor substrate, a plurality of oxide-nitride-oxide (ONO) structures formed over the upper surface of the semiconductor substrate, and a plurality of word lines formed over the ONO structures, wherein each of the ONO structures is substantially covered by one of the word lines. The word lines (typically polysilicon) block UV irradiation during subsequent processing steps, thereby substantially preventing electrons from being trapped in the silicon nitride layer of the ONO structure. As a result, the threshold voltages of the fieldless array transistors do not severely increase as the width of the fieldless array transistors decrease.
摘要翻译：无场阵列包括半导体衬底，形成在半导体衬底的上表面上的多个氧化物 - 氮化物氧化物（ONO）结构，以及形成在ONO结构上的多个字线，其中每个ONO结构基本上被一条字线覆盖。字线（通常为多晶硅）在随后的处理步骤期间阻挡UV照射，从而基本上防止电子被捕获在ONO结构的氮化硅层中。结果，无栅阵列晶体管的阈值电压随着无栅阵列晶体管的宽度减小而不会严重增加。

95. 发明申请

US20060049927A1 Alarm display system for vehicles 失效
标题翻译：车辆报警显示系统
公开(公告)号：US20060049927A1
公开(公告)日：2006-03-09
申请号：US11221969
申请日：2005-09-09
申请人： Masatoshi Arai
发明人： Masatoshi Arai
IPC分类号： B60Q1/00
CPC分类号： B60K37/02
摘要： A display has a panel display unit with plural display screen portions arranged along a longitudinal direction of a vehicle body and providing an alarm display on a screen, a multistage display unit with reflecting mirrors inclined with respect to the screen portions and arranged at intervals along the longitudinal direction so as to respectively correspond with the screen portions and reflect the alarm display, and an alarm-distance obtaining unit for obtaining an alarm-distance between a present vehicle-position and an alarm-object position. The reflecting mirrors includes a most-rear reflecting mirror and at least one front reflecting mirror through which the alarm display can be seen. A multistage display control unit controls the display unit such that the alarm display is linked to the alarm-distance and provided in display-screen-portion order thereon so as to obtain a deep multistage alarm display.
摘要翻译：显示器具有面板显示单元，具有沿着车身的长度方向布置的多个显示屏部分，并在屏幕上提供报警显示;多台显示单元，其具有相对于屏幕部分倾斜的反射镜，并沿着纵向方向分别对应于屏幕部分并反映报警显示;以及报警距离获取单元，用于获得当前车辆位置与报警对象位置之间的报警距离。反射镜包括最后反射镜和至少一个前反射镜，通过该反射镜可以看到报警显示。多级显示控制单元控制显示单元，使得报警显示与报警距离相关联并以其显示屏部分顺序提供，以获得深层多级报警显示。

96. 发明申请

US20050054161A1 Method of decreasing charging effects in oxide-nitride-oxide (ONO) memory arrays 失效
标题翻译：降低氧化物 - 氧化物（ONO）存储器阵列中的充电效应的方法
公开(公告)号：US20050054161A1
公开(公告)日：2005-03-10
申请号：US10659042
申请日：2003-09-09
申请人： Micha Gutman , Yakov Roizin , Menachem Vofsy , Efraim Aloni , Avi Ben-Gigi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi , Koji Yoshida
发明人： Micha Gutman , Yakov Roizin , Menachem Vofsy , Efraim Aloni , Avi Ben-Gigi , Fumihiko Noro , Masatoshi Arai , Nobuyoshi Takahashi , Koji Yoshida
IPC分类号： H01L21/336 , H01L21/8246 , H01L27/115
CPC分类号： H01L27/11568 , H01L27/115 , H01L29/66833
摘要： A fieldless array includes a semiconductor substrate, a plurality of oxide-nitride-oxide (ONO) structures formed over the upper surface of the semiconductor substrate, and a plurality of word lines formed over the ONO structures, wherein each of the ONO structures is substantially covered by one of the word lines. The word lines (typically polysilicon) block UV irradiation during subsequent processing steps, thereby substantially preventing electrons from being trapped in the silicon nitride layer of the ONO structure. As a result, the threshold voltages of the fieldless array transistors do not severely increase as the width of the fieldless array transistors decrease.
摘要翻译：无场阵列包括半导体衬底，形成在半导体衬底的上表面上的多个氧化物 - 氮化物氧化物（ONO）结构，以及形成在ONO结构上的多个字线，其中每个ONO结构基本上被一条字线覆盖。字线（通常为多晶硅）在随后的处理步骤期间阻挡UV照射，从而基本上防止电子被捕获在ONO结构的氮化硅层中。结果，无栅阵列晶体管的阈值电压随着无栅阵列晶体管的宽度减小而不会严重增加。

97. 发明授权

US06815492B2 Rubber parts for aircraft 失效
标题翻译：飞机用橡胶部件
公开(公告)号：US06815492B2
公开(公告)日：2004-11-09
申请号：US10230337
申请日：2002-08-29
申请人： Shinichi Sato , Masatoshi Arai , Yasuhisa Osawa , Makoto Sato
发明人： Shinichi Sato , Masatoshi Arai , Yasuhisa Osawa , Makoto Sato
IPC分类号： C08J300
CPC分类号： C08G65/336 , C08G65/007 , C08K3/36 , C08L71/00
摘要： Rubber aircraft parts are made of the cured form of a curable composition comprising a perfluoropolyether polymer having a perfluoropolyether backbone and at least one reactive group, a crosslinking agent for crosslinking the polymer, and a silica filler having an average particle size of 0.001-10 &mgr;m. By providing dramatically improved sealability at low temperatures of −25 to −55° C., particularly during use in a dynamic state, and much improved resistance to amines and other chemicals, such rubber parts can ensure the reliable sealability of fluid line junctions in jet engines.
摘要翻译：橡胶飞机部件由可固化组合物的固化形式制成，其包含具有全氟聚醚主链和至少一个反应性基团的全氟聚醚聚合物，用于交联聚合物的交联剂和平均粒径为0.001-10μm的二氧化硅填料。通过在-25至-55℃的低温下，特别是在动态使用期间提供显着改善的密封性，并且对胺和其它化学品的耐受性大大改善，这样的橡胶部件可以确保流体线路接头在射流中的可靠密封性引擎。

98. 发明授权

US06774429B2 Hybrid semiconductor device with a poly-metal gate structure 失效
标题翻译：具有多金属栅极结构的混合半导体器件
公开(公告)号：US06774429B2
公开(公告)日：2004-08-10
申请号：US09921911
申请日：2001-08-06
申请人： Masatoshi Arai
发明人： Masatoshi Arai
IPC分类号： H01L29788
CPC分类号： H01L27/11526 , H01L27/105 , H01L27/11543
摘要： An inventive semiconductor memory device includes a memory circuit and a logic circuit that are formed on a single semiconductor substrate. The memory circuit includes a storage element having a memory gate structure. The memory gate structure includes: a tunnel insulating film formed on the substrate; and a control gate electrode formed out of a gate prototype film. The logic circuit includes a logical element having a logic gate structure. The logic gate structure includes: a lower gate electrode formed out of the gate prototype film; and an upper gate electrode formed out of a conductor film on the lower gate electrode. The conductor film contains a metal. The memory gate structure includes no metal films.
摘要翻译：本发明的半导体存储器件包括形成在单个半导体衬底上的存储器电路和逻辑电路。存储电路包括具有存储栅结构的存储元件。存储栅结构包括：形成在衬底上的隧道绝缘膜; 以及由栅极原型膜形成的控制栅电极。逻辑电路包括具有逻辑门结构的逻辑元件。逻辑门结构包括：由栅极原型膜形成的下栅电极; 以及在下栅电极上由导体膜形成的上栅电极。导体膜含有金属。存储栅结构不包括金属膜。

99. 发明授权

US06670954B2 Three-dimensional skeleton data error absorbing apparatus 失效
标题翻译：三维骨架数据误差吸收装置
公开(公告)号：US06670954B2
公开(公告)日：2003-12-30
申请号：US09848348
申请日：2001-05-04
申请人： Masatoshi Arai , Ryosuke Miyata
发明人： Masatoshi Arai , Ryosuke Miyata
IPC分类号： G06T1700
CPC分类号： G06T13/40
摘要： A three-dimensional skeleton data error absorbing apparatus is provided, which is capable of rendering an object at a correct rendering position by absorbing an error based on skeleton data calculation. A fixed skeleton portion specifying part 20 specifies a fixed skeleton portion whose rendering position is desired to be fixed, and a skeleton matrix calculating part 40 obtains a coordinate of a fixed position. A skeleton length detecting part 31, a skeleton hierarchy level detecting part 32, and an error absorption priority detecting part 33 of an error absorbing skeleton specifying part 30 select an error absorbing skeleton that absorbs an error. An error absorption calculating part 60 obtains, by inverse matrix calculation, a determinant, which should be satisfied by a skeleton matrix of error absorbing skeleton, based on the matrix calculation results and the coordinate of a fixed position of the other skeletons. An error based on the difference in a platform is simulated in a resource environment of an assumed platform, and error absorption processing is conducted so as to absorb the error results.
摘要翻译：提供了一种三维骨架数据误差吸收装置，其能够通过基于骨架数据计算吸收误差而使对象呈现在正确的绘制位置。固定骨架部指定部20指定希望固定其再现位置的固定骨架部，骨架矩阵计算部40获取固定位置的坐标。误差吸收骨架指定部30的骨架长度检测部31，骨架层次检测部32和误差吸收优先检测部33选择吸收错误的误差吸收骨架。误差吸收计算部60基于矩阵计算结果和其他骨架的固定位置的坐标，通过逆矩阵计算获得应该由误差吸收骨架的骨架矩阵来满足的行列式。在假设平台的资源环境中模拟基于平台差异的误差，并进行误差吸收处理以吸收误差结果。

100. 发明授权

US06524904B1 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06524904B1
公开(公告)日：2003-02-25
申请号：US09551542
申请日：2000-04-18
申请人： Mizuki Segawa , Masatoshi Arai , Toshiki Yabu , Shunsuke Kugo
发明人： Mizuki Segawa , Masatoshi Arai , Toshiki Yabu , Shunsuke Kugo
IPC分类号： H01L218238
CPC分类号： H01L21/823842
摘要： After P+ ions are implanted into a polysilicon film in an nMOSFET region, a heat treatment is performed to diffuse phosphorus down to the lower part of the polysilicon film. The diffusion reduces the concentration of phosphorus in an upper end portion of the polysilicon film and inhibits the upper end edges of a gate electrode from being increased in size during patterning. Then, B+ ions are implanted into the polysilicon film in a pMOSFET region and the polysilicon film is etched into a gate configuration. Since a heat treatment for simultaneously diffusing phosphorus and boron in the polysilicon film is not performed, the entrance of boron from the gate electrode into a semiconductor substrate is inhibited, while the occurrence of side etching during the formation of an n-type polysilicon gate is suppressed.
摘要翻译：将P +离子注入nMOSFET区域中的多晶硅膜之后，进行热处理以将磷扩散到多晶硅膜的下部。扩散减少了多晶硅膜的上端部分中的磷的浓度，并且在图案化期间抑制栅电极的上端边缘的尺寸增大。然后，在pMOSFET区域中将B +离子注入到多晶硅膜中，并且将多晶硅膜蚀刻成栅极配置。由于不进行同时扩散多晶硅膜中的磷和硼的热处理，可以抑制从栅极引入到半导体衬底中的硼，同时在形成n型多晶硅栅极时发生侧蚀刻是被压制

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