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    • 91. 发明申请
    • Electrically Conductive Emulsion Ink and Method for Producing Electrically Conductive Thin Film Using the Same
    • 导电乳液油墨及使用其的导电薄膜的制造方法
    • US20110143051A1
    • 2011-06-16
    • US12961786
    • 2010-12-07
    • Kazunori OhashiHiroyuki Ogawa
    • Kazunori OhashiHiroyuki Ogawa
    • B05D5/12H01B1/22
    • C09D11/101C09D11/0235C09D11/52
    • An electrically conductive emulsion ink is provided, which can form an electrically conductive thin film from metal nanoparticles on various substrates at a relatively low temperature in short time with simple procedures.The emulsion ink comprises an oil phase containing metal nanoparticles and a water phase containing a reducing agent for the metal nanoparticles and/or a photocatalyst. An electrically conductive film can be formed by coating or patterning the emulsion ink on a substrate surface, and then subjecting the coated ink to heat treatment and/or ultraviolet irradiation so as to reduce the metal nanoparticles. Heat treatment is preferably conducted at 40-100° C. Ultraviolet irradiation can be performed at room temperature. Preferably, the oil phase comprises a non-aqueous dispersion medium and metal nanoparticles dispersed in the medium, and the metal nanoparticles are obtained by amine reduction method and coated with a protecting agent having a linear or branched alkyl group with 10-20 carbon atoms.
    • 提供一种导电乳液油墨,其可以在短时间内以简单的程序在相对低的温度下在各种基材上由金属纳米颗粒形成导电薄膜。 乳液油墨包含含有金属纳米颗粒的油相和含有金属纳米颗粒和/或光催化剂的还原剂的水相。 可以通过在基材表面上涂布或图案化乳液油墨,然后对涂覆的油墨进行热处理和/或紫外线照射以便还原金属纳米颗粒来形成导电膜。 热处理优选在40-100℃进行。紫外线照射可以在室温下进行。 优选地,油相包含非水分散介质和分散在介质中的金属纳米颗粒,并且通过胺还原法获得金属纳米颗粒,并涂覆有具有10-20个碳原子的直链或支链烷基的保护剂。
    • 92. 发明授权
    • Method for forming a flash memory device with straight word lines
    • 用于形成具有直线字线的闪速存储器件的方法
    • US07851306B2
    • 2010-12-14
    • US12327641
    • 2008-12-03
    • Shenqing FangHiroyuki OgawaKuo-Tung ChangPavel FastenkoKazuhiro MizutaniZhigang Wang
    • Shenqing FangHiroyuki OgawaKuo-Tung ChangPavel FastenkoKazuhiro MizutaniZhigang Wang
    • H01L21/336
    • H01L29/7883H01L21/2652H01L27/115H01L27/11521H01L29/66825
    • Embodiments of the present invention disclose a memory device having an array of flash memory cells with source contacts that facilitate straight word lines, and a method for producing the same. The array is comprised of a plurality of non-intersecting shallow trench isolation (STI) regions that isolate a plurality of memory cell columns. A source column is implanted with n-type dopants after the formation of a tunnel oxide layer and a first polysilicon layer. The implanted source column is coupled to a plurality of common source lines that are coupled to a plurality of source regions associated with memory cells in the array. A source contact is coupled to the implanted source column for providing electrical coupling with the plurality of source regions. The source contact is collinear with a row of drain contacts that are coupled to drain regions associated with a row of memory cells. The arrangement of source contacts collinear with the row of drain contacts allows for straight word line formation.
    • 本发明的实施例公开了一种存储器件,其具有具有促进直线字线的源极触点的闪存单元阵列及其制造方法。 阵列由隔离多个存储单元列的多个不相交的浅沟槽隔离(STI)区域组成。 在形成隧道氧化物层和第一多晶硅层之后,源极列注入n型掺杂剂。 植入的源极柱耦合到耦合到与阵列中的存储器单元相关联的多个源极区域的多个公共源极线。 源极触点耦合到植入源极柱,用于提供与多个源极区域的电耦合。 源触点与一排漏极触点共线,该排触点耦合到与一行存储器单元相关联的漏极区。 与漏极触点排共线的源触点的布置允许直线字线形成。
    • 93. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US07820509B2
    • 2010-10-26
    • US11785793
    • 2007-04-20
    • Hiroyuki OgawaHideyuki KojimaTaiji Ema
    • Hiroyuki OgawaHideyuki KojimaTaiji Ema
    • H01L29/94H01L21/336
    • H01L27/105H01L27/11526H01L27/11531H01L27/11548
    • The method of manufacturing a semiconductor device, including a first region where a transistor including a gate electrode of a stacked structure is formed, a second region where a transistor including a gate electrode of a single-layer structure is formed, and a third region positioned in a boundary part between the first region and the second region, includes: depositing a first conductive film, patterning the first conductive film in the first region and the third region so that the outer edge is positioned in the third region, depositing the second conductive film, patterning the second conductive film to form a control gate in the first region while leaving the second conductive film, covering the second region and having the inner edge positioned inner of the outer edge of the first conductive film, and patterning the second conductive film in the second region to form the gate electrode.
    • 制造半导体器件的方法包括形成包括层叠结构的栅电极的晶体管的第一区域,形成包括单层结构的栅电极的晶体管的第二区域和位于 在第一区域和第二区域之间的边界部分中包括:沉积第一导电膜,使第一区域和第三区域中的第一导电膜图形化,使得外边缘位于第三区域中,沉积第二导电膜 膜,图案化第二导电膜,以在离开第二导电膜的同时在第一区域中形成控制栅极,覆盖第二区域并且使内边缘位于第一导电膜的外边缘的内侧,并且使第二导电膜 在第二区域中形成栅电极。
    • 100. 发明申请
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US20070293029A1
    • 2007-12-20
    • US11594856
    • 2006-11-09
    • Hiroyuki OgawaHideyuki Kojima
    • Hiroyuki OgawaHideyuki Kojima
    • H01L21/8234
    • H01L21/823462H01L21/823857H01L27/105H01L27/1052H01L27/11526H01L27/11546
    • The method for fabricating the semiconductor device includes the steps of: forming an insulating film 20, a conductive film 22 and an insulating film 24 over a semiconductor substrate 10 having a first to a third region; removing an insulating film 24, the conductive film 22 and an insulating film 20 formed in the second region and the third region; forming an insulating film 38 in the second region and the third region; removing the insulating film 24 in the first region and the insulating film 38 in the third region; forming an insulating film 44 in the third region; after a conductive film 52 has been formed, patterning the conductive films 22, 52 in the first region to form a gate electrode 58; and patterning the conductive film 52 to form gate electrodes 62 in the second region and the third region while removing the conductive film 52 over the gate electrode 58.
    • 制造半导体器件的方法包括以下步骤:在具有第一至第三区域的半导体衬底10上形成绝缘膜20,导电膜22和绝缘膜24; 去除绝缘膜24,导电膜22和形成在第二区域和第三区域中的绝缘膜20; 在第二区域和第三区域中形成绝缘膜38; 去除第一区域中的绝缘膜24和第三区域中的绝缘膜38; 在第三区域中形成绝缘膜44; 在形成导电膜52之后,在第一区域中图案化导电膜22,52以形成栅电极58; 以及图案化导电膜52以在第二区域和第三区域中形成栅极电极62,同时在栅极电极58上移除导电膜52。