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1. 发明申请

US20090032844A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090032844A1
公开(公告)日：2009-02-05
申请号：US12181765
申请日：2008-07-29
申请人： Jusuke OGURA , Hikaru KOKURA , Hiroshi MORIOKA , Kazuo KAWAMURA
发明人： Jusuke OGURA , Hikaru KOKURA , Hiroshi MORIOKA , Kazuo KAWAMURA
IPC分类号： H01L29/778 , H01L21/336
CPC分类号： H01L21/823814 , H01L21/823807 , H01L21/823871 , H01L29/165 , H01L29/665 , H01L29/6659 , H01L29/66636 , H01L29/7833 , H01L29/7834 , H01L29/7848
摘要： A method of manufacturing a semiconductor device has forming a transistor including a source and a drain, forming a mixed crystal layer over the source and the drain, forming a silicide layer over the mixed crystal layer, forming a first insulating film and a second insulating film over the silicide layer, forming a contact hole, performing an oxygen plasma treatment, and forming a conductive plug in the contact hole.
摘要翻译：一种制造半导体器件的方法，其特征在于，形成包括源极和漏极的晶体管，在源极和漏极上形成混晶层，在混合晶体层上形成硅化物层，形成第一绝缘膜和第二绝缘膜在硅化物层上形成接触孔，进行氧等离子体处理，以及在接触孔中形成导电塞。

2. 发明授权

US07416988B2 Semiconductor device and fabrication process thereof 有权
标题翻译：半导体器件及其制造工艺
公开(公告)号：US07416988B2
公开(公告)日：2008-08-26
申请号：US10991498
申请日：2004-11-19
申请人： Hikaru Kokura
发明人： Hikaru Kokura
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/28518 , H01L21/31116 , H01L21/76814 , H01L29/665 , H01L29/66545 , H01L29/66636
摘要： A method of fabricating a semiconductor device includes the steps of modifying a damaged layer containing carbon and formed at a semiconductor surface by exposing the damaged layer to oxygen radicals to form a modified layer, and removing the modified layer by a wet etching process, wherein the modifying step is conducted by adding an active specie of an element that would obstruct formation of double bond between a Si atom and an oxygen atom by causing a chemical bond with Si atoms on the semiconductor surface.
摘要翻译：一种制造半导体器件的方法包括以下步骤：通过将损伤层暴露于氧自由基以形成改性层，并且通过湿法蚀刻工艺除去改性层，来修饰含碳的损伤层并形成在半导体表面，其中通过在半导体表面上引入与Si原子的化学键，添加阻碍Si原子和氧原子之间的双键形成的元素的活性物质进行改性。

3. 发明授权

US08741760B2 Method of manufacturing semiconductor device including first conductive pattern and second conductive pattern having top surface which decreases in height 有权
标题翻译：制造半导体器件的方法包括第一导电图案和具有高度降低的顶表面的第二导电图案
公开(公告)号：US08741760B2
公开(公告)日：2014-06-03
申请号：US13494728
申请日：2012-06-12
申请人： Hikaru Kokura
发明人： Hikaru Kokura
IPC分类号： H01L21/28
CPC分类号： H01L27/115 , H01L27/11521 , H01L29/66825
摘要： A semiconductor device has a semiconductor substrate, a plurality of first conductive patterns, a second conductive pattern having a top surface of which stepwisely or gradually decreases in height in a direction from a side facing the first conductive pattern toward an opposite side, a first insulation film formed over the plurality of first conductive patterns and the second conductive pattern, and a third conductive pattern formed over the first insulation film.
摘要翻译：半导体器件具有半导体衬底，多个第一导电图案，第二导电图案，其顶表面在从面向第一导电图案的一侧向相对侧的方向上高度逐渐或逐渐降低，第一绝缘层形成在所述多个第一导电图案和所述第二导电图案上的膜，以及形成在所述第一绝缘膜上的第三导电图案。

4. 发明申请

US20120258586A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120258586A1
公开(公告)日：2012-10-11
申请号：US13494728
申请日：2012-06-12
申请人： Hikaru Kokura
发明人： Hikaru Kokura
IPC分类号： H01L21/283
CPC分类号： H01L27/115 , H01L27/11521 , H01L29/66825
摘要： A semiconductor device has a semiconductor substrate, a plurality of first conductive patterns, a second conductive pattern having a top surface of which stepwisely or gradually decreases in height in a direction from a side facing the first conductive pattern toward an opposite side, a first insulation film formed over the plurality of first conductive patterns and the second conductive pattern, and a third conductive pattern formed over the first insulation film.
摘要翻译：半导体器件具有半导体衬底，多个第一导电图案，第二导电图案，其顶表面在从面向第一导电图案的一侧向相对侧的方向上高度逐渐或逐渐降低，第一绝缘层形成在所述多个第一导电图案和所述第二导电图案上的膜，以及形成在所述第一绝缘膜上的第三导电图案。

5. 发明申请

US20090215243A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090215243A1
公开(公告)日：2009-08-27
申请号：US12369859
申请日：2009-02-12
申请人： Jusuke Ogura , Hikaru Kokura , Hideyuki Kojima , Toru Anezaki , Hiroyuki Ogawa , Junichi Ariyoshi
发明人： Jusuke Ogura , Hikaru Kokura , Hideyuki Kojima , Toru Anezaki , Hiroyuki Ogawa , Junichi Ariyoshi
IPC分类号： H01L21/762
CPC分类号： H01L21/76224 , H01L21/823481 , H01L27/1052 , H01L27/11521
摘要： A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.
摘要翻译：制造半导体器件的方法包括在半导体衬底中形成限定有源区的隔离区，在半导体衬底上形成第一绝缘膜，形成第二绝缘膜，该第二绝缘膜具有与第一绝缘膜相同的蚀刻性能绝缘膜，通过使用基于碳氟化合物的蚀刻气体的干蚀刻从有源区域和隔离区域上的第一区域选择性地去除第二绝缘膜，通过在第一绝缘膜上暴露于第一绝缘膜上形成的残留膜含氧的气氛，通过湿式蚀刻从第一区域选择性地除去第一绝缘膜。

6. 发明申请

US20080274607A1 Semiconductor device and fabrication process thereof 审中-公开
公开(公告)号：US20080274607A1
公开(公告)日：2008-11-06
申请号：US12213759
申请日：2008-06-24
申请人： Hikaru Kokura
发明人： Hikaru Kokura
IPC分类号： H01L21/28
CPC分类号： H01L21/28518 , H01L21/31116 , H01L21/76814 , H01L29/665 , H01L29/66545 , H01L29/66636
摘要： A method of fabricating a semiconductor device includes the steps of modifying a damaged layer containing carbon and formed at a semiconductor surface by exposing the damaged layer to oxygen radicals to form a modified layer, and removing the modified layer by a wet etching process, wherein the modifying step is conducted by adding an active specie of an element that would obstruct formation of double bond between a Si atom and an oxygen atom by causing a chemical bond with Si atoms on the semiconductor surface.

7. 发明申请

US20120208342A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120208342A1
公开(公告)日：2012-08-16
申请号：US13455633
申请日：2012-04-25
申请人： Jusuke OGURA , Hikaru KOKURA , Hideyuki KOJIMA , Toru ANEZAKI , Hiroyuki OGAWA , Junichi ARIYOSHI
发明人： Jusuke OGURA , Hikaru KOKURA , Hideyuki KOJIMA , Toru ANEZAKI , Hiroyuki OGAWA , Junichi ARIYOSHI
IPC分类号： H01L21/76
CPC分类号： H01L21/76224 , H01L21/823481 , H01L27/1052 , H01L27/11521
摘要： A method of manufacturing a semiconductor device includes forming an isolation region defining an active region in a semiconductor substrate, forming a first insulating film over the semiconductor substrate, forming a second insulating film having etching properties different from those of the first insulating film over the first insulating film, selectively removing the second insulating film from a first region over the active region and the isolation region by dry etching using a fluorocarbon-based etching gas, removing a residual film formed by the dry etching over the first insulating film by exposure in an atmosphere containing oxygen, and selectively removing the first insulating film from the first region by wet etching.
摘要翻译：制造半导体器件的方法包括在半导体衬底中形成限定有源区的隔离区，在半导体衬底上形成第一绝缘膜，形成第二绝缘膜，该第二绝缘膜具有与第一绝缘膜相同的蚀刻性能绝缘膜，通过使用基于碳氟化合物的蚀刻气体的干蚀刻从有源区域和隔离区域上的第一区域选择性地去除第二绝缘膜，通过在第一绝缘膜上暴露于第一绝缘膜上形成的残留膜含氧的气氛，通过湿式蚀刻从第一区域选择性地除去第一绝缘膜。

8. 发明申请

US20090308536A1 METHOD AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE HAVING LESS VARIATION IN ELECTRICAL CHARACTERISTICS 有权
标题翻译：用于制造电气特性中较小变化的半导体器件的方法和系统
公开(公告)号：US20090308536A1
公开(公告)日：2009-12-17
申请号：US12545456
申请日：2009-08-21
申请人： Hikaru Kokura
发明人： Hikaru Kokura
IPC分类号： C23F1/08
CPC分类号： H01L29/6656 , H01L22/12 , H01L29/6659 , H01L29/7833
摘要： A system for manufacturing a semiconductor device that has a gate electrode and a pair of diffusion layers formed in a semiconductor substrate on sides of the gate electrode, the system including structure for forming an insulating film and a gate electrode on a semiconductor substrate, obtaining a thickness of an affected layer formed in a surface of the semiconductor substrate, forming a pair of diffusion layers by injecting an impurity element into the semiconductor substrate in areas flanking the gate electrodes based on a predetermined injection parameter, performing activating heat treatment based on a predetermined heat treatment parameter, and deriving the injection parameter or heat treatment parameter in response to the obtained thickness of the affected layer such that the diffusion layers are set to a predetermined sheet resistance.
摘要翻译：一种用于制造半导体器件的系统，该半导体器件具有在栅电极的侧面上形成在半导体衬底中的栅电极和一对扩散层，该系统包括用于在半导体衬底上形成绝缘膜和栅电极的结构，在半导体衬底的表面中形成的受影响层的厚度，通过基于预定的注入参数，在栅电极的侧面的区域中将杂质元素注入到半导体衬底中，形成一对扩散层，根据预定的注入参数进行活化热处理热处理参数，并且响应于获得的受影响层的厚度导出注入参数或热处理参数，使得扩散层被设定为预定的薄层电阻。

9. 发明申请

US20090108326A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090108326A1
公开(公告)日：2009-04-30
申请号：US12254230
申请日：2008-10-20
申请人： Hikaru KOKURA
发明人： Hikaru KOKURA
IPC分类号： H01L29/788 , H01L21/28
CPC分类号： H01L27/115 , H01L27/11521 , H01L29/66825
摘要： A semiconductor device has a semiconductor substrate, a plurality of first conductive patterns, a second conductive pattern having a top surface of which stepwisely or gradually decreases in height in a direction from a side facing the first conductive pattern toward an opposite side, a first insulation film formed over the plurality of first conductive patterns and the second conductive pattern, and a third conductive pattern formed over the first insulation film.
摘要翻译：半导体器件具有半导体衬底，多个第一导电图案，第二导电图案，其顶表面在从面向第一导电图案的一侧向相对侧的方向上高度逐渐或逐渐降低，第一绝缘层形成在所述多个第一导电图案和所述第二导电图案上的膜，以及形成在所述第一绝缘膜上的第三导电图案。

10. 发明申请

US20070026541A1 Method and system for manufacturing semiconductor device having less variation in electrical characteristics 有权
标题翻译：用于制造具有较小电特性变化的半导体器件的方法和系统
公开(公告)号：US20070026541A1
公开(公告)日：2007-02-01
申请号：US11245086
申请日：2005-10-07
申请人： Hikaru Kokura
发明人： Hikaru Kokura
IPC分类号： H01L21/66
CPC分类号： H01L29/6656 , H01L22/12 , H01L29/6659 , H01L29/7833
摘要： A method of manufacturing a semiconductor device, which has a gate electrode and a pair of diffusion layers formed in a semiconductor substrate on sides of the gate electrode, includes forming an insulating film and a gate electrode on a semiconductor substrate, obtaining a thickness of an affected layer formed in a surface of the semiconductor substrate, forming a pair of diffusion layers by injecting an impurity element into the semiconductor substrate in areas flanking the gate electrodes based on a predetermined injection parameter, performing activating heat treatment based on a predetermined heat treatment parameter, and a parameter deriving step provided between the obtaining step and the diffusion layer forming step, the parameter deriving step deriving the injection parameter or heat treatment parameter in response to the obtained thickness of the affected layer such that the diffusion layers are set to a predetermined sheet resistance.
摘要翻译：一种制造半导体器件的方法，该半导体器件在栅电极的侧面上形成有半导体衬底中的栅电极和一对扩散层，包括在半导体衬底上形成绝缘膜和栅电极，在半导体衬底的表面上形成的受影响层，通过基于预定的注入参数，在栅电极侧面的区域中将杂质元素注入到半导体衬底中，形成一对扩散层，基于预定的热处理参数进行活化热处理以及在所述获取步骤和所述扩散层形成步骤之间提供的参数导出步骤，所述参数导出步骤响应于所获得的所述受影响层的厚度导出所述注入参数或热处理参数，使得所述扩散层被设定为预定的薄片电阻。

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