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91. 发明申请

US20090033207A1 High Quantum Efficiency Silicon Nanoparticle Embedded SiOxNy Luminescence Device 失效
标题翻译：高量子硅纳米颗粒嵌入式SiOxNy发光器件
公开(公告)号：US20090033207A1
公开(公告)日：2009-02-05
申请号：US12249911
申请日：2008-10-11
申请人： Pooran Chandra Joshi , Jiandong Huang , Apostolos T. Voutsas
发明人： Pooran Chandra Joshi , Jiandong Huang , Apostolos T. Voutsas
IPC分类号： H01J1/63 , B05D5/12
CPC分类号： C23C16/308 , B82Y20/00 , C23C16/28 , C23C16/505 , H01L31/0352 , H01L31/035236
摘要： A method is provided for fabricating a high quantum efficiency silicon (Si) nanoparticle embedded SiOXNY film for luminescence (electroluminescence—EL and photoluminescence—PL) applications. The method provides a bottom electrode, and deposits a Si nanoparticle embedded non-stoichiometric SiOXNY film, where (X+Y 0), overlying the bottom electrode. The Si nanoparticle embedded SiOXNY film is annealed. The annealed Si nanoparticle embedded SiOXNY film has an extinction coefficient (k) of less than about 0.001 as measured at 632 nanometers (nm), and a PL quantum efficiency (PLQE) of greater than 20%.
摘要翻译：提供了一种用于制造用于发光（电致发光 - EL和光致发光 - PL）应用的高量子效率硅（Si）纳米颗粒嵌入的SiOXNY膜的方法。该方法提供底部电极，并沉积嵌入非化学计量的SiOXNY膜的Si纳米颗粒，其中（X + Y <2和Y> 0）覆盖在底部电极上。 Si纳米颗粒嵌入的SiOXNY膜退火。退火的Si纳米颗粒嵌入的SiOXNY膜具有在632纳米（nm）下测量的小于约0.001的消光系数（k），并且PL量子效率（PLQE）大于20％。

92. 发明申请

US20080305566A1 Silicon Nanocrystal Embedded Silicon Oxide Electroluminescence Device with a Mid-Bandgap Transition Layer 有权
标题翻译：具有中带隙过渡层的硅纳米晶体嵌入式硅氧化物电致发光器件
公开(公告)号：US20080305566A1
公开(公告)日：2008-12-11
申请号：US12197045
申请日：2008-08-22
申请人： Jiandong Huang , Pooran Chandra Joshi , Hao Zhang , Apostolos T. Voutsas
发明人： Jiandong Huang , Pooran Chandra Joshi , Hao Zhang , Apostolos T. Voutsas
IPC分类号： H01L21/00
CPC分类号： C23C16/30 , C23C16/24 , C23C16/401 , C23C16/505 , C23C16/56 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/02532 , H01L21/02601 , H01L21/0262 , H01L21/31608
摘要： A method is provided for forming a silicon (Si) nanocrystal embedded Si oxide electroluminescence (EL) device with a mid-bandgap transition layer. The method provides a highly doped Si bottom electrode, and forms a mid-bandgap electrically insulating dielectric film overlying the electrode. A Si nanocrystal embedded SiOx film layer is formed overlying the mid-bandgap electrically insulating dielectric film, where X is less than 2, and a transparent top electrode overlies the Si nanocrystal embedded SiOx film layer. The bandgap of the mid-bandgap dielectric film is about half that of the bandgap of the Si nanocrystal embedded SiOx film. In one aspect, the Si nanocrystal embedded SiOx film has a bandgap (Eg) of about 10 electronvolts (eV) and mid-bandgap electrically insulating dielectric film has a bandgap of about 5 eV. By dividing the high-energy tunneling processes into two lower energy tunneling steps, potential damage due to high power hot electrons is reduced.
摘要翻译：提供了一种用于形成具有中间带隙过渡层的硅（Si）纳米晶体嵌入式Si氧化物电致发光（EL）器件的方法。该方法提供高度掺杂的Si底部电极，并且形成覆盖电极的中带隙电绝缘膜。在其中X小于2的中间带隙绝缘电介质膜上形成Si纳米晶体嵌入的SiOx膜层，并且透明顶部电极覆盖在Si纳米晶体嵌入的SiOx膜层上。中间带隙电介质膜的带隙约为Si纳米晶体嵌入的SiOx膜的带隙的一半。在一个方面，Si纳米晶体嵌入的SiO x膜具有约10电子伏特（eV）的带隙（Eg），并且中带隙绝缘电介质膜具有约5eV的带隙。通过将高能隧道工艺分成两个较低能量的隧穿步骤，由于大功率热电子引起的潜在损害降低。

93. 发明申请

US20080272816A1 Inverter with Four-Transistor Schmitt Trigger 有权
标题翻译：具有四晶体管施密特触发器的逆变器
公开(公告)号：US20080272816A1
公开(公告)日：2008-11-06
申请号：US12142602
申请日：2008-06-19
申请人： Themistokles Afentakis , Apostolos T. Voutsas , Paul J. Schuele
发明人： Themistokles Afentakis , Apostolos T. Voutsas , Paul J. Schuele
IPC分类号： H03K3/00
CPC分类号： H03K3/3565 , H01L29/78624 , H01L29/78642 , H01L29/78648
摘要： A four-transistor Schmitt trigger inverter is provided. The Schmitt trigger inverter is made from an n-channel MOS (NMOS) dual-gate thin-film transistor (DG-TFT) and a p-channel MOS (PMOS) DG-TFT, both DG-TFTs having a top gate, a back gate, and source/drain regions. A (conventional) NMOS TFT has a gate connected to an NMOS DG-TFT first S/D region and a PMOS DG-TFT first S/D region. The NMOS TFT also has a first S/D region connected to the NMOS DG-TFT back gate and the PMOS DG-TFT back gate. A (conventional) PMOS TFT has a gate connected to the NMOS TFT gate, and a first S/D region connected to the NMOS TFT first S/D region.
摘要翻译：提供了一个四晶体管施密特触发器。施密特触发逆变器由n沟道MOS（NMOS）双栅极薄膜晶体管（DG-TFT）和p沟道MOS（PMOS）DG-TFT制成，两个DG-TFT都具有顶栅极，背栅极和源极/漏极区域。（常规）NMOS TFT具有连接到NMOS DG-TFT第一S / D区和PMOS DG-TFT第一S / D区的栅极。 NMOS TFT还具有连接到NMOS DG-TFT背栅和PMOS DG-TFT后栅的第一S / D区。（传统）PMOS TFT具有连接到NMOS TFT栅极的栅极和连接到NMOS TFT第一S / D区域的第一S / D区域。

94. 发明授权

US07407843B2 Four-transistor Schmitt trigger inverter 有权
标题翻译：四晶体管施密特触发器
公开(公告)号：US07407843B2
公开(公告)日：2008-08-05
申请号：US11408220
申请日：2006-04-20
申请人： Themistokles Afentakis , Apostolos T. Voutsas , Paul J. Schuele
发明人： Themistokles Afentakis , Apostolos T. Voutsas , Paul J. Schuele
IPC分类号： H01L21/00 , H01L29/76
CPC分类号： H03K3/3565 , H01L29/78624 , H01L29/78642 , H01L29/78648
摘要： A four-transistor Schmitt trigger inverter is provided. The Schmitt trigger inverter is made from an n-channel MOS (NMOS) dual-gate thin-film transistor (DG-TFT) and a p-channel MOS (PMOS) DG-TFT, both DG-TFTs having a top gate, a back gate, and source/drain regions. A (conventional) NMOS TFT has a gate connected to an NMOS DG-TFT first S/D region and a PMOS DG-TFT first S/D region. The NMOS TFT also has a first S/D region connected to the NMOS DG-TFT back gate and the PMOS DG-TFT back gate. A (conventional) PMOS TFT has a gate connected to the NMOS TFT gate, and a first S/D region connected to the NMOS TFT first S/D region.
摘要翻译：提供了一个四晶体管施密特触发器。施密特触发逆变器由n沟道MOS（NMOS）双栅极薄膜晶体管（DG-TFT）和p沟道MOS（PMOS）DG-TFT制成，两个DG-TFT都具有顶栅极，背栅极和源极/漏极区域。（常规）NMOS TFT具有连接到NMOS DG-TFT第一S / D区和PMOS DG-TFT第一S / D区的栅极。 NMOS TFT还具有连接到NMOS DG-TFT背栅和PMOS DG-TFT后栅的第一S / D区。（传统）PMOS TFT具有连接到NMOS TFT栅极的栅极和连接到NMOS TFT第一S / D区域的第一S / D区域。

95. 发明授权

US07381595B2 High-density plasma oxidation for enhanced gate oxide performance 有权
标题翻译：高密度等离子体氧化，提高栅极氧化性能
公开(公告)号：US07381595B2
公开(公告)日：2008-06-03
申请号：US11139726
申请日：2005-05-26
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/00
CPC分类号： H01L29/78642 , C23C16/24 , C23C16/45523 , C23C16/509 , H01L21/02164 , H01L21/0234 , H01L21/049 , H01L21/31612 , H01L29/66666 , H01L29/6675
摘要： A method is provided for forming a low-temperature vertical gate insulator in a vertical thin-film transistor (V-TFT) fabrication process. The method comprises: forming a gate, having vertical sidewalls and a top surface, overlying a substrate insulation layer; depositing a silicon oxide thin-film gate insulator overlying the gate; plasma oxidizing the gate insulator at a temperature of less than 400° C., using a high-density plasma source; forming a first source/drain region overlying the gate top surface; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall, in the gate insulator interposed between the first and second source/drain regions. When the silicon oxide thin-film gate insulator is deposited overlying the gate a Si oxide layer, a low temperature deposition process can be used, so that a step-coverage of greater than 65% can be obtained.
摘要翻译：提供一种用于在垂直薄膜晶体管（V-TFT）制造工艺中形成低温垂直栅极绝缘体的方法。该方法包括：形成具有垂直侧壁和顶表面的栅极，覆盖衬底绝缘层; 沉积覆盖栅极的氧化硅薄膜栅极绝缘体; 使用高密度等离子体源在低于400℃的温度下等离子体氧化栅极绝缘体; 形成覆盖所述栅极顶表面的第一源极/漏极区域; 在第一栅极侧壁附近形成覆盖衬底绝缘层的第二源极/漏极区域; 以及在位于第一和第二源极/漏极区之间的栅极绝缘体中形成覆盖第一栅极侧壁的沟道区。当氧化硅薄膜栅极绝缘体沉积在栅极上覆盖Si氧化物层时，可以使用低温沉积工艺，从而可以获得大于65％的阶梯覆盖率。

96. 发明授权

US07157737B2 Structures with seeded single-crystal domains 有权
标题翻译：具有种子单晶畴的结构
公开(公告)号：US07157737B2
公开(公告)日：2007-01-02
申请号：US11101741
申请日：2005-04-07
申请人： Apostolos T. Voutsas , John W. Hartzell
发明人： Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L29/04
CPC分类号： B82Y30/00 , C30B1/00 , C30B1/08 , C30B29/06
摘要： Single-crystal devices and a method for forming semiconductor film single-crystal domains are provided. The method comprises: forming a substrate, such as glass or Si; forming an insulator film overlying the substrate; forming a single-crystal seed overlying the substrate and insulator; forming an amorphous film overlying the seed; annealing the amorphous film; and, forming a single-crystal domain in the film responsive to the single-crystal seed. The annealing technique can be (conventional) laser annealing, a laser induced lateral growth (LiLAC) process, or conventional furnace annealing. In some aspects, forming a single-crystal seed includes forming a nanowire or a self assembled monolayer (SAM). For example, a Si nanowire can be formed having a crystallographic orientation of or . When, the seed has a crystallographic orientation, then an n-type TFT can be formed. Likewise, when a single-crystal seed has a crystallographic orientation, a p-type TFT can be formed.
摘要翻译：提供单晶器件和形成半导体膜单晶畴的方法。该方法包括：形成诸如玻璃或Si的衬底; 形成覆盖在基板上的绝缘膜; 形成覆盖衬底和绝缘体的单晶种子; 形成覆盖种子的无定形膜; 退火非晶膜; 并且响应于单晶种子在膜中形成单晶畴。退火技术可以是（常规）激光退火，激光诱导横向生长（LiLAC）工艺或常规炉退火。在一些方面，形成单晶种子包括形成纳米线或自组装单层（SAM）。例如，可以形成具有<110>或<100>的晶体取向的Si纳米线。当种子具有<100>晶体取向时，则可以形成n型TFT。同样，当单晶种子具有<110>结晶取向时，可以形成p型TFT。

97. 发明授权

US07122488B2 High density plasma process for the formation of silicon dioxide on silicon carbide substrates 有权
标题翻译：用于在碳化硅衬底上形成二氧化硅的高密度等离子体工艺
公开(公告)号：US07122488B2
公开(公告)日：2006-10-17
申请号：US10812591
申请日：2004-03-29
申请人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
发明人： Pooran Chandra Joshi , Apostolos T. Voutsas , John W. Hartzell
IPC分类号： H01L21/469 , H01L21/31
CPC分类号： H01L21/049 , C23C16/0272 , C23C16/402 , C23C16/509 , H01L21/02164 , H01L21/0223 , H01L21/02238 , H01L21/02252 , H01L21/02274 , H01L21/045 , H01L21/31612
摘要： Methods are provided for forming silicon dioxide (SiO2) on a silicon carbide (SiC) substrate. The method comprises: providing a SiC substrate; supplying an atmosphere including oxygen; performing a high-density (HD) plasma-based process; and, forming a SiO2 layer overlying the SiC substrate. Typically, performing the HD plasma-based process includes connecting a top electrode to an inductively coupled HD plasma source. In one aspect, SiO2 is grown on the SiC substrate. Then, an HD plasma oxidation process is performed that creates a reactive oxygen species and breaks the Si—C bonds in the SiC substrate, to form free Si and C atoms in the SiC substrate. The free Si atoms in the SiC substrate are bonded to the HD plasma-generated reactive oxygen species, and the SiO2 layer is grown.
摘要翻译：提供了在碳化硅（SiC）衬底上形成二氧化硅（SiO 2）的方法。该方法包括：提供SiC衬底; 提供包含氧气的气氛; 执行高密度（HD）等离子体工艺; 并且形成覆盖在SiC衬底上的SiO 2层。通常，执行基于HD等离子体的工艺包括将顶部电极连接到电感耦合的HD等离子体源。在一个方面，在SiC衬底上生长SiO 2。然后，进行HD等离子体氧化处理，其产生活性氧物质并破坏SiC衬底中的Si-C键，以在SiC衬底中形成游离的Si和C原子。 SiC衬底中的自由Si原子与HD等离子体产生的活性氧结合，并且生长SiO 2层。

98. 发明授权

US08404302B2 Solution process for fabricating a textured transparent conductive oxide (TCO) 失效
标题翻译：用于制造纹理透明导电氧化物（TCO）的溶液工艺
公开(公告)号：US08404302B2
公开(公告)日：2013-03-26
申请号：US12836300
申请日：2010-07-14
申请人： Jer-shen Maa , Gregory S. Herman , Apostolos T. Voutsas
发明人： Jer-shen Maa , Gregory S. Herman , Apostolos T. Voutsas
IPC分类号： B05D3/02 , B05D5/06 , B05D5/12 , H05H1/00
CPC分类号： H01L31/0236 , H01L31/1884 , Y02E10/50 , Y10T428/24413
摘要： A solution process is provided for forming a textured transparent conductive oxide (TCO) film. The process provides a substrate, and forms a first layer on the substrate of metal oxide nanoparticles such as ZnO, In2O3, or SnO2. The metal oxide nanoparticles have a faceted structure with an average size greater than 100 nanometers (nm). Voids between the metal oxide nanoparticles have a size about equal to the size of the metal oxide nanoparticles. Then, a second layer is formed overlaying the first layer, filling the voids between the nanoparticles of the first layer, and completely covering the substrate. The result is a continuous TCO film having an average surface roughness that is created by the combination of first and second layers.
摘要翻译：提供了一种用于形成织构化的透明导电氧化物（TCO）膜的溶液方法。该方法提供了一种衬底，并在诸如ZnO，In 2 O 3或SnO 2的金属氧化物纳米颗粒的衬底上形成第一层。金属氧化物纳米颗粒具有平均尺寸大于100纳米（nm）的刻面结构。金属氧化物纳米颗粒之间的空隙的尺寸大约等于金属氧化物纳米颗粒的尺寸。然后，形成覆盖第一层的第二层，填充第一层的纳米颗粒之间的空隙，并完全覆盖基底。结果是具有由第一层和第二层的组合产生的平均表面粗糙度的连续的TCO膜。

99. 发明授权

US08314015B2 Silicon surface modification for the electrochemical synthesis of silicon particles in suspension 失效
标题翻译：硅表面改性用于电化学合成硅颗粒悬浮液
公开(公告)号：US08314015B2
公开(公告)日：2012-11-20
申请号：US12836030
申请日：2010-07-14
申请人： Chang-Ching Tu , Liang Tang , Apostolos T. Voutsas
发明人： Chang-Ching Tu , Liang Tang , Apostolos T. Voutsas
IPC分类号： H01L21/20
CPC分类号： H01L21/02422 , C23C24/00 , C23C26/02 , C25F3/12 , H01L21/02532 , H01L21/02601 , H01L21/02628
摘要： A process of silicon (Si) surface modification is provided for the electrochemical synthesis of Si particles in suspension. The process begins with a Si first substrate with a surface, and forms Si particles attached to the surface. Hydrogen-terminated Si particles are created and the first substrate is immersed in a hexane/1-octene (1/1 volume ratio) solution with a catalytic amount of chloroplatinic acid (H2PtCl6). 1-octene is bonded with the hydrogen-terminated Si particles, creating modified Si particles, with octane capping ligands, attached to the substrate surface. The first substrate is then exposed to ultrasonication, separating the modified Si particles from the first substrate. After removing the first substrate, a suspension is created of modified Si particles suspended in excess hexane/1-octene.
摘要翻译：提供硅（Si）表面改性的方法用于悬浮液中的Si颗粒的电化学合成。该方法开始于具有表面的Si第一衬底，并且形成附着在表面上的Si颗粒。产生氢终止的Si颗粒，并将第一衬底浸入具有催化量的氯铂酸（H 2 PtCl 6）的己烷/ 1-辛烯（1/1体积比））溶液中。 1-辛烯与氢封端的Si颗粒结合，产生改性的Si颗粒，与辛基封端配体连接在基材表面上。然后将第一衬底暴露于超声波处理，将改性的Si颗粒与第一衬底分离。在除去第一衬底之后，产生悬浮在过量己烷/ 1-辛烯中的改性Si颗粒的悬浮液。

100. 发明申请

US20120274231A1 Colloidal Silicon Quantum Dot Visible Spectrum Light-Emitting Diode 审中-公开
标题翻译：胶体硅量子点可见光发光二极管
公开(公告)号：US20120274231A1
公开(公告)日：2012-11-01
申请号：US13094262
申请日：2011-04-26
申请人： Chang-Ching Tu , Liang Tang , Jiandong Huang , Apostolos T. Voutsas
发明人： Chang-Ching Tu , Liang Tang , Jiandong Huang , Apostolos T. Voutsas
IPC分类号： H05B37/02 , H01L51/54 , H01L51/56
CPC分类号： H01L51/502 , C23C18/1216 , C23C18/1254 , H01L51/5234
摘要： A method is provided for fabricating a colloidal silicon quantum dot (SiQD) visible spectrum light-emitting diode (LED). The method begins with a transparent first electrode, and a hole-injection layer is formed overlying the first electrode. A hole-transport layer is formed overlying the hole-injection layer, and a SiQD layer overlies the hole-transport layer, where each SiQD has a diameter of less than about 6 nanometers (nm). An electron-transport layer is formed overlying the SiQD layer, and a second electrode is formed overlying the electron-transport layer.
摘要翻译：提供了一种用于制造胶体硅量子点（SiQD）可见光谱发光二极管（LED）的方法。该方法由透明的第一电极开始，并且形成覆盖第一电极的空穴注入层。空穴传输层形成在空穴注入层之上，SiQD层覆盖空穴传输层，其中每个SiQD的直径小于约6纳米（nm）。形成覆盖SiQD层的电子传输层，并且形成覆盖电子传输层的第二电极。

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