专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

91. 发明授权

US5583060A Method for manufacturing field effect controlled semiconductor components 失效
标题翻译：制造场效应控制半导体元件的方法
公开(公告)号：US5583060A
公开(公告)日：1996-12-10
申请号：US552702
申请日：1995-11-03
申请人： Helmut Hertrich , Helmut Strack , Jenoe Tihanyi
发明人： Helmut Hertrich , Helmut Strack , Jenoe Tihanyi
IPC分类号： H01L21/331 , H01L21/336 , H01L29/10 , H01L29/739 , H01L29/78 , H01L21/8224 , H01L21/8234
CPC分类号： H01L29/7802 , H01L29/1095 , H01L29/6634 , H01L29/66348 , H01L29/7396 , H01L29/7397 , H01L29/7813 , H01L29/41766 , Y10S148/126
摘要： The base zones of MOSFETs and IGBTs are generated by implanting dopants of the second conductivity type into the surface of a first layer of the first conductivity type, and a second layer of the first conductivity type is deposited thereon. During the deposition, the dopants diffuse up to the surface of the second layer and form base zones. The base zones are thereby provided with a laterally expanded region of high conductivity under the surface through which the minority carriers can flow off to the source electrode with low voltage drop.
摘要翻译： MOSFET和IGBT的基极区通过将第二导电类型的掺杂剂注入第一导电类型的第一层的表面中而沉积第一导电类型的第二层来产生。在沉积期间，掺杂剂扩散到第二层的表面并形成基区。因此，基部区域在其表面下设置有高度导电性的横向扩张区域，少数载流子可以通过该横向膨胀区域以低电压降流到源电极。

92. 发明授权

US5302537A Manufacturing method for a low voltage power MISFET utilizing only three masks 失效
标题翻译：仅使用三个掩模的低电压功率MISFET的制造方法
公开(公告)号：US5302537A
公开(公告)日：1994-04-12
申请号：US976189
申请日：1992-11-13
申请人： Helmut Strack
发明人： Helmut Strack
IPC分类号： H01L29/78 , H01L21/336 , H01L29/06 , H01L29/40 , H01L21/265
CPC分类号： H01L29/405 , H01L23/3171 , H01L29/66727 , H01L29/7811 , H01L29/0638 , H01L29/402 , H01L29/42376 , H01L2924/0002 , Y10S148/126 , Y10S438/958
摘要： A manufacturing method for a low-voltage power MISFET which utilizes only three masks (photosteps). In the first step, a polysilicon layer (3) is structured and a cell field and edge zones are produced. An oxide layer (2) is then applied, this being opened in the second photostep above the cells and the edge zones and between the edge (4) and the cells. A metal layer is then applied, this being interrupted between the cells and the edge (4) with the third photostep. Field plates and a channel stopper (9) are thus produced. As last step, a weakly conductive layer (20) is applied onto the entire surface.
摘要翻译：一种低电压功率MISFET的制造方法，仅使用三个掩模（光步）。在第一步骤中，构造多晶硅层（3）并产生单元区域和边缘区域。然后施加氧化物层（2），其在细胞和边缘区域之上以及边缘（4）和细胞之间的第二光步中打开。然后施加金属层，这在金属层和边缘（4）之间被第三次照相中断。因此制造了场板和通道挡块（9）。作为最后一步，将弱导电层（20）施加到整个表面上。

93. 发明授权

US4079406A Thyristor having a plurality of emitter shorts in defined spacial relationship 失效
标题翻译：晶闸管具有多个限定空间关系的发射极短路
公开(公告)号：US4079406A
公开(公告)日：1978-03-14
申请号：US749171
申请日：1976-12-09
申请人： Joachim Burtscher , Helmut Strack
发明人： Joachim Burtscher , Helmut Strack
IPC分类号： H01L29/08 , H01L29/74
CPC分类号： H01L29/0839
摘要： A thyristor device is provided with a shorted emitter structure in which the shorts are circularly formed zones of the base zone which extend through the emitter zone into electrical contact with the emitter electrode. Each of these zones is circular in cross-section and of a diameter which is less than 20.mu.m. These zones have a spacing from each other from center to center which is such that the ratio of this spacing to the diameter of a circular area is greater than 3.
摘要翻译：晶闸管器件具有短路发射极结构，其中短路是穿过发射极区延伸穿过发射极电极的基极区的圆形区域。这些区域中的每个区域的横截面为圆形，直径小于20μm。这些区域具有从中心到中心彼此间隔的距离，使得该间隔与圆形区域的直径之比大于3。

94. 发明授权

US07772693B2 Panel, semiconductor device and method for the production thereof 有权
标题翻译：面板，半导体器件及其制造方法
公开(公告)号：US07772693B2
公开(公告)日：2010-08-10
申请号：US11677774
申请日：2007-02-22
申请人： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
发明人： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
IPC分类号： H01L23/34
CPC分类号： H01L23/552 , H01L23/3114 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/82 , H01L24/97 , H01L2224/05001 , H01L2224/05022 , H01L2224/05147 , H01L2224/05572 , H01L2224/05647 , H01L2224/16225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/12041 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , H01L2924/19107 , H01L2924/3025 , H01L2224/82 , H01L2924/00 , H01L2224/45099
摘要： A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.
摘要翻译：面板具有具有上部第一金属层和多个垂直半导体部件的基板。每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。半导体部件的第二面分别安装在基板的金属层上。半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。第二金属层布置在半导体部件之间的分离区域中。

95. 发明申请

US20090261468A1 SEMICONDUCTOR MODULE 有权
标题翻译：半导体模块
公开(公告)号：US20090261468A1
公开(公告)日：2009-10-22
申请号：US12105837
申请日：2008-04-18
申请人： Werner Kroeninger , Josef Schwaiger , Ludwig Schneider , Ottmar Geitner , Markus Brunnbauer , Thorsten Meyer , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Xaver Schloegel
发明人： Werner Kroeninger , Josef Schwaiger , Ludwig Schneider , Ottmar Geitner , Markus Brunnbauer , Thorsten Meyer , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Xaver Schloegel
IPC分类号： H01L21/50 , H01L23/00
CPC分类号： H01L21/568 , H01L21/6835 , H01L23/3107 , H01L24/25 , H01L24/82 , H01L24/96 , H01L24/97 , H01L25/072 , H01L2221/68345 , H01L2224/04105 , H01L2224/06181 , H01L2224/12105 , H01L2224/2518 , H01L2224/32245 , H01L2224/73153 , H01L2224/73267 , H01L2224/76155 , H01L2224/82039 , H01L2224/82047 , H01L2224/82102 , H01L2224/92244 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01068 , H01L2924/01072 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/15787 , H01L2924/181 , H01L2924/3511 , H01L2224/82 , H01L2924/00
摘要： A semiconductor module. One embodiment provides at least two semiconductor chips placed on a carrier. The at least two semiconductor chips are then covered with a molding material to form a molded body. The molded body is thinned until the at least two semiconductor chips are exposed. Then, the carrier is removed from the at least two semiconductor chips. The at least two semiconductor chips are singulated.
摘要翻译：半导体模块。一个实施例提供放置在载体上的至少两个半导体芯片。然后将至少两个半导体芯片用模制材料覆盖以形成模制体。成型体变薄，直到暴露出至少两个半导体芯片。然后，从至少两个半导体芯片移除载体。将至少两个半导体芯片分割。

96. 发明申请

US20080191359A1 Panel, semiconductor device and method for the production thereof 有权
标题翻译：面板，半导体器件及其制造方法
公开(公告)号：US20080191359A1
公开(公告)日：2008-08-14
申请号：US11677774
申请日：2007-02-22
申请人： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
发明人： Adolf Koller , Horst Theuss , Ralf Otremba , Josef Hoeglauer , Helmut Strack , Reinhard Ploss
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L23/552 , H01L23/3114 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/82 , H01L24/97 , H01L2224/05001 , H01L2224/05022 , H01L2224/05147 , H01L2224/05572 , H01L2224/05647 , H01L2224/16225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/92244 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/12041 , H01L2924/12044 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/15787 , H01L2924/19107 , H01L2924/3025 , H01L2224/82 , H01L2924/00 , H01L2224/45099
摘要： A panel has a baseplate with an upper first metallic layer and a multiplicity of a vertical semiconductor components. The vertical semiconductor components in each case have a first side with a first load electrode and a control electrode and an opposite second side with a second load electrode. The second side of the semiconductor components is in each case mounted on the metallic layer of the baseplate. The semiconductor components are arranged in such a way that edge sides of adjacent semiconductor components are separated from one another. A second metallic layer is arranged in separating regions between the semiconductor components.
摘要翻译：面板具有具有上部第一金属层和多个垂直半导体部件的基板。每种情况下的垂直半导体部件具有第一侧，其具有第一负载电极和控制电极，而第二侧具有第二负载电极。半导体部件的第二面分别安装在基板的金属层上。半导体部件被配置成使得相邻的半导体部件的边缘彼此分离。第二金属层布置在半导体部件之间的分离区域中。

97. 发明申请

US20070099373A1 Method for manufacturing an integrated semiconductor transistor device with parasitic bipolar transistor 有权
标题翻译：用于制造具有寄生双极晶体管的集成半导体晶体管器件的方法
公开(公告)号：US20070099373A1
公开(公告)日：2007-05-03
申请号：US11638612
申请日：2006-12-13
申请人： Franz Hirler , Helmut Strack
发明人： Franz Hirler , Helmut Strack
IPC分类号： H01L21/8238
CPC分类号： H01L29/7802 , H01L29/0847 , H01L29/086 , H01L29/1604 , H01L29/165 , H01L29/41766 , H01L29/7813
摘要： To attain a comparatively high breakdown voltage at a high avalanche strength and with the physical size simultaneously being as small as possible, the invention proposes constructing a transistor device in a semiconductor material region in which a first source/drain region is used as a source region and in which the source region has a comparatively reduced surface charge or surface charge density.
摘要翻译：为了在高雪崩强度下获得相当高的击穿电压并且物理尺寸同时尽可能小，本发明提出在其中使用第一源极/漏极区域作为源极区域的半导体材料区域中构造晶体管器件并且其中源区具有相对减小的表面电荷或表面电荷密度。

98. 发明授权

US06309974B1 Method for eliminating residual oxygen impurities from silicon wafers pulled from a crucible 有权
标题翻译：消除从坩埚中拉出的硅晶片残余氧杂质的方法
公开(公告)号：US06309974B1
公开(公告)日：2001-10-30
申请号：US09156732
申请日：1998-09-17
申请人： Helmut Strack , Jens-Peer Stengl
发明人： Helmut Strack , Jens-Peer Stengl
IPC分类号： H01L21311
CPC分类号： C30B29/06 , C30B33/00 , H01L21/3221 , H01L21/3225
摘要： Residual oxygen impurities are eliminated from silicon wafers pulled from a crucible (Czochralski silicon). A multitude of trenches are etched into the back side of the crucible-pulled silicon wafer and the wafer is subsequently heat-treated at about 1100° C. The very large surface area at the front side of the silicon wafer allows oxygen impurities to diffuse out effectively. After the diffusion has been carried out, the trenches are filled with heavily doped polysilicon without leaving gaps.
摘要翻译：残留的氧杂质从从坩埚（Czochralski硅）中拉出的硅晶片中消除。大量的沟槽被蚀刻到坩埚拉硅晶片的背面，然后在约1100℃下对晶片进行热处理。硅晶片正面的非常大的表面积允许氧杂质扩散出有效。在扩散实施之后，沟槽被重掺杂的多晶硅填充而不留下间隙。

99. 发明授权

US06248620B1 Method for fabricating a field effect-controlled semiconductor component 失效
标题翻译：用于制造场效应控制半导体部件的方法
公开(公告)号：US06248620B1
公开(公告)日：2001-06-19
申请号：US09491095
申请日：2000-01-24
申请人： Helmut Strack , Helmut Gassel , Joost Larik
发明人： Helmut Strack , Helmut Gassel , Joost Larik
IPC分类号： H01L218238
CPC分类号： H01L29/7802 , H01L29/1095 , H01L29/41766 , H01L29/42376
摘要： A method for fabricating field effect-controlled semiconductor components, such as e.g. but not exclusively MIS power transistors. The field effect-controllable semiconductor component has a semiconductor substrate of a first conductivity type and a gate insulator layer on the surface of the semiconductor substrate. A well of a second conductivity type is produced in the semiconductor substrate by implanting first impurity atoms. A semiconductor layer having a first predetermined thickness is produced on the gate insulator layer prior to the production of the well. The semiconductor layer is reduced in a predtdermined region to obtain a residual layer having a second predetermined thickness, such that the semiconductor layer acts as an implantation barrier outside the predetermined region when the well is produced.
摘要翻译：一种用于制造场效应控制半导体部件的方法，例如，但不是唯一的MIS功率晶体管。场效应可控半导体元件在半导体衬底的表面上具有第一导电类型的半导体衬底和栅极绝缘体层。通过注入第一杂质原子在半导体衬底中产生第二导电类型的阱。在生产井之前，在栅极绝缘体层上产生具有第一预定厚度的半导体层。半导体层在预制区域中被还原以获得具有第二预定厚度的残余层，使得当制造阱时，半导体层用作预定区域外的注入势垒。

100. 发明授权

US4760432A Thyristor having controllable emitter-base shorts 失效
标题翻译：晶闸管具有可控制的发射极 - 基极短路
公开(公告)号：US4760432A
公开(公告)日：1988-07-26
申请号：US923867
申请日：1986-10-28
申请人： Michael Stoisiek , Horst Schmid , Helmut Strack
发明人： Michael Stoisiek , Horst Schmid , Helmut Strack
IPC分类号： H01L29/74 , H01L29/745 , H01L29/749
CPC分类号： H01L29/7408 , H01L29/7455
摘要： A thyristor having a pnpn semiconductor body comprising MISFET structures 9 and 12 through 16 which serve as controllable emitter base shorts formed at the edge side relative to one of the emitter layers and each of the structures is composed of a semiconductor region 9 inserted into the emitter layer which is contacted by an electrode 6 for the emitter layer 1 and also includes a subregion 12 of the adjacent base layer 2 and of an intervening channel region 13 which is formed of an edge zone of the emitter layer 1 and is also composed of a gate covering the channel region in an insulated manner. The gate also convers the subregion 12 of the base layer 2 and forms a MIS capacitor C1. A voltage generator 23 drives the gate 15 with a voltage which alternates between first and second values. At the change from the first voltage value which lies below the threshold value of the channel region 13 to the second voltage level which is close to the threshold voltage of the subregion 12 of the base layer, the thyristor ignites due to the shift in current of the MIS capacitor C1 which serves as the ignition current and, thus, when the change from the second to the first voltage occurs, the thyristor is quenched.
摘要翻译：具有pnpn半导体本体的晶闸管包括MISFET结构9和12至16，其用作可控发射极基极短路，其形成在相对于一个发射极层的边缘侧，并且每个结构由插入发射极的半导体区域9 层，其由发射极层1的电极6接触，并且还包括相邻基极层2的子区域12和由发射极层1的边缘区域形成的中间沟道区域13，并且还由栅极以绝缘方式覆盖沟道区域。门也对基层2的子区域12进行通信，形成MIS电容器C1。电压发生器23以在第一和第二值之间交替的电压驱动门15。在从低于通道区域13的阈值的第一电压值变化到接近于基极层子区域12的阈值电压的第二电压电平的情况下，晶闸管由于电流的偏移而点燃用作点火电流的MIS电容器C1，因此当从第二电压到第一电压的变化发生时，晶闸管被淬火。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式