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    • 1. 发明授权
    • Semiconductor device testing system
    • 半导体器件测试系统
    • US06507801B1
    • 2003-01-14
    • US09697026
    • 2000-10-25
    • Se-Jang OhKi-Sang KangJeong-Ho Bang
    • Se-Jang OhKi-Sang KangJeong-Ho Bang
    • G06F300
    • G01R31/31707G01R31/3183G01R31/318371
    • The present invention relates to a semiconductor device testing system having an advanced testing capability for performing tests on a semiconductor device. A system frame includes both normal and high-speed testing formatters, and a test head is arranged in electrical communication with the system frame. Normal PIN drivers are included to operate the testing system at a first frequency to transmit the signals required to perform tests at a normal speed. High-speed PIN drivers are also included to operate the testing system at a second frequency, higher than the first frequency, to transmit the signals required to perform tests at a higher speed. In this manner, the testing system of this invention is able-to achieve superior testing performance while reducing the overall system production cost.
    • 本发明涉及具有用于对半导体器件进行测试的先进测试能力的半导体器件测试系统。 系统框架包括正常和高速测试格式化程序,测试头与系统框架电气通信。 包括正常PIN驱动程序,以第一频率操作测试系统,以正常速度传输执行测试所需的信号。 还包括高速PIN驱动程序,以高于第一个频率的第二个频率操作测试系统,以更高速度传输执行测试所需的信号。 以这种方式,本发明的测试系统能够在降低整个系统生产成本的同时实现优异的测试性能。
    • 2. 发明授权
    • Tester of semiconductor memory device and test method thereof
    • 半导体存储器件测试仪及其测试方法
    • US06625766B1
    • 2003-09-23
    • US09512158
    • 2000-02-24
    • Se-Jang OhKi-Sang Kang
    • Se-Jang OhKi-Sang Kang
    • G11C2900
    • G11C29/20G11C2029/0405
    • A test method of a tester of a semiconductor memory device which includes recording a test pattern into the semiconductor memory device, reading the recorded test pattern to compare with a expected pattern, detecting information on a defect of the semiconductor memory device with a result of the comparison and interpreting the information on the defect of the semiconductor memory device, the method comprising the steps of: setting up minimum and maximum values relevant to a desired capacity of the semiconductor memory device to be tested; counting up from the preset minimum to the preset maximum values; generating a carry signal by comparing the preset maximum value with the counted value when the counted value gets to the preset maximum value; and resetting a value to be counted if the carry signal is generated, to thereby generate addresses of the semiconductor memory device, and a tester of the semiconductor memory device comprising: minimum and maximum address registering means for saving minimum and maximum address values relevant to a desired capacity of the semiconductor memory device to be tested; address counting means for increasingly counting from the minimum value to generate addresses; and carry signal generating means for generating carry signals, if the addresses output from the address counting means and a signal output from the maximum address registering means are the same, to thereby reset the address counting means, so that a user of the tester does not have to make a new test program, providing convenience in performing a test and improving reliability in results of the test.
    • 一种半导体存储器件的测试器的测试方法,包括将测试图案记录到半导体存储器件中,读取记录的测试图案以与预期图案进行比较,检测关于半导体存储器件的缺陷的信息,结果是 比较和解释关于半导体存储器件的缺陷的信息,该方法包括以下步骤:设置与要测试的半导体存储器件的期望容量相关的最小值和最大值; 从预设最小值到预设最大值; 当计数值达到预设最大值时,通过将预设最大值与计数值进行比较来产生进位信号; 并且如果产生进位信号,则重置要计数的值,从而生成半导体存储器件的地址,以及半导体存储器件的测试器,包括:最小和最大地址寄存装置,用于保存与a相关的最小和最大地址值 要测试的半导体存储器件的期望容量; 地址计数装置,用于从最小值逐渐计数以产生地址; 以及用于产生进位信号的进位信号产生装置,如果从地址计数装置输出的地址和从最大地址登记装置输出的信号相同,从而复位地址计数装置,使得测试仪的用户不 必须制定一个新的测试程序,提供方便的测试和提高测试结果的可靠性。
    • 4. 发明申请
    • Interposer and probe card having the same
    • 内插器和探针卡具有相同的功能
    • US20090102500A1
    • 2009-04-23
    • US12285962
    • 2008-10-17
    • Young-Soo AnSang-Hoon LeeSe-Jang Oh
    • Young-Soo AnSang-Hoon LeeSe-Jang Oh
    • G01R31/26H01R12/00
    • G01R31/2889H01R12/714
    • An interposer may include a first base, at least one first signal line in the first base, and at least one first ground line in the first base, wherein the ground line surrounds the at least one first signal line. The at least one first signal line and the at least one first ground line may be exposed through an upper surface of the first base. The at least one first signal line may be configured to conduct a test current through the first base. An interposer may also include a second base below the first base and may include a printed circuit board between the first base and the second base. A probe card may include a multilayer substrate having at least one contact needle, a coaxial board having at least one coaxial signal cable and the above described interposer between the multilayer substrate and the coaxial board.
    • 插入器可以包括第一基极,第一基极中的至少一个第一信号线和第一基极中的至少一个第一接地线,其中接地线包围至少一个第一信号线。 所述至少一个第一信号线和所述至少一个第一接地线可以通过所述第一基座的上表面暴露。 所述至少一个第一信号线可以被配置为进行穿过所述第一基座的测试电流。 插入器还可以包括位于第一基座下方的第二基座,并且可以包括在第一基座和第二基座之间的印刷电路板。 探针卡可以包括具有至少一个接触针的多层衬底,具有至少一个同轴信号电缆的同轴板以及多层衬底和同轴板之间的上述插入器。