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1. 发明授权

US09349694B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09349694B2
公开(公告)日：2016-05-24
申请号：US14474053
申请日：2014-08-29
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Katsunori Shibuya , Soichi Homma , Yuusuke Takano , Shinpei Ishida
IPC分类号： H01L21/00 , H01L23/552 , H01L21/78 , H01L25/00 , H01L25/065 , H01L23/00 , H01L23/31 , H01L21/56
CPC分类号： H01L23/552 , H01L21/561 , H01L21/78 , H01L23/3121 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L2224/32145 , H01L2224/32225 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/73265 , H01L2224/92247 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： According to one embodiment, a semiconductor device includes a substrate. A semiconductor chip is disposed on a first surface of the substrate. The semiconductor chip is covered with a sealing material. A front surface and a side surface of the sealing material are covered with a conductive film. On an outer edge of a substrate-side of the semiconductor device, a step or a trench is formed.
摘要翻译：根据一个实施例，半导体器件包括衬底。半导体芯片设置在基板的第一表面上。半导体芯片被密封材料覆盖。密封材料的前表面和侧表面被导电膜覆盖。在半导体器件的衬底侧的外边缘上形成台阶或沟槽。

2. 发明申请

US20150167157A1 SEMICONDUCTOR MANUFACTURING DEVICE AND SEMICONDUCTOR MANUFACTURING METHOD 有权
标题翻译：半导体制造设备和半导体制造方法
公开(公告)号：US20150167157A1
公开(公告)日：2015-06-18
申请号：US14482489
申请日：2014-09-10
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Katsunori Shibuya , Takashi Imoto , Soichi Homma , Takeshi Watanabe , Yuusuke Takano
IPC分类号： C23C14/50 , C23C14/54 , H01L21/66 , H01L21/67 , H01L21/48 , C23C14/34 , H01L23/552
CPC分类号： H01L21/67265 , C23C14/54 , C23C14/56 , H01L21/67259 , H01L21/67288 , H01L23/552 , H01L2924/0002 , H01L2924/14 , H01L2924/00
摘要： A semiconductor manufacturing device has an upper cover configured to be arranged above top surface of unshielded semiconductor device which are mounted on a tray placed on a carrier to go through electromagnetic shielding, and a displacement detector configured to detect an abnormality when the upper cover is raised by at least one of the semiconductor device which is brought into contact with a bottom surface of the upper cover.
摘要翻译：半导体制造装置具有上盖，其被配置为布置在非屏蔽半导体器件的上表面上方，该顶盖安装在放置在载体上的托盘上以穿过电磁屏蔽;以及位移检测器，其构造成当上盖升高时检测异常通过与上盖的底面接触的半导体器件中的至少一个。

3. 发明授权

US09236329B2 Semiconductor memory card 有权
标题翻译：半导体存储卡
公开(公告)号：US09236329B2
公开(公告)日：2016-01-12
申请号：US13786035
申请日：2013-03-05
申请人： Kabushiki Kaisha Toshiba
发明人： Kazuhide Doi , Soichi Homma , Katsuyoshi Watanabe , Taku Nishiyama , Takeshi Ikuta , Naohisa Okumura
IPC分类号： H01L23/495 , H01L23/00 , H01L21/02 , H01L23/31 , G06K19/077
CPC分类号： H01L23/495 , G06K19/07732 , H01L21/0201 , H01L23/3107 , H01L23/49551 , H01L23/49558 , H01L23/49575 , H01L23/49589 , H01L24/05 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/80 , H01L2224/02166 , H01L2224/04042 , H01L2224/05624 , H01L2224/05644 , H01L2224/05664 , H01L2224/451 , H01L2224/48091 , H01L2224/4813 , H01L2224/48137 , H01L2224/48247 , H01L2224/48463 , H01L2224/48465 , H01L2924/12042 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19105 , H01L2924/19107 , H01L2924/00014 , H01L2924/01029 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor memory card includes a lead frame having external connection terminals, a controller chip mounted on the lead frame and a memory chip mounted on the lead frame. The lead frame, the controller chip, and the memory chip are sealed with a sealing resin layer that has a surface at which the external connection terminals are exposed and a recess surrounding the external connection terminals.
摘要翻译：半导体存储卡包括具有外部连接端子的引线框架，安装在引线框架上的控制器芯片和安装在引线框架上的存储器芯片。引线框架，控制器芯片和存储器芯片由具有外部连接端子露出的表面的密封树脂层和围绕外部连接端子的凹部密封。

4. 发明授权

US09646908B2 Method for manufacturing semiconductor device and semiconductor device 有权
公开(公告)号：US09646908B2
公开(公告)日：2017-05-09
申请号：US15217599
申请日：2016-07-22
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Soichi Homma , Masaya Shima , Yuusuke Takano , Takeshi Watanabe , Katsunori Shibuya
IPC分类号： H01L23/28 , H01L23/31 , H01L23/495 , H01L25/065 , H01L21/48 , H01L21/56 , H01L21/78 , H01L21/52
CPC分类号： H01L23/3142 , H01L21/4828 , H01L21/52 , H01L21/565 , H01L21/78 , H01L23/295 , H01L23/3121 , H01L23/49541 , H01L23/49575 , H01L25/0657 , H01L2224/32145 , H01L2224/48145 , H01L2224/48147 , H01L2224/73265 , H01L2225/06527 , H01L2225/06555 , H01L2225/06572 , H01L2924/00 , H01L2924/00012
摘要： In a method for manufacturing a semiconductor device, a resin layer including an inorganic filler is molded on a surface of a substrate which includes semiconductor elements attached thereto by an adhesive, and terminals electrically connected to the semiconductor elements on another surface thereof. The molded substrate is cut so as to expose a conductive body electrically connected to an external terminal maintainable at ground potential. The surface of the resin layer of the substrate is sputter-etched in a vacuum environment, in a state where a plurality of the cut substrates is provided in a tray so that the surface of the substrate faces the tray. A metal layer is sputtered so as to be electrically connected to the conductive body on the surface and the cut surface in a state where the substrate is provided in the tray while maintaining the vacuum environment after sputter-etching.

5. 发明授权

US09458535B2 Semiconductor manufacturing device and semiconductor manufacturing method 有权
标题翻译：半导体制造装置及半导体制造方法
公开(公告)号：US09458535B2
公开(公告)日：2016-10-04
申请号：US14482075
申请日：2014-09-10
申请人： Kabushiki Kaisha Toshiba
发明人： Katsunori Shibuya , Takashi Imoto , Soichi Homma , Takeshi Watanabe , Yuusuke Takano
IPC分类号： G01R31/20 , C23C14/50 , C23C14/54 , H01L23/552 , C23C14/56 , H01L21/677
CPC分类号： C23C14/50 , C23C14/54 , C23C14/56 , H01L21/67778 , H01L23/552 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor manufacturing device has a conveyor configured to convey a tray having an unshielded semiconductor device mounted thereon to go through electromagnetic shielding, and a controller configured to control the conveyor. The controller performs control to take out the tray from a tray supply storage storing trays each having an unshielded semiconductor device mounted thereon to go through the electromagnetic shielding, place the tray on a carrier, and convey this carrier to a sputtering device which coats the unshielded semiconductor device with a sputtering material for the electromagnetic shielding, and the controller performs control to take out, from the sputtering device, the carrier having the tray placed thereon with an electromagnetically shielded semiconductor device being mounted on the tray, convey the tray, pick up the tray having the electromagnetically shielded semiconductor device mounted thereon from the carrier, and store the tray in the tray supply storage.
摘要翻译：半导体制造装置具有输送机，其被配置为输送安装在其上的非屏蔽半导体器件的托盘以通过电磁屏蔽;以及控制器，其被配置为控制输送机。控制器执行控制以从托盘供应存储托盘取出托盘，托盘供应储存托盘安装在其上的非屏蔽半导体装置以穿过电磁屏蔽，将托盘放置在载体上，并将该载体传送到涂覆非屏蔽的溅射装置具有用于电磁屏蔽的溅射材料的半导体器件，并且控制器执行控制以从溅射装置取出具有放置在其上的托盘的载体，其中电磁屏蔽的半导体器件安装在托盘上，输送托盘，拾取所述托盘具有从所述托架安装在其上的所述电磁屏蔽半导体装置，并将所述托盘存储在所述托盘供应储存器中。

6. 发明授权

US09385090B2 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09385090B2
公开(公告)日：2016-07-05
申请号：US14475270
申请日：2014-09-02
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Katsunori Shibuya , Takashi Imoto , Soichi Homma , Takeshi Watanabe , Yuusuke Takano
IPC分类号： H01L21/56 , H01L23/552 , H01L25/00 , H01L23/31 , H01L21/78 , H01L25/065
CPC分类号： H01L23/552 , H01L21/561 , H01L23/3128 , H01L25/0655 , H01L25/50 , H01L2224/48091 , H01L2224/48227 , H01L2924/00014
摘要： A semiconductor device includes a conductive shield layer that has a first portion covering a surface of a sealing resin layer and a second portion covering side surfaces of the sealing resin layer and side surfaces of the substrate. Portions of wiring layers, including a grounding wire, on or in the substrate have cut planes which are exposed to the side surfaces of the substrate and spread out in a thickness direction of the substrate. A cut plane of the grounding wire is electrically connected to the shield layer. An area of the cut plane of the grounding wire is larger than an area of a cross section of the grounding wire parallel to, and inward of the substrate from, the cut plane of the grounding wire.
摘要翻译：半导体器件包括具有覆盖密封树脂层的表面的第一部分和覆盖密封树脂层的侧表面和衬底的侧表面的第二部分的导电屏蔽层。包括接地线在内的基板上或其中的布线层的部分具有暴露于基板的侧表面并沿基板的厚度方向展开的切割平面。接地线的切割面电连接到屏蔽层。接地线的切割面的面积比接地线的切断面平行于基板的内侧的接地线的截面的面积大。

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