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    • 2. 发明公开
    • 본딩 와이어 손상 방지형 반도체 칩 패키지
    • 用于防止接合线损坏的半导体芯片包装
    • KR1020040011776A
    • 2004-02-11
    • KR1020020044891
    • 2002-07-30
    • 삼성전자주식회사
    • 이정삼
    • H01L21/60
    • H01L2224/05554H01L2224/45144H01L2224/48091H01L2224/49H01L2224/49171H01L2224/49179H01L2924/181H01L2924/00014H01L2924/00012H01L2924/00
    • PURPOSE: A semiconductor chip package for preventing damage of a bonding wire is provided to prevent the damage of the bonding wire by maintaining uniformly the flow of a liquefied molding material. CONSTITUTION: A semiconductor chip package for preventing damage of a bonding wire includes a semiconductor chip(200), a die pad(210), a plurality of inner leads(230), and a molding material. A plurality of bonding pads(204) are formed on an active region of the semiconductor chip(200). The semiconductor chip is adhered on the die pad(210). A plurality of tie bars(220) are formed on each of the die pad. The inner leads(230) are installed between the tie bars(220). The inner leads are electrically connected to the bonding pad(210) through a bonding wire(250). The molding material is used for sealing the semiconductor chip, the die pad, and the inner leads.
    • 目的:提供用于防止接合线损坏的半导体芯片封装,以通过均匀地维持液化的模制材料的流动来防止接合线的损坏。 构成:用于防止接合线损坏的半导体芯片封装包括半导体芯片(200),芯片焊盘(210),多个内引线(230)和成型材料。 多个接合焊盘(204)形成在半导体芯片(200)的有源区上。 半导体芯片粘附在芯片焊盘(210)上。 在每个芯片焊盘上形成多个连接条(220)。 内引线(230)安装在连接杆(220)之间。 内部引线通过接合线(250)电连接到接合焊盘(210)。 成型材料用于密封半导体芯片,芯片焊盘和内部引线。