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1. 发明公开

KR1020140043955A 전극 패드, 이를 이용한 인쇄 회로 기판 및 그의 제조 방법 无效
标题翻译：电极板，印刷电路板和使用电极板印刷电路板的制造方法
公开(公告)号：KR1020140043955A
公开(公告)日：2014-04-14
申请号：KR1020120105298
申请日：2012-09-21
申请人： 삼성전기주식회사
发明人： 방정윤 , 시모지테루아키 , 이은혜 , 조성민 , 김치성
IPC分类号： H01L23/00 , H05K3/24 , H01L23/12 , B32B15/01 , B32B15/04 , C22C5/02 , C22C5/04
CPC分类号： B32B15/018 , B32B15/043 , C22C5/02 , C22C5/04 , C23C18/1651 , C23C18/1653 , C23C18/1844 , C23C18/42 , C23C18/44 , C23C18/54 , C23C28/021 , C23C28/023 , C25D5/10 , H01L24/00 , H05K3/244 , H05K2201/09472 , Y10T428/12396 , Y10T428/12514 , Y10T428/12868 , Y10T428/12875 , H01L24/81 , H01L23/12 , H01L24/11 , H01L2224/2746 , H01L2224/32225
摘要： The present invention relates to an electrode pad, a printed circuit board using the same pad, and a method for manufacturing the printed circuit board. According to one embodiment of the present invention, the electrode pad includes a connection terminal part; a first plating layer including palladium phosphorus (Pd-P); and a second plating layer including palladium (Pd). According to one embodiment of the present invention, the first plating layer including palladium phosphorus (Pd-P) is formed on the connection terminal part. The second plating layer including palladium (Pd) is formed on the first plating layer.
摘要翻译：本发明涉及电极焊盘，使用该焊盘的印刷电路板以及印刷电路板的制造方法。根据本发明的一个实施例，电极焊盘包括连接端子部分; 包括钯磷（Pd-P）的第一镀层; 和包含钯（Pd）的第二镀层。根据本发明的一个实施例，在连接端子部分上形成包括钯磷（Pd-P）的第一镀层。包括钯（Pd）的第二镀层形成在第一镀层上。

2. 发明公开

KR1020130046723A 인쇄회로기판의 제조방법 审中-实审
标题翻译：制造印刷电路板的方法
公开(公告)号：KR1020130046723A
公开(公告)日：2013-05-08
申请号：KR1020110111266
申请日：2011-10-28
申请人： 삼성전기주식회사
发明人： 방정윤 , 이동준 , 조성민 , 문정수 , 김정석 , 이은혜 , 테루야키시모지 , 김치성
IPC分类号： H05K3/28 , H05K3/18
摘要： PURPOSE: A manufacturing method of a printed circuit board having an NSMD(Non Solder Mask Defined) type is provided to remove a catalyst adhering to a film layer by coating and removing the film layer, thereby preventing a blurring phenomenon caused by the catalyst remaining on a substrate in processing a surface. CONSTITUTION: A base substrate is coated with a first film layer on which a first circuit pattern forming area is opened(S100). A first plating layer is formed in the base substrate coated with the first film layer(S102). The base substrate in which the first plating layer is formed is coated with a second film layer of which a second circuit pattern forming area is opened(S103). A circuit pattern is formed by forming a second plating layer in the first and second circuit pattern forming area(S105). The second film layer, the first plating layer and the first film layer are sequentially removed(S106,S107,S108). [Reference numerals] (AA) Start; (BB) End; (S100) Coat a first film layer on a base substrate; (S101) Open a first circuit pattern forming area by removing a part of the first film layer; (S102a) Adsorb a catalyst; (S102b) Form a first plating layer by plating metal; (S103) Coat a second film layer; (S104) Open a second circuit pattern forming area by removing a part of the second film layer; (S105) Form a second plating layer on first and second circuit patterns; (S106) Remove the second film layer; (S107) Etch the first plating layer; (S108) Remove the first film layer; (S109) Coat solder resist which part is removed; (S110) Process a surface
摘要翻译：目的：提供具有NSMD（非焊接掩模定义）型的印刷电路板的制造方法，通过涂布和除去膜层来除去附着在膜层上的催化剂，从而防止由催化剂残留引起的模糊现象处理表面的基板。构成：基底衬底涂有第一电路图形形成区域打开的第一膜层（S100）。在涂覆有第一膜层的基底基板中形成第一镀层（S102）。其上形成有第一镀层的基底涂覆有打开第二电路图案形成区域的第二膜层（S103）。通过在第一和第二电路图案形成区域中形成第二镀层形成电路图案（S105）。依次去除第二膜层，第一镀层和第一膜层（S106，S107，S108）。（附图标记）（AA）开始; （BB）结束; （S100）在基底基板上涂覆第一膜层; （S101）通过去除第一膜层的一部分来打开第一电路图案形成区域; （S102a）吸附催化剂; （S102b）通过电镀金属形成第一镀层; （S103）涂覆第二膜层; （S104）通过去除第二膜层的一部分来打开第二电路图案形成区域; （S105）在第一和第二电路图案上形成第二镀层; （S106）取出第二膜层; （S107）蚀刻第一镀层; （S108）拆下第一层膜; （S109）去除部分的涂覆阻焊剂; （S110）处理表面

3. 发明公开

KR1020130001980A 인쇄회로기판의 무전해 표면처리 도금층 및 이의 제조방법 有权
标题翻译：印刷电路板的无电镀层及其制备方法
公开(公告)号：KR1020130001980A
公开(公告)日：2013-01-07
申请号：KR1020110062940
申请日：2011-06-28
申请人： 삼성전기주식회사
发明人： 이동준 , 전동주 , 방정윤 , 조성민 , 김치성
IPC分类号： H05K3/24 , H05K3/18 , C23C18/16
CPC分类号： H05K1/0242 , B32B15/018 , C22C19/03 , C23C18/1651 , C23C18/32 , C23C18/54 , H01L2224/45144 , H01L2224/85444 , H05K1/0216 , H05K1/09 , H05K3/181 , H05K3/244 , H05K7/00 , H05K2201/0338 , H05K2201/0352 , H05K2203/072 , Y10T428/12889
摘要： PURPOSE: An electroless plated layer of a printed circuit board and a method for preparing the same are provided to protect a copper layer by forming a plating layer. CONSTITUTION: An electroless plated layer is made of electroless nickel, palladium, and gold. The thickness of electroless nickel is 0.02-1 micrometer. The thickness of palladium is 0.01-0.3 micrometer. The thickness of a gold plating film is 0.01-0.5 micrometer. The electroless plated layer is connected to an exterior device in a wire bonding type and contains phosphorus.
摘要翻译：目的：提供印刷电路板的无电镀层及其制备方法，以通过形成镀层来保护铜层。构成：化学镀层由无电镍，钯和金制成。化学镀镍的厚度为0.02-1微米。钯的厚度为0.01-0.3微米。镀金膜的厚度为0.01-0.5微米。无电镀层以引线接合型连接到外部装置，并含有磷。

4. 发明授权

KR101140978B1 인쇄회로기판의 제조방법 有权
标题翻译：制造印刷电路板的方法
公开(公告)号：KR101140978B1
公开(公告)日：2012-05-03
申请号：KR1020100080956
申请日：2010-08-20
申请人： 삼성전기주식회사
发明人： 김치성 , 이동준 , 방정윤
IPC分类号： H05K3/34 , H05K3/24
CPC分类号： C23F11/149 , C23F11/10 , H05K1/0269 , H05K3/282 , H05K2201/09918 , H05K2203/0591 , H05K2203/166
摘要： 본 발명은 인쇄회로기판의 제조방법에 관한 것으로, 본 발명에 따른 인쇄회로기판(100)의 제조방법은 (A) 베이스 기판(110)의 패드부(130)와 인식마크(140)가 노출되도록 베이스 기판(110)에 도포된 솔더레지스트층(120)에 개구부(125)를 형성하는 단계, (B) 노출된 패드부(130)와 인식마크(140)에 제1 OSP(Organic Solderability Preservative) 처리층을 형성하는 단계, (C) 패드부(130)에 범핑(bumping) 공정 및 리플로우(reflow) 공정을 수행하여 솔더범프(160)를 형성하는 단계 및 (D) 인식마크(140)에 제2 OSP 처리층(170)을 형성하는 단계를 포함하는 구성이며, 리플로우 공정 후에 다시 한번 OSP 처리층을 형성함으로써, 인식마크(140)가 부식되거나 변색되는 것을 방지할 수 있는 장점이 있다.

5. 发明公开

KR1020120017967A 인쇄회로기판의 제조방법 有权
标题翻译：制造印刷电路板的方法
公开(公告)号：KR1020120017967A
公开(公告)日：2012-02-29
申请号：KR1020100080956
申请日：2010-08-20
申请人： 삼성전기주식회사
发明人： 김치성 , 이동준 , 방정윤
IPC分类号： H05K3/34 , H05K3/24
CPC分类号： C23F11/149 , C23F11/10 , H05K1/0269 , H05K3/282 , H05K2201/09918 , H05K2203/0591 , H05K2203/166
摘要： PURPOSE: A method for manufacturing a printed circuit board is provided to prevent the discoloration and corrosion of a pad unit and a recognition mark by forming an OSP(organic Solderability Preservative) processing layer on the pad unit and the recognition mark. CONSTITUTION: An opening unit is formed in a solder resist layer(120). A first OSP processing layer(150) is formed on a pad unit and a recognition mark(140). A solder bump(160) is formed by a bumping process and a reflow process. A second OSP processing layer(170) is formed on the recognition mark.
摘要翻译：目的：提供一种制造印刷电路板的方法，通过在焊盘单元和识别标记上形成OSP（有机可焊性防腐剂）处理层来防止焊盘单元和识别标记的变色和腐蚀。构成：在阻焊层（120）中形成开口单元。第一OSP处理层（150）形成在焊盘单元和识别标记（140）上。通过碰撞过程和回流工艺形成焊料凸块（160）。在识别标记上形成第二OSP处理层（170）。

6. 发明公开

KR1020000007192A 니켈-철-인 3원계 합금 无效
标题翻译：镍 - 磷 - 磷合金
公开(公告)号：KR1020000007192A
公开(公告)日：2000-02-07
申请号：KR1019980026389
申请日：1998-07-01
申请人： 삼성전기주식회사
发明人： 손희영 , 김치성 , 최영식
IPC分类号： C22C38/08
摘要： PURPOSE: A Ni-Fe-P alloy is provided for a thin film material which has the high resistivity and saturated magnetic flux density and can be applied to the magnetic layer material of an inductive portion of the merged MR head or the core material of a thin film inductor or a thin film transformer. CONSTITUTION: The Ni-Fe-P alloy comprises nickel in a range of 6-17 percent by weight, iron in a range of 73-87 percent by weight, and phosphorus in a range of 7-20 percent by weight. The alloy has a resistivity more than 100 microOhm centimeter and a saturated magnetic flux density more than 1.4 T.
摘要翻译：目的：提供具有高电阻率和饱和磁通密度的薄膜材料的Ni-Fe-P合金，并且可以将其应用于合并的MR头的感应部分的磁性层材料或者薄膜电感器或薄膜变压器。构成：Ni-Fe-P合金包含6-17重量％的镍，73-87重量％的铁，和7-20重量％的磷。该合金的电阻率大于100微欧姆厘米，饱和磁通密度大于1.4T。

7. 发明公开

KR1020160142036A 금속의 에칭방법 审中-实审
标题翻译：金属蚀刻方法
公开(公告)号：KR1020160142036A
公开(公告)日：2016-12-12
申请号：KR1020150077838
申请日：2015-06-02
申请人： 삼성전기주식회사 , 홍익대학교 산학협력단
发明人： 김용석 , 최연홍 , 김치성 , 김정윤 , 이재호
IPC分类号： H05K3/06
摘要： 본발명의금속의에칭방법은, 금속층을갖는기판을준비하는단계; 상기금속층에상기금속층의소정영역을노출시키는개구부를갖는에칭레지스트층을형성하는단계; 상기금속층의노출된영역을에칭액에침하시키는단계; 및상기금속층과소정간격이이격되도록대전체를배치하여상기금속층을에칭하는단계를포함한다. 따라서, 외부의정전기적상호작용을통한금속내전자들의분극현상을이용하여밀도를편재화시켜서로다른에칭속도를구현할수 있다.

8. 发明公开

KR1020140032244A 인쇄회로기판 제조방법 无效
标题翻译： PCB制造方法
公开(公告)号：KR1020140032244A
公开(公告)日：2014-03-14
申请号：KR1020120098910
申请日：2012-09-06
申请人： 삼성전기주식회사
发明人： 김치성 , 남효승 , 이은혜 , 방정윤 , 시모지테루아키 , 조성민
IPC分类号： H05K3/28 , H05K3/18 , B32B15/088
CPC分类号： H05K3/284 , B32B15/088 , H05K3/181 , H05K2201/0154 , H05K2203/1383
摘要： According to the present invention, provided is a method for manufacturing a PCB, which includes the steps of: providing a substrate which includes pads on both sides thereof and solder resists to expose each pad on both sides thereof; forming a first protection film with chemical resistance and heat resistance on one side of the substrate to cover the pad; firstly treating the surface of the pad formed on the other side of the substrate; forming a second protection film with chemical resistance and heat resistance on the other side of the substrate to cover the pad; separating the first protection film; and secondly treating the surface of the pad formed on one side of the substrate.
摘要翻译：根据本发明，提供了一种用于制造PCB的方法，其包括以下步骤：提供包括其两侧的焊盘和阻焊剂的衬底，以暴露其两侧的每个焊盘; 在所述基板的一侧上形成具有耐化学性和耐热性的第一保护膜以覆盖所述垫; 首先处理形成在基板的另一侧上的焊盘的表面; 在所述基板的另一侧上形成具有耐化学性和耐热性的第二保护膜以覆盖所述垫; 分离第一保护膜; 并且其次处理形成在衬底的一侧上的衬垫的表面。

9. 发明公开

KR1020140019174A 인쇄회로기판의 제조방법 无效
标题翻译：制造印刷电路板的方法
公开(公告)号：KR1020140019174A
公开(公告)日：2014-02-14
申请号：KR1020120085824
申请日：2012-08-06
申请人： 삼성전기주식회사
发明人： 시모지,테루아키 , 이은혜 , 김치성 , 방정윤 , 남효승 , 조성민
IPC分类号： H05K3/00 , H05K3/18 , H05K3/46 , H05K3/06 , H05K3/10
CPC分类号： H05K3/0085 , H05K3/06 , H05K3/108 , H05K3/181 , H05K3/4608
摘要： The present invention provides a method for manufacturing a printed circuit board by using catalyst solutions for electroless copper plating including copper salt and iodide compounds. According to the present invention, costs are reduced and stability is improved in comparison with the existing palladium catalyst if electroless plating is performed by using the catalyst solutions made of copper salt and iodide compounds. Also, the yield of a product is improved by preventing an insulation defect or a bridge defect of an electroless Ni/Au process in the final process by removing the residues after an etching process if a printed wiring board is manufactured by using the catalyst solutions.
摘要翻译：本发明提供一种通过使用包含铜盐和碘化物的化学镀铜的催化剂溶液来制造印刷电路板的方法。根据本发明，通过使用由铜盐和碘化物形成的催化剂溶液进行化学镀，与现有的钯催化剂相比，降低了成本并提高了稳定性。此外，如果通过使用催化剂溶液制造印刷线路板，则通过在蚀刻工艺之后除去残留物来防止最终工艺中的无电解Ni / Au工艺的绝缘缺陷或桥接缺陷，从而提高产品的产率。

10. 发明公开

KR1020130048103A 인쇄회로기판의 제조방법 无效
标题翻译：印刷电路板的制备方法
公开(公告)号：KR1020130048103A
公开(公告)日：2013-05-09
申请号：KR1020110113049
申请日：2011-11-01
申请人： 삼성전기주식회사
发明人： 김치성 , 조성민 , 전동주 , 방정윤 , 이동준
IPC分类号： H05K3/46 , H05K3/10 , C23C18/42 , C23C18/16
CPC分类号： C23C18/42 , C23C18/16 , H05K3/46
摘要： PURPOSE: A manufacturing method of a printed circuit board is provided to reduce process cost by preventing spread of a fine pattern in a surface treatment process. CONSTITUTION: A copper plated copper seed(140) is removed. The removed substrate is processed with an iodine compound. The processed substrate is processed with organic sulfur compound. The substrate is pickled. An electroless plating layer(120) is formed on the pickled substrate.
摘要翻译：目的：提供印刷电路板的制造方法，以防止在表面处理过程中细微图案的扩散。构成：去除铜镀铜种子（140）。用碘化合物处理去除的衬底。经处理的基板用有机硫化合物处理。底物酸洗。在酸洗基板上形成化学镀层（120）。

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