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1. 发明公开

KR1020000057810A 반도체 장치 无效
标题翻译：半导体器件
公开(公告)号：KR1020000057810A
公开(公告)日：2000-09-25
申请号：KR1020000003672
申请日：2000-01-26
申请人： 가부시키가이샤 히타치세이사쿠쇼 , 히타치 토부 세미콘덕터 가부시키가이샤
发明人： 카지와라료이치 , 코이즈미마사히로 , 모리타토시아키 , 타카하시카즈야 , 키시모토무네히사 , 이시이시게루 , 히라시마토시노리 , 타카하시야스시 , 하타토시유키 , 사토히로시 , 오오카와케이이치
IPC分类号： H01L21/60
CPC分类号： H01L23/49555 , H01L21/4814 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/28 , H01L23/3107 , H01L23/495 , H01L23/4952 , H01L23/49548 , H01L23/49562 , H01L23/49575 , H01L23/49582 , H01L24/11 , H01L24/13 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/37 , H01L24/40 , H01L24/81 , H01L24/83 , H01L24/84 , H01L24/97 , H01L29/7833 , H01L2224/0401 , H01L2224/04026 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13139 , H01L2224/13144 , H01L2224/16245 , H01L2224/29011 , H01L2224/29015 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29339 , H01L2224/32245 , H01L2224/37011 , H01L2224/40095 , H01L2224/40225 , H01L2224/45124 , H01L2224/45139 , H01L2224/73253 , H01L2224/75251 , H01L2224/81203 , H01L2224/81205 , H01L2224/81801 , H01L2224/83101 , H01L2224/83138 , H01L2224/83191 , H01L2224/83825 , H01L2224/8385 , H01L2224/83851 , H01L2224/84801 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01068 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/0134 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/18301 , H01L2924/19043 , H01L2924/30105 , H01L2924/3011 , H05K3/3426 , H01L2224/81 , H01L2224/83 , H01L2924/00 , H01L2924/01049 , H01L2924/01083 , H01L2224/29139 , H01L2924/3512 , H01L2224/48 , H01L2924/00012
摘要： PURPOSE: A semiconductor memory device is provided to decrease an electrical resistance of a Si chipless semiconductor package by having first and second metal elements connected to an electrode of the semiconductor device through a metal element including precious metals. CONSTITUTION: A semiconductor memory device comprises a semiconductor substrate, a semiconductor element, a first metal element, and a second metal element. The semiconductor element has a first electrode established on the semiconductor substrate and a second electrode established on a back side of the semiconductor substrate. The first metal element is connected to the first electrode. The second metal element is connected to the second electrode. The first electrode is connected to the first metal element through the first metal including a first precious metal. The second electrode is connected to the second metal element through the second metal including a second precious metal.
摘要翻译：目的：提供半导体存储器件，通过使第一和第二金属元件通过包括贵金属的金属元件连接到半导体器件的电极而降低Si无芯片半导体封装的电阻。构成：半导体存储器件包括半导体衬底，半导体元件，第一金属元件和第二金属元件。半导体元件具有建立在半导体衬底上的第一电极和建立在半导体衬底的背面上的第二电极。第一金属元件连接到第一电极。第二金属元件连接到第二电极。第一电极通过包括第一贵金属的第一金属连接到第一金属元件。第二电极通过包括第二贵金属的第二金属连接到第二金属元件。

2. 发明公开

KR1020000035690A 반도체 장치 및 메모리 시스템 失效
标题翻译：半导体器件和存储器系统
公开(公告)号：KR1020000035690A
公开(公告)日：2000-06-26
申请号：KR1019990052717
申请日：1999-11-25
申请人： 가부시키가이샤 히타치세이사쿠쇼 , 가부시키가이샤 히타치초에루. 에스. 아이. 시스테무즈
发明人： 사쿠마가즈키 , 카와무라마사야스 , 타카하시야스시 , 마스다마사치카 , 와다타마키 , 스기야마미치아키 , 니시자와히로타카 , 스가노토시오
IPC分类号： H01L23/04
CPC分类号： H01L2224/32245 , H01L2224/48091 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2924/01055 , Y02D10/13 , H01L2924/00014 , H01L2924/00
摘要： PURPOSE: A semiconductor device and a memory system are provided to decrease the thickness of a resin sealing, and to manufacture the semiconductor device with thinner structure. CONSTITUTION: A semiconductor device includes a resin sealing, two semiconductor chips(2,3), and first leads(6,7). The semiconductor chips(2,3) are implemented in the resin sealing and include outer nodes on a circuit forming surface. The first leads(6,7) extend in and out of the resin sealing. The first leads(6,7) are divided into two leads(6,7) at least in the resin sealing. One of the first leads(6) is fixed on the circuit forming region of one semiconductor chip(2), and coupled to the outer node of the circuit forming region. The other of the first leads(7) is fixed on the circuit forming region of the other semiconductor chip(3), and coupled to the outer node of the circuit forming region. The two semiconductor chips(2,3) are bound together against their backsides. A pair of chi select signal selects each of the two semiconductor chips(2,3) are applied on a pair of second leads.
摘要翻译：目的：提供半导体器件和存储器系统以减小树脂密封的厚度，并制造具有更薄结构的半导体器件。构成：半导体器件包括树脂密封，两个半导体芯片（2,3）和第一引线（6,7）。半导体芯片（2,3）实现在树脂密封中，并且在电路形成表面上包括外部节点。第一引线（6,7）延伸进出树脂密封。至少在树脂密封中，第一引线（6,7）被分成两个引线（6,7）。第一引线（6）中的一个被固定在一个半导体芯片（2）的电路形成区域上，并且耦合到电路形成区域的外部节点。第一引线（7）中的另一个固定在另一个半导体芯片（3）的电路形成区域上，并且耦合到电路形成区域的外部节点。两个半导体芯片（2,3）与它们的背面结合在一起。一对chi选择信号选择两个半导体芯片（2,3）中的每一个施加在一对第二引线上。

3. 发明公开

KR1020040087985A 반도체 장치 및 메모리 시스템 无效
标题翻译：制造半导体器件的半导体器件和存储器系统，并提高电气特性
公开(公告)号：KR1020040087985A
公开(公告)日：2004-10-15
申请号：KR1020040072801
申请日：2004-09-11
申请人： 가부시키가이샤 히타치세이사쿠쇼 , 가부시키가이샤 히타치초에루. 에스. 아이. 시스테무즈
发明人： 사쿠마가즈키 , 카와무라마사야스 , 타카하시야스시 , 마스다마사치카 , 와다타마키 , 스기야마미치아키 , 니시자와히로타카 , 스가노토시오
IPC分类号： H01L23/12
CPC分类号： H01L2224/32245 , H01L2224/48091 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2924/01055 , Y02D10/13 , H01L2924/00014 , H01L2924/00
摘要： PURPOSE: A semiconductor device is provided to make a semiconductor device thin by making a resin sealing member thin, and to improve an electrical characteristic by greatly reducing the floating capacitance of a lead. CONSTITUTION: A resin sealing member(12) is prepared. The first semiconductor chip has the first and second outer terminals on a circuit formation surface. The second semiconductor chip has the third and fourth outer terminals on a circuit formation surface. The first, second and third leads extend to the inside and outside of the resin sealing member. The first lead is ramified into two in at least the resin sealing member. One of the ramified first lead is fixed to the circuit formation surface of the first semiconductor chip. The other of the ramified first lead is fixed to the circuit formation surface of the second semiconductor chip. The second lead is fixed to the circuit formation surface of the first semiconductor chip, connected to the second outer terminal. The third lead is fixed to the circuit formation surface of the second semiconductor chip, connected to the fourth outer terminal. The first and second semiconductor chips are operated by a clock signal supplied to the first lead while the back surfaces of the chips face each other. The first and second chip control signals are input from the outside of the resin sealing member to the second and third leads to make the first and second semiconductor chips be in a low power consumption mode, respectively.
摘要翻译：目的：提供半导体器件，通过使树脂密封构件变薄而使半导体器件变薄，并且通过大大降低引线的浮置电容来改善电特性。构成：制备树脂密封件（12）。第一半导体芯片在电路形成表面上具有第一和第二外部端子。第二半导体芯片在电路形成表面上具有第三和第四外部端子。第一，第二和第三引线延伸到树脂密封构件的内部和外部。至少树脂密封部件中的第一引线分成两部分。分支的第一引线中的一个固定到第一半导体芯片的电路形成表面。分支的第一引线中的另一个固定到第二半导体芯片的电路形成表面。第二引线固定在与第二外部端子连接的第一半导体芯片的电路形成表面上。第三引线固定在与第四外部端子连接的第二半导体芯片的电路形成表面上。第一和第二半导体芯片由提供给第一引线的时钟信号操作，而芯片的背面彼此面对。第一和第二芯片控制信号从树脂密封构件的外部输入到第二和第三引线，以使第一和第二半导体芯片分别处于低功耗模式。

4. 发明授权

KR100585331B1 반도체 장치 및 메모리 시스템 失效
标题翻译：半导体器件和存储器系统
公开(公告)号：KR100585331B1
公开(公告)日：2006-05-30
申请号：KR1019990052717
申请日：1999-11-25
申请人： 가부시키가이샤 히타치세이사쿠쇼 , 가부시키가이샤 히타치초에루. 에스. 아이. 시스테무즈
发明人： 사쿠마가즈키 , 카와무라마사야스 , 타카하시야스시 , 마스다마사치카 , 와다타마키 , 스기야마미치아키 , 니시자와히로타카 , 스가노토시오
IPC分类号： H01L23/04
CPC分类号： H01L2224/32245 , H01L2224/48091 , H01L2224/4826 , H01L2224/48465 , H01L2224/73215 , H01L2924/01055 , Y02D10/13 , H01L2924/00014 , H01L2924/00
摘要： 반도체 장치는 2개의 반도체 칩의 뒷면이 각각 중합되어 적층되어 있고, 각각의 반도체 칩에는 클럭인에이블신호, 칩셀렉트신호가 개별로 입력되는 클럭인에이블용 아우터리드가 설치되며, 한쪽의 반도체 칩에 억세스할 경우에, 클럭인에이블신호, 칩셀렉트신호를 비액티브상태로 하는 것에 의해 다른쪽의 반도체 칩을 저소비전력모드로 설정한다.

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