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1. 发明专利

JP4680448B2 High-speed sampling receiver 有权
公开(公告)号：JP4680448B2
公开(公告)日：2011-05-11
申请号：JP2001267001
申请日：2001-09-04
申请人：ルネサスエレクトロニクス株式会社
发明人：公一郎南 , 憲一田中
IPC分类号： H03K17/00 , H03K19/0185 , H03K3/012 , H03K3/0233 , H03K3/356 , H03K3/3562
CPC分类号： H03K3/356139 , H03K3/012 , H03K3/35625

2. 发明专利

JP4036070B2 Hysteresis characteristic setting device 有权
公开(公告)号：JP4036070B2
公开(公告)日：2008-01-23
申请号：JP2002281262
申请日：2002-09-26
申请人：株式会社ジェイテクト
发明人：安司則藤
IPC分类号： H03K5/08 , H03K3/0233 , H03K3/037 , H03K5/1252
CPC分类号： H03K3/02337 , H03K3/0377 , H03K5/088 , H03K5/1252

3. 发明专利

JP2008005162A Comparator circuit and infrared-ray receiver 有权
标题翻译：比较器电路和红外接收器
公开(公告)号：JP2008005162A
公开(公告)日：2008-01-10
申请号：JP2006171807
申请日：2006-06-21
申请人： Sharp Corp , シャープ株式会社
发明人： TAKEUCHI NOBORU , INOUE TAKAHIRO
IPC分类号： H03K5/08 , H03K3/0233
CPC分类号： H03K5/1252 , H03K3/0377 , H03K5/088
摘要： PROBLEM TO BE SOLVED: To provide a comparator circuit which is improved in the capability of outputting pulses having the same cycles as input pulses having a short pause period while having the capability of preventing malfunction. SOLUTION: The comparator circuit 10 comprises: a charging and discharging circuit 100 which alternately charges and discharges a capacitor 105 with charging and discharging currents in response to switching of an input pulse signal; a comparator circuit 200 which compares the capacity voltage (Csig) of the capacitor 105 with a first threshold voltage (Vth1) and a second threshold voltage (Vth2) larger than the first threshold voltage respectively to generate a pulse signal corresponding to comparison results and outputs the pulse signal as a signal for switching the level of an output pulse signal to an output signal generating circuit 550; and a logical processing circuit 300 which generates a signal for adjusting current values of the charging and discharge currents of the charging and discharging circuit 100 from the generated pulse signal, and outputs the signal to the charging and discharging circuit 100 to adjust the current values of the charging and discharging currents. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种比较器电路，其具有在具有防止故障的能力的情况下输出具有与具有短的暂停时段的输入脉冲相同周期的脉冲的能力的能力。
解决方案：比较器电路10包括：充放电电路100，响应于输入脉冲信号的切换，交替地对具有充电和放电电流的电容器105进行充电和放电; 将电容器105的容量电压（Csig）分别与大于第一阈值电压的第一阈值电压（Vth1）和第二阈值电压（Vth2）进行比较的比较电路200，生成与比较结果对应的脉冲信号脉冲信号作为用于将输出脉冲信号的电平切换到输出信号生成电路550的信号; 以及逻辑处理电路300，其从所生成的脉冲信号生成用于调整充放电电路100的充放电电流的电流值的信号，并将该信号输出到充放电电路100，以调整充电和放电电路100的电流值充放电电流。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2006203762A Flip-flop circuit and semiconductor device 审中-公开
标题翻译： FLIP-FLOP电路和半导体器件
公开(公告)号：JP2006203762A
公开(公告)日：2006-08-03
申请号：JP2005015480
申请日：2005-01-24
申请人： Nec Electronics Corp , Necエレクトロニクス株式会社
发明人： HAYATA MASAAKI
IPC分类号： H03K3/3562 , H03K3/0233
CPC分类号： H03K3/012 , H03K3/356043
摘要： PROBLEM TO BE SOLVED: To provide a flip-flop circuit by which a stable high speed operation is possible even at low voltage. SOLUTION: A clock buffer circuit 2 outputs a differential clock signal with offset having threshold voltage of a MOS transistor as offset voltage to latch circuits 1a, 1b. The latch circuits 1a, 1b switch a data through operation and a data holding operation to an input signal by operation of the MOS transistor having the threshold voltage by the differential clock signal with offset and output differential signals. The latch circuit 1a inputs an input differential signal, performs a data through operation/data holding operation by the differential clock signal with offset and supplies a differential signal to be output to the latch circuit 1b. The latch circuit 1b performs the data holding operation/data through operation on the supplied signal by a differential clock signal with offset with the opposite phase to the differential clock signal with offset to be supplied to the latch circuit 1a and outputs the resultant signal as an output differential signal. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种即使在低电压下也可以进行稳定的高速运行的触发电路。解决方案：时钟缓冲电路2将具有MOS晶体管的阈值电压的偏移的差分时钟信号作为偏移电压输出到锁存电路1a，1b。锁存电路1a，1b通过具有偏移和输出差分信号的差分时钟信号通过具有阈值电压的MOS晶体管的操作将数据通过操作和数据保持操作切换到输入信号。锁存电路1a输入输入差分信号，通过具有偏移的差分时钟信号通过操作/数据保持操作执行数据，并将要输出的差分信号提供给锁存电路1b。锁存电路1b通过差分时钟信号通过对具有偏移的差分时钟信号的相位相位的差分时钟信号对所提供的信号进行操作来执行数据保持操作/数据，偏移被提供给锁存电路1a，并将所得到的信号作为输出差分信号。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP3593261B2 Hysteresis comparator circuit, and waveform generation circuit 失效
公开(公告)号：JP3593261B2
公开(公告)日：2004-11-24
申请号：JP17476898
申请日：1998-06-22
申请人：泰博杉本 , 株式会社リコー
发明人：泰博杉本 , 正巳高井
IPC分类号： G01R19/165 , H03K3/012 , H03K3/0231 , H03K3/0233 , H03K4/02 , H03K4/06 , H03K4/50 , H03K4/502 , H03K5/08
CPC分类号： H03K3/0231 , H03K3/012 , H03K3/02337 , H03K4/502

6. 发明专利

JP2004080794A Rc oscillator utilizing controllable schmidt trigger and regardless of power supply voltage and temperature 审中-公开
公开(公告)号：JP2004080794A
公开(公告)日：2004-03-11
申请号：JP2003296278
申请日：2003-08-20
申请人： Samsung Electronics Co Ltd , 三星電子株式会社
发明人： CHUNG KYU-YOUNG
IPC分类号： H03K3/354 , H03B5/04 , H03K3/00 , H03K3/011 , H03K3/0231 , H03K3/0233
CPC分类号： H03K3/0231 , H03B5/04 , H03K3/011
摘要： PROBLEM TO BE SOLVED: To provide an RC oscillator utilizing a controllable Schmidt trigger and regardless of a power supply voltage and a temperature.
SOLUTION: The RC oscillator utilizing the controllable Schmidt trigger and regardless of the power supply voltage and the temperature is provided with a transition voltage generating circuit, a Schmidt trigger circuit, an RC delay circuit and a quantizer. The transition voltage generating circuit generates a high transition voltage and a low transition voltage proportional to the power supply voltage. The Schmidt trigger circuit generates an output voltage of a first level when an input voltage is increased equally with or higher than the high transition voltage, or generates an output voltage of a second level when the input voltage is decreased lower than or equally with the low transition voltage. The RC delay circuit includes a resistor and a capacitor and generates an input voltage in response to the output voltage. The quantizer outputs an oscillated signal in the form of a rectangular wave by quantizing the input voltage. Thus, the oscillated signal having an oscillation frequency independent and stable in a change of an external condition such as the power supply voltage or the temperature is obtained.
COPYRIGHT: (C)2004,JPO

8. 发明专利

JP2003152509A COMPARATOR CIRCUIT AND INFRARED SIGNAL RECEIVING APPARATUS 审中-公开
公开(公告)号：JP2003152509A
公开(公告)日：2003-05-23
申请号：JP2001348675
申请日：2001-11-14
申请人： SHARP KK
发明人： INOUE TAKAHIRO , YOKOGAWA SEIICHI , NISHINO TAKESHI
IPC分类号： H03K3/0233 , H03K3/2897 , H03K5/08 , H03K5/24
摘要： PROBLEM TO BE SOLVED: To facilitate the control of the pulse width of an output by operating a limiter circuit properly, even when power supply voltage is made low. SOLUTION: A limiter circuit 13 is provided on the input side of a hysteresis comparator circuit 12, for preventing the hysteresis comparator circuit from saturating. A limit voltage Vlimit is set by a bias circuit 17, such that it changes in response to the operation of the hysteresis comparator circuit 12. Provided that the limit voltage Vlimit is also lowered to interlock with the lowering of hysteresis threshold voltage Vth, when input voltage Vsig exceeds the hysteresis threshold voltage Vth, the limit voltage Vlimit keeps a higher condition higher than the hysteresis threshold voltage Vth.

9. 发明专利

JP3385849B2 Hysteresis adjustment function with a comparator and the current detection circuit 失效
公开(公告)号：JP3385849B2
公开(公告)日：2003-03-10
申请号：JP13190196
申请日：1996-05-27
申请人：トヨタ自動車株式会社
发明人：雅之服部
IPC分类号： H03K3/353 , H03K3/0233 , H03K5/08

10. 发明专利

JP3132611B2 失效
公开(公告)号：JP3132611B2
公开(公告)日：2001-02-05
申请号：JP11689493
申请日：1993-05-19
IPC分类号： H03K3/0233 , H03K3/01 , H03K3/023 , H03K5/08 , H03K5/153

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