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    • 2. 发明专利
    • Switching circuit
    • 切换电路
    • JPS59202729A
    • 1984-11-16
    • JP7680883
    • 1983-04-30
    • Matsushita Electric Works Ltd
    • OKAMOTO FUTOSHI
    • H03K17/04H02M7/537H03K17/042H03K17/60
    • H03K17/04213
    • PURPOSE:To obtain a switching circuit whose switching loss is small, also which has a simple constitution and is low in its cost by adding an inductance and a diode to a transistor (TR) for turning on and off a DC power source supplied to a load. CONSTITUTION:When a positive base current IB1 flows to a TRQ1 by an output of a controlling circuit CO, the TRQ1 is turned on, a current flows through a load L and a choke coil CH1 from a DC power source E, and an electromagnetic energy is accumulated in the choke coil CH1. Subsequently, when a base current IB becomes zero at a time t0, the TRQ1 is shifted to off, but in this case, the electromagnetic energy accumulated in the choke coil CH1 is emitted as a reverse base current of the TRQ1 through a diode D1, accumulated charge between the base and the emitter of the TRQ1 is lost quickly, the TRQ1 is shifted quickly to off from on, and the switching loss becomes small. In this case, comparing with a conventional circuit, an auxiliary DC power source and a timing setting circuit for making the reverse base current flow become unnecessary.
    • 目的:为了获得开关损耗小的开关电路,其结构简单且成本低,通过向晶体管(TR)添加电感和二极管来接通和断开提供给 加载。 构成:当正基极电流IB1通过控制电路CO的输出流到TRQ1时,TRQ1导通,电流从直流电源E流过负载L和扼流线圈CH1,电磁能量 积聚在扼流线圈CH1中。 随后,当基本电流IB在时间t0为零时,TRQ1被转移到关闭状态,但是在这种情况下,通过二极管D1发射积极在扼流线圈CH1中的电磁能作为TRQ1的反向基极电流, TRQ1的基极和发射极之间的累积电荷迅速消失,TRQ1快速移开,导通,开关损耗变小。 在这种情况下,与常规电路相比,不需要辅助直流电源和用于使反向基极电流流动的定时设定电路。
    • 8. 发明专利
    • Delay circuit
    • 延时电路
    • JPS61112422A
    • 1986-05-30
    • JP24679885
    • 1985-11-01
    • Makoto Aso
    • ASO MAKOTO
    • H03K5/13H03K17/042H03K17/28
    • H03K17/04213H03K17/28
    • PURPOSE:To rise an output current at a high speed by feeding back positively a part of an output current to a time constant capacitor connected to a source of an FET in an on-delay delay circuit. CONSTITUTION:In turning on a switch 9, an N-FET-1 is turned on, a capacitor 4 is charged through a resistor 5 and an FET1 and the source potential of the FET1 rises. When the source potential approaches the gate potential after a prescribed time, the internal impedance of the FET starts increasing and when the drain potential breaks down a Zener diode 6, a base current of a transistor (TR) 7 flows and the TR7 is turned on. Its emitter current flows to the capacitor 4 at the same time and increases the internal imp-edance of the FET1, then the emitter current is arisen at a high speed by the positive feedback action.
    • 目的:通过将输出电流的一部分反馈到连接到导通延迟延迟电路中FET的源极的时间常数电容器来高速上升输出电流。 构成:在接通开关9时,N-FET-1导通,电容器4通过电阻器5和FET1充电,FET1的源极电位上升。 当源电位在规定时间后接近栅极电位时,FET的内部阻抗开始上升,当漏极电位破坏齐纳二极管6时,晶体管(TR)7的基极电流流过,TR7导通 。 其发射极电流同时流到电容器4,并增加了FET1的内部电位,然后通过正反馈作用在高速下产生发射极电流。