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    • 2. 发明专利
    • Driving device of inductive load
    • 感应负载驱动装置
    • JP2008085046A
    • 2008-04-10
    • JP2006262583
    • 2006-09-27
    • Keihin Corp株式会社ケーヒン
    • HORAI YASUHARUASO YASUTOSHI
    • H01F7/18H02M1/00H03K17/08H03K17/64
    • H03K17/08146H03K17/64H03K17/667H03K2017/0806H03K2217/0036
    • PROBLEM TO BE SOLVED: To provide a driving device of an inductive load which prevents generation of heat even when a counter electromotive voltage is absorbed.
      SOLUTION: The device has a first switching element 28 inserted between an external supply power source 12 and an inductive load 14, a second switching element 30 inserted between the inductive load 14 and a ground 24 and a cable run 40 branched between the first switching element 28 and the inductive load 14 and connected to the ground 24. It has a reflux circuit 18 for refluxing a counter electromotive current generated by a counter electromotive voltage of the inductive load 14 to the ground 24 when the first switching element 28 is turned off and the second switching element 30 is turned on and a cable run 44 branched between the inductive load 14 and the second switching element 30 and connected to the external supply power source 12. It is constituted to have a counter electromotive voltage reduction circuit 20 for feeding back a counter electromotive current to the external supply power source 12 when the first and second switching elements 28, 30 are turned off.
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供即使在反电动势被吸收时也能防止发热的感性负载的驱动装置。 解决方案:该装置具有插入在外部电源12和感性负载14之间的第一开关元件28,插入感应负载14和接地24之间的第二开关元件30以及在电源 第一开关元件28和感性负载14并连接到地面24.它具有回流电路18,用于当第一开关元件28为第二开关元件28时,回流电感负载14的反电动势产生的反电动势到地24 关闭,第二开关元件30导通,电缆线44在感性负载14与第二开关元件30之间分支,并与外部电源12连接。构成为具有反电动势降压电路20 用于当第一和第二开关元件28,30关闭时将反电动势电流反馈到外部电源12。 版权所有(C)2008,JPO&INPIT
    • 5. 发明专利
    • Drive circuit for electrostatic recording head
    • 静电记录头驱动电路
    • JPS5938072A
    • 1984-03-01
    • JP14825082
    • 1982-08-26
    • Toshiba Corp
    • OOWADA FUMIOEDA YOSHIKO
    • B41J2/40G01D5/06G03G15/05H03K17/0412H03K17/66H04N1/032
    • G01D5/06H03K17/04126H03K17/667
    • PURPOSE:To achieve a high speed operation by arranging a drive signal to be applied to first and second transistors opposite in the charateristic to give two higher levels, one in the former at the rising and the other in the latter at the falling corresponding to the image signal. CONSTITUTION:A first drive signal with two levels of e2>e1 is applied to a drive circuit DC of an electrostatic recording head within the application time of a recording piecture signal 1. In the first half, a npn type TR is overdriven at the e2 and a rapid charging is done to the load capacity with a shorter turning ON time. In the latter half, the minimum necessary driving is done at the e1 and turned OFF upon the end of the image signal, with the storage time small. Immediately thereafter, a second drive signal 4 with two levels of e4>e3 is applied to turn ON a pnp type TR3 rapidly at e4 and a discharging is done to the loaded charge capacity. Then, the minimum driving is done at e3. This can reduce the turning ON time and the storage time thereby enabling a higher speed of the electronic recording.
    • 目的:为了实现高速运行,通过将要施加到第一和第二晶体管的第一和第二晶体管的驱动信号布置在特征上来给出两个较高的电平,前者中的一个在上升沿中,另一个在后沿下降,对应于 图像信号。 构成:在记录拼接信号1的施加时间内,将具有两个等级e2> e1的第一驱动信号施加到静电记录头的驱动电路DC。在上半部分中,npn型TR在e2处被过载 并且以较短的接通时间对负载能力进行快速充电。 在后半部分,最小必要的驱动在e1完成,并且在图像信号结束时被关闭,存储时间较短。 此后,施加具有两个电平e4> e3的第二驱动信号4,以在e4快速导通pnp型TR3,并对装载的充电容量进行放电。 然后,最低驾驶在e3完成。 这可以减少打开时间和存储时间,从而能够实现更高的电子记录速度。
    • 8. 发明专利
    • Buffer circuit
    • 缓冲电路
    • JPS5970316A
    • 1984-04-20
    • JP18193182
    • 1982-10-15
    • Advantest Corp
    • ANDOU MASAKAZU
    • H03K17/66
    • H03K17/667
    • PURPOSE:To attain a buffer circuit which functions as a switch and whose impedance is minimized by using the buffer circuit having a switch function. CONSTITUTION:When both switches S1, S2 are selected to the position (a), diodes D1, D2 are conductive, transistors(TRs) Q1, Q2 are operative and the circuit acts like a conventional amplifier, and its output impedance is very small. When the switches S1, S2 are both selected to the position (b), a current I of a constant current source A1 flows to a power supply V1 via a diode D3, a current I of a constant current source A2 is absorbed from a power supply V2 via a diode D4, the TRs Q1, Q2 are cut off and the circuit becomes equivalent to the case of a switch opened.
    • 目的:通过使用具有开关功能的缓冲电路来获得用作开关并阻抗最小化的缓冲电路。 构成:当将两个开关S1,S2选择为位置(a)时,二极管D1,D2导通,晶体管(TR)Q1,Q2可操作,并且电路像常规放大器一样起作用,其输出阻抗非常小。 当开关S1,S2都被选择到位置(b)时,恒流源A1的电流I通过二极管D3流到电源V1,恒流源A2的电流I从功率 通过二极管D4供应V2,TRs Q1,Q2被切断,电路变成与开关断开的情况相当。