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    • 8. 发明专利
    • Semiconductor device and its manufacturing method
    • 半导体器件及其制造方法
    • JP2006066577A
    • 2006-03-09
    • JP2004246374
    • 2004-08-26
    • Oki Electric Ind Co Ltd沖電気工業株式会社
    • FUJIMAKI HIROKAZU
    • H01L21/331H01L21/8222H01L21/8248H01L21/8249H01L27/06H01L27/08H01L29/732
    • H01L29/66265H01L21/84H01L27/1203H01L29/7317
    • PROBLEM TO BE SOLVED: To provide a method for forming a low resistance layer in a good shape at the bottom of a vertical bipolar transistor as the manufacturing method of a semiconductor device.
      SOLUTION: The manufacturing method of a semiconductor device comprises a process for preparing a double SOI substrate, a process for forming a deep trench, a process for embedding the deep trench, a process for forming an opening 54, a process for forming a hole 56, a process for depositing polycrystalline silicon layer 80, and a process for forming a bipolar transistor. In the process for forming the opening, dry etching is performed so as to expose a second embedding oxide film 40 at an area 55 wherein a bipolar transistor is formed. In the process for forming the hole, wet etching is performed so as to remove the second embedding oxide film at the area wherein a bipolar transistor is formed. In the process for depositing a polycrystalline silicon layer, a polycrystalline silicon layer is deposited in the opening and the hole which are formed in the above processes and mutually communicated.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:提供一种在垂直双极晶体管的底部形成良好形状的低电阻层的方法,作为半导体器件的制造方法。 解决方案:半导体器件的制造方法包括制备双SOI衬底的方法,用于形成深沟槽的工艺,用于嵌入深沟槽的工艺,用于形成开口54的工艺,形成工艺 孔56,沉积多晶硅层80的工艺和形成双极晶体管的工艺。 在形成开口的过程中,进行干蚀刻,以便在形成双极晶体管的区域55处露出第二嵌入氧化膜40。 在形成孔的过程中,进行湿蚀刻,以便在形成双极晶体管的区域去除第二埋入氧化物膜。 在沉积多晶硅层的过程中,多晶硅层沉积在以上述方法形成的开口和孔中并相互通信。 版权所有(C)2006,JPO&NCIPI