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    • 4. 发明专利
    • JPS59150474K1 -
    • JPS59150474K1
    • 1984-08-28
    • JP1612483A
    • 1983-02-04
    • H01L29/1025H01L29/1066
    • PURPOSE:To obtain a field effect thyristor which has a low pinch off voltage and is excellent in both forward directional voltage drop and switching characteristic by forming a transvers edirectional channel part between a buried gate region and a surface gate region. CONSTITUTION:A p type region serving as the buried gate region 18 is formed on the surface of an n type semiconductor substrate 11, and an n type high resistant layer is formed thereon by epitaxial growing method. The surface gate region 14 is formed on the surface of the epitaxial layer by a selective diffusion method, and then the width of the channel part 21 is controlled by controlling the diffusion depth. An n type cathode region 13 is formed on the surface of the epitaxial layer by selective diffusion. The formation of the channel part of a narrow width and a long length can be easily performed, and the inside of the channel can be depleted at a low gate voltage, thus enabling the pinch off of the current.
    • 5. 发明专利
    • Semiconductor device
    • 半导体器件
    • JPS59150474A
    • 1984-08-28
    • JP1612483
    • 1983-02-04
    • Toshiba Corp
    • YOSHIDA JIROU
    • H01L29/74H01L29/10
    • H01L29/1025H01L29/1066
    • PURPOSE:To obtain a field effect thyristor which has a low pinch off voltage and is excellent in both forward directional voltage drop and switching characteristic by forming a transvers edirectional channel part between a buried gate region and a surface gate region. CONSTITUTION:A p type region serving as the buried gate region 18 is formed on the surface of an n type semiconductor substrate 11, and an n type high resistant layer is formed thereon by epitaxial growing method. The surface gate region 14 is formed on the surface of the epitaxial layer by a selective diffusion method, and then the width of the channel part 21 is controlled by controlling the diffusion depth. An n type cathode region 13 is formed on the surface of the epitaxial layer by selective diffusion. The formation of the channel part of a narrow width and a long length can be easily performed, and the inside of the channel can be depleted at a low gate voltage, thus enabling the pinch off of the current.
    • 目的:通过在掩埋栅极区域和表面栅极区域之间形成横向方向沟道部分,获得具有低截止电压并且具有优异的正向压降和开关特性的场效应晶闸管。 构成:在n型半导体衬底11的表面上形成用作掩埋栅区18的p型区,并通过外延生长法在其上形成n型高阻层。 通过选择性扩散方法在外延层的表面上形成表面栅极区域14,然后通过控制扩散深度来控制沟道部分21的宽度。 通过选择性扩散在外延层的表面上形成n型阴极区域13。 可以容易地形成窄宽度和长度的沟道部分,并且可以在低栅极电压下耗尽沟道的内部,从而能够夹断电流。
    • 8. 发明专利
    • Semiconductor integrated circuit
    • 半导体集成电路
    • JPS6134980A
    • 1986-02-19
    • JP15397284
    • 1984-07-26
    • Kaoru MototaniJunichi NishizawaRes Dev Corp Of Japan
    • NISHIZAWA JUNICHIMOTOTANI KAORU
    • H01L29/80H01L21/8222H01L27/06H01L27/08H01L27/082H01L29/10H01L29/205H01L29/43H01L29/772
    • H01L29/7722H01L27/0605H01L29/1025H01L29/205H01L29/432
    • PURPOSE:To obtain a rapid and low-power semiconductor integrated circuit which can be highly integrated, by providing an integrated circuit whose load resistance is connected in series with a thermionic emitting SIT. CONSTITUTION:A thermionic emitting SIT30 having normally-OFF properties has a load resistance 31, an input terminal 20, a grounding terminal 21, an output terminal 22 and a power input 23. When the input is zero and when the thermionic emitting SIT30 is OFF, the level becomes high in the output terminal 22. When the input becomes high, the SIT30 is turned ON and the level becomes low in the output terminal 22. Thus, the SIT30 performs so-called invertor operation. The current flowing through the circuit depends on the value of the load resistance 31. For example, when VDD is 1V and the load resistance is 1kOMEGA, the current is on the order of 1mA. Accordingly, the ON voltage of the thermionic emitting SIT30 becomes very low.
    • 目的:通过提供负载电阻与热电子发射SIT串联连接的集成电路,获得可以高度集成的快速和低功耗半导体集成电路。 构成:具有常关特性的热离子发射SIT30具有负载电阻31,输入端子20,接地端子21,输出端子22和电源输入23.当输入为零并且当热离子发射SIT30为OFF时 ,输出端子22的电平变高。当输入变为高电平时,SIT30导通,输出端子22的电平变低。因此,SIT30执行所谓的反相器操作。 流过电路的电流取决于负载电阻31的值。例如,当VDD为1V,负载电阻为1kOMEGA时,电流约为1mA。 因此,热离子发射SIT30的导通电压变得非常低。