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1. 发明专利

JP2018508971A バックプレーン上に発光ダイオードアレイを生成する方法审中-公开
公开(公告)号：JP2018508971A
公开(公告)日：2018-03-29
申请号：JP2017533007
申请日：2015-12-17
申请人：グロアーベー , GLO AB
发明人：ガードナー, ネイサンエフ. , キッシュ, フレドリックエー., ジュニア , モドリック, ミルジェンコ , ポークリヤル, アヌシャ , トンプソン, ダニエル , ダニッシュ, ファリバ
IPC分类号： H01L33/62 , B23K26/36 , B23K26/57 , G09F9/00 , G09F9/33 , H01L33/00 , H01L33/56 , H05K13/04
CPC分类号： H01L25/0753 , H01L27/156 , H01L33/0095 , H01L33/62 , H01L2224/81 , H01L2224/81001 , H01L2224/95
摘要：オプションで段付き水平面を有し、かつ、オプションで金属相互接続構造がそのなかに埋設されているバックプレーンが提供される。第1段付き水平面上に第1導電性接着構造が形成される。第1移送基板上の第1発光デバイスが第1導電性接着構造上に置かれ、第1発光デバイスの第1部分集合が第1導電性接着構造に接着される。第1発光デバイスの第2部分集合が第1移送基板に取り付けられたままである間に、レーザ放射を用いて、第1移送基板から第1発光デバイスの第1部分集合を選択的に切り離すことができる。追加的デバイスが既存の第1発光デバイスまたはバックプレーン上の接着位置にあるデバイスと重なる位置に存在しない限り、各追加的移送基板上の追加的デバイスをバックプレーン上の追加的導電性接着構造に、同じ方法を用いて接着することができる。【選択図】図32M

4. 发明专利

JP2014168791A Flux film, flip-chip connection method, and semiconductor device 审中-公开
标题翻译： FLUX膜，FLIP-CHIP连接方法和半导体器件
公开(公告)号：JP2014168791A
公开(公告)日：2014-09-18
申请号：JP2013041100
申请日：2013-03-01
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： MIYAUCHI KAZUHIRO , SUZUKI NAOYA
IPC分类号： B23K35/363 , B23K1/00 , B23K3/00 , B23K101/40 , H01L21/60
CPC分类号： H01L24/81 , H01L2224/81001 , H01L2224/81191
摘要： PROBLEM TO BE SOLVED: To provide a flux film being a flux that exhibits a stable flux action, is excellent in formability of a solder joint, is excellent in workability and storage stability, and has a reduced load on the environment, a flip-chip connection method using the flux film, and a semiconductor device in which a chip and a substrate are connected by the connection method.SOLUTION: A flux film contains a resin (A1) having a structure derived from polyvinyl alcohol or a resin (A2) having a structure derived from polyvinyl pyrrolidone, and a flux agent (B).
摘要翻译：要解决的问题：为了提供具有稳定的助焊剂作用的助焊剂的助焊剂膜，焊接接头的成形性优异，具有优异的加工性和储存稳定性，并且对环境的负载降低，倒装芯片使用该助焊剂膜的连接方法，以及通过连接方法连接芯片和基板的半导体装置。熔剂膜包含具有衍生自聚乙烯醇的结构的树脂（A1）或具有衍生自聚乙烯醇的树脂（A2）衍生自聚乙烯吡咯烷酮的结构和助熔剂（B）。

5. 发明专利

JP2013211443A Light-emitting device manufacturing method 审中-公开
标题翻译：发光装置制造方法
公开(公告)号：JP2013211443A
公开(公告)日：2013-10-10
申请号：JP2012081291
申请日：2012-03-30
申请人： Toyohashi Univ Of Technology , 国立大学法人豊橋技術科学大学 , Stanley Electric Co Ltd , スタンレー電気株式会社
发明人： WAKAHARA AKIHIRO , IWAYAMA AKIRA
IPC分类号： H01L33/48 , H01L33/32
CPC分类号： H01L24/95 , H01L2224/81001
摘要： PROBLEM TO BE SOLVED: To provide a light-emitting device manufacturing method which has a simplified manufacturing process and improved semiconductor element placement accuracy.SOLUTION: The light-emitting device manufacturing method comprises the following steps from 1 to 7: 1) forming an adhesive layer 37 which is thermoplastic at less than a boundary temperature T0 and thermosetting at the boundary temperature T0 and over on a first substrate 31 having electrode interconnections 33, 35; 2) forming a semiconductor wafer in which a plurality of semiconductor elements each having metal electrodes 18, 19 are provided on a second substrate 11; 3) heating the adhesive layer to a first temperature T1 less than T0 to bond the plurality of semiconductor elements with the adhesive layer in a contacting manner; 4) separating some semiconductor elements from the second substrate and placing the separated semiconductor elements on the adhesive layer; 5) heating the adhesive layer to a second temperature T2 higher than T1 and less than T0 and forcing the some semiconductor element into the adhesive layer; 6) heating the adhesive layer to a third temperature higher than T2 and less than T0 and pressing the adhesive layer until the metal electrodes contact the electrode interconnections; and 7) heating the adhesive layer to a fourth temperature higher than T0 and pressing the some semiconductor elements and the first substrate to form eutectic junction between the metal electrodes and the electrode interconnections.
摘要翻译：要解决的问题：提供一种具有简化的制造工艺和改进的半导体元件放置精度的发光器件制造方法。解决方案：发光器件制造方法包括以下步骤1至7：1）形成粘合剂层37，其在小于边界温度T0的情况下是热塑性的，并且在边界温度T0和以上在具有电极互连33,35的第一基板31上热固化; 2）形成半导体晶片，其中在第二基板11上设置有各具有金属电极18,19的多个半导体元件; 3）将粘合剂层加热至小于T0的第一温度T1，以接触的方式将多个半导体元件与粘合剂层接合; 4）将一些半导体元件与第二衬底分离并将分离的半导体元件放置在粘合剂层上; 5）将粘合剂层加热到高于T1且小于T0的第二温度T2，并迫使一些半导体元件进入粘合剂层; 6）将粘合剂层加热到高于T2且小于T0的第三温度，并且按压粘合剂层直到金属电极接触电极互连; 以及7）将所述粘合剂层加热到高于T0的第四温度，并且按压所述一些半导体元件和所述第一基板以在所述金属电极和所述电极互连之间形成共晶结。

8. 发明专利

JP2012044071A Electronic component mounting device and electronic component mounting method 有权
标题翻译：电子元件安装设备和电子元件安装方法
公开(公告)号：JP2012044071A
公开(公告)日：2012-03-01
申请号：JP2010185610
申请日：2010-08-20
申请人： Fujitsu Ltd , Shinko Electric Ind Co Ltd , 富士通株式会社 , 新光電気工業株式会社
发明人： YAMAGAMI TAKATOYO , KIRA HIDEHIKO , KUBOTA TAKASHI , OI ATSUSHI , IIDA KIYOAKI , KURIHARA TAKASHI
IPC分类号： H01L21/60 , H05K13/04
CPC分类号： H01L24/83 , H01L24/75 , H01L2224/32145 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/75 , H01L2224/75743 , H01L2224/81001 , H01L2224/83001 , H01L2224/83101 , H01L2224/83192 , H01L2224/838 , H01L2924/01006 , H01L2924/01033 , H01L2924/3025 , H01L2924/00014 , H01L2924/00 , H01L2924/3512
摘要： PROBLEM TO BE SOLVED: To prevent occurrence of creases on the upper surface of an underfill material.SOLUTION: A bonding tool 10 sucks a chip 41 while interposing an anti-adhesive tape 30 therebetween. The bonding tool 10 has an electronic component suction hole 11 through which the chip 41 is sucked, and a groove 13 provided on the periphery of the electronic component suction hole 11 in order to suck the anti-adhesive tape 30. When the chip 41 is pressed against an underfill material 70 and heated, and the mounting surface of an upper stage chip is formed by making the underfill material 70 protrude from the chip 41, thermally expanded portion of the anti-adhesive tape 30 enters the groove 13 and thereby creases do not occur on the upper surface of the underfill material.
摘要翻译：要解决的问题：为了防止在底部填充材料的上表面上产生折痕。解决方案：接合工具10吸附芯片41，同时在其间插入防粘带30。接合工具10具有吸引芯片41的电子部件吸入孔11和设置在电子部件吸入孔11的周围的槽13，以吸引防粘带30.当芯片41为压在底部填充材料70上并被加热，并且通过使底部填充材料70从芯片41突出而形成上层芯片的安装表面，防粘带30的热膨胀部分进入凹槽13，从而产生折痕不会发生在底部填充材料的上表面上。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP4832107B2 How to Implement 有权
公开(公告)号：JP4832107B2
公开(公告)日：2011-12-07
申请号：JP2006046649
申请日：2006-02-23
申请人：ソニーケミカル&インフォメーションデバイス株式会社
发明人：孝 ▲松▼村
IPC分类号： H01L21/60 , H05K3/32
CPC分类号： H05K3/303 , B30B5/02 , B30B15/024 , B30B15/065 , H01L21/568 , H01L24/29 , H01L24/75 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/16225 , H01L2224/2919 , H01L2224/32225 , H01L2224/73204 , H01L2224/75251 , H01L2224/753 , H01L2224/75315 , H01L2224/75317 , H01L2224/75756 , H01L2224/7598 , H01L2224/75988 , H01L2224/81001 , H01L2224/81005 , H01L2224/83192 , H01L2224/83209 , H01L2224/838 , H01L2225/06517 , H01L2225/06572 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01024 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/19105 , H01L2924/19106 , H05K2201/0133 , H05K2203/0191 , H05K2203/0278 , H05K2203/1572 , Y02P70/613 , Y10T156/10 , H01L2924/00 , H01L2224/0401
摘要： A mounting method is provided for mounting electric components on both faces of a substrate. Because the electric components 32, 33 on a front face and a rear face of the substrate 31 are simultaneously pressed with first and second pressing rubbers 15, 25, the electric components 32, 33 can be connected to the front face and the rear face of the substrate 31 at a time. Because the peripheries of the first and second pressing rubbers 15, 25 are surrounded by a dam member 16 when the first and second pressing rubbers deform, the first and second pressing rubbers 15, 25 are dammed by the dam member 16 and not spread. Thus, positional slip of the electric components 32, 33does not occur. Since the electric components 32, 33 are connected to the substrate 31 at the same positions as at the time of temporary compression bonding, an electric component 30a having high connection reliability is obtained.

10. 发明专利

JP2010541244A With double post flip chip interconnection 有权
公开(公告)号：JP2010541244A
公开(公告)日：2010-12-24
申请号：JP2010526972
申请日：2008-09-26
申请人：テッセラ,インコーポレイテッド
发明人：クォン，ジンス
IPC分类号： H01L21/60
CPC分类号： H01L24/14 , H01L21/4853 , H01L21/563 , H01L23/3178 , H01L23/49816 , H01L23/49822 , H01L23/49827 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/0657 , H01L25/105 , H01L2224/0401 , H01L2224/0558 , H01L2224/05624 , H01L2224/05644 , H01L2224/1147 , H01L2224/13015 , H01L2224/13016 , H01L2224/13017 , H01L2224/13019 , H01L2224/13023 , H01L2224/1308 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/1412 , H01L2224/16 , H01L2224/16058 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/73204 , H01L2224/81001 , H01L2224/81011 , H01L2224/81136 , H01L2224/81193 , H01L2224/81203 , H01L2224/81815 , H01L2224/8183 , H01L2224/81894 , H01L2224/831 , H01L2225/06517 , H01L2225/0652 , H01L2225/1023 , H01L2225/1058 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/10329 , H01L2924/1532 , H01L2924/19041 , H01L2924/2064 , H01L2924/3841 , H01L2924/00014 , H01L2224/13099 , H01L2224/29099
摘要：パッケージ化された超小型電子アセンブリは、前面（１２２）と、前面（１２２）から離れる方に延伸している複数の第１の固体金属ポスト（１１０）と、を有している超小型電子素子（１０４）を備えている。第１のポスト（１１０）の各々は、前面（１２２）の方向における幅および前面（１２２）から延びる高さを有しており、この高さ（Ｈ２）は、幅（Ｗ１）の少なくとも半分になっている。上面（１０１）と、上面（１０２）から延伸して第１の固体金属ポスト（１１０）に接合されている複数の第２の固体金属ポスト（１０８）と、を有している基板（１０２）も設けられている。

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