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    • 9. 发明专利
    • Single-chip microcomputer
    • 单芯片微型计算机
    • JPS6136845A
    • 1986-02-21
    • JP15826084
    • 1984-07-27
    • Hitachi Ltd
    • KIDA HIROYUKIMAEJIMA HIDEO
    • G06F1/00G06F9/22G06F9/26G06F9/28G06F9/38G06F13/28G06F15/78
    • G06F9/3851G06F9/268G06F13/28G06F15/7832
    • PURPOSE: To reduce a hardware quantity by unifying a logical circuit for data processing of a processor part and a logical circuit for data processing of each type of peripheral devices and using them in time division.
      CONSTITUTION: An instruction word read out of a main memory group via a memory bus consisting of a data bus 51 and an address bus 52 is decoded by a microprogram memory/controller 60. Then a microinstruction 67 is read out successively according to the decoded contents. Various types of control signals 70 are produced via decoders 71W73 and applied to an arithmetic circuit 22, a general-purpose register 21, a peripheral device register 34, a data buffer register 231 and an address buffer register 232 respectively. Thus the transfer of data is possible between optional registers among register groups 21, 34, 231 and 232 together with various types of operations by reading out successively the microinstructions serving as microprograms.
      COPYRIGHT: (C)1986,JPO&Japio
    • 目的:通过统一处理器部件的数据处理逻辑电路和每种类型的外围设备的数据处理逻辑电路,并将其分时并用来降低硬件数量。 构成:通过由数据总线51和地址总线52构成的存储器总线从主存储器组读出的指令字由微程序存储器/控制器60解码。然后根据解码的内容连续地读出微指令67 。 通过解码器71-73产生各种类型的控制信号70,分别应用于运算电路22,通用寄存器21,外围设备寄存器34,数据缓冲寄存器231和地址缓冲寄存器232。 因此,通过连续地读出用作微程序的微指令,可以在寄存器组21,34,231和232中的可选寄存器之间传送数据以及各种类型的操作。