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1. 发明专利

JP2017538197A 有効度整合审中-公开
公开(公告)号：JP2017538197A
公开(公告)日：2017-12-21
申请号：JP2017522512
申请日：2015-09-22
申请人：エイアールエムリミテッド , エイアールエムリミテッド
发明人：ルッツ、デイヴィッド、レイモンド , バージェス、ニール , ニールハインズ、クリストファー , ニールハインズ、クリストファー
IPC分类号： G06F7/499
CPC分类号： G06F7/483 , G06F5/012 , G06F7/38 , G06F7/48 , G06F7/4991 , G06F7/49915 , G06F7/49921 , G06F7/49942 , G06F7/506 , G06F7/507 , G06F9/3001 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30036 , G06F9/30112 , G06F9/3016 , G06F9/30185 , G06F9/30192 , G06F9/3885 , G06F11/3404 , G06F11/3476 , G06F11/348 , G06F11/3636 , G06F11/3644 , G06F11/3648 , G06F17/16 , G06F2201/865 , G06F2207/483 , H03M7/12 , H03M7/24
摘要：データ処理システムは、整合回路を使用して、プログラム可能な有効度パラメータに従って入力オペランドを整合させて、整合された入力オペランドを形成する。整合された入力オペランドは、整数加算器または整数乗算器などの演算回路に供給され、ここで結果値が形成される。結果値は、結果レジスタなどの出力オペランド記憶素子内に記憶される。プログラム可能な有効度パラメータは、結果値とは独立している。

2. 发明专利

JP5354601B2 Parallelism and instrumentation in the producer graph oriented programming framework 有权
公开(公告)号：JP5354601B2
公开(公告)日：2013-11-27
申请号：JP2009538644
申请日：2007-11-30
申请人：マーレックスソシエテパールアクシオンサンプリフィエ
发明人：ファディーシャミエ , エラエデ
IPC分类号： G06F9/44 , G06F9/48 , G06F11/36
CPC分类号： G06F9/4428 , G06F9/4436 , G06F11/3404 , G06F11/3419 , G06F11/3428 , G06F11/3495 , G06F2201/865
摘要： Embodiments of parallelization and/or instrumentation in a producer graph oriented programming framework have been presented. In one embodiment, a request to run an application program is received, wherein object-oriented source code of the application program includes methods and producer dependency declarations, wherein the producer dependency declaration for a given method identifies a set of zero or more producers with outputs that are an input to the given method, wherein a producer is at least an instance and a method associated with that instance. Further, execution of the application program may be parallelized based on dependency between producers of the application program using the runtime. In some embodiments, the application program is instrumented using the runtime.

3. 发明专利

JP5152175B2 Information-processing device 有权
公开(公告)号：JP5152175B2
公开(公告)日：2013-02-27
申请号：JP2009505092
申请日：2008-01-21
申请人：富士通モバイルコミュニケーションズ株式会社
发明人：保彦阿部 , 正彦南雲
IPC分类号： G06F9/48
CPC分类号： G06F11/3404 , G06F11/0715 , G06F11/0742 , G06F11/0757
摘要： In a cellular phone applicable to an information processing apparatus according to the present invention, a CPU of a main control unit executes monitor threads 1 to 3, monitors groups including a plurality of threads set with priority by executing a keep-alive operation to a plurality of monitor threads that monitor operations of threads in the groups, determines whether there is a monitor thread without a response to the keep-alive operation based on responses from the plurality of monitor threads, and terminates delivery of events to the groups with priority higher than the group monitored by the monitor thread without a response to the keep-alive operation if it is determined that there is a monitor thread without a response to the keep-alive operation

4. 发明专利

JP4465598B2 Integrated circuit and its processing control method, and program 有权
公开(公告)号：JP4465598B2
公开(公告)日：2010-05-19
申请号：JP2004198300
申请日：2004-07-05
申请人：ソニー株式会社
发明人：典仁市川 , 浩二高嶋
IPC分类号： G06F9/50 , G06F1/00 , G06F1/28
CPC分类号： G06F9/5088 , G06F11/3006 , G06F11/3058 , G06F11/3404 , G06F11/3466

5. 发明专利

JP2008234191A Hardware monitor management device and method of executing hardware monitor function 审中-公开
标题翻译：硬件监控管理设备及执行硬件监控功能的方法
公开(公告)号：JP2008234191A
公开(公告)日：2008-10-02
申请号：JP2007071357
申请日：2007-03-19
申请人： Toshiba Corp , 株式会社東芝
发明人： IGUCHI AKIRA
IPC分类号： G06F9/46
CPC分类号： G06F9/5077 , G06F9/45558 , G06F11/3404 , G06F11/3466 , G06F2009/45591 , G06F2201/86 , G06F2201/88
摘要： PROBLEM TO BE SOLVED: To provide a hardware monitor management device capable of resolving competition among a plurality of monitor contexts and supporting accurate performance analysis. SOLUTION: A hypervisor OS 6 has a monitor context table 50 in which a plurality of monitor contexts each including monitor operation requirements and priority information are set in order to set a hardware monitor function for monitoring the operating condition of a plurality of physical processors that execute a plurality of processes in parallel. For the monitor context of high priority that meets the monitor operation requirements, the hypervisor OS 6 obtains monitor data by executing the hardware monitor function, and outputs the monitor data along with timing data indicating the time at which the monitor operation requirements are met; for the monitor context which while meeting the monitor operation requirements is low in priority, the hypervisor OS 6 outputs timing data indicating the time at which the monitor operation requirements are met. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供能够解决多个监视器上下文之间的竞争并支持精确性能分析的硬件监视器管理装置。解决方案：管理程序OS 6具有监视器上下文表50，其中设置了包括监视操作要求和优先级信息的多个监视器上下文，以便设置用于监视多个物理的操作条件的硬件监视功能并行执行多个处理的处理器。对于满足监视操作要求的高优先级监视器上下文，管理程序OS 6通过执行硬件监视功能获取监视数据，并输出监视数据以及指示监视操作要求满足时间的定时数据; 对于监视器上下文，在满足监视操作要求的优先级低的情况下，管理程序OS 6输出指示满足监视操作要求的时间的定时数据。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2008004054A Task transition chart display method and display apparatus 有权
标题翻译：任务过渡图显示方法和显示设备
公开(公告)号：JP2008004054A
公开(公告)日：2008-01-10
申请号：JP2006184661
申请日：2006-07-04
申请人： Fujitsu Electronics Inc , Fujitsu Ltd , 富士通エレクトロニクス株式会社 , 富士通株式会社
发明人： TERANISHI MASAOMI , HASEGAWA YASUTSUGU , MOROZUMI HIROYUKI
IPC分类号： G06F11/32
CPC分类号： G06F11/3404
摘要： PROBLEM TO BE SOLVED: To enable an analysis of relationship between a task transition and performance information such as mis-caching in a multiprocessor system and to clearly identify a relationship between a parallel degree and the task transition of the system processing.
SOLUTION: Trace information and performance information corresponding to the trace information are obtained from memory, and the task transition state and performance information based on the trace information are displayed by superimposing on the transition chart. A parallel degree corresponding to an operation state of a plurality of processors is calculated on the basis of the trace information, and the parallel degree is displayed by being temporally synchronized with the task transition chart.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了能够分析任务转换和诸如多处理器系统中的错误缓存的性能信息之间的关系，并且清楚地识别并行度与系统处理的任务转换之间的关系。解决方案：从内存中获取与跟踪信息相对应的跟踪信息和性能信息，通过叠加在转换图上显示基于跟踪信息的任务转换状态和性能信息。基于跟踪信息计算与多个处理器的操作状态相对应的平行度，并且通过与任务转换图进行时间同步来显示并行程度。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2004054680A Parallel efficiency calculation method 审中-公开
公开(公告)号：JP2004054680A
公开(公告)日：2004-02-19
申请号：JP2002212387
申请日：2002-07-22
申请人： Fujitsu Ltd , 富士通株式会社
发明人： ORII SHIGEO
IPC分类号： G06F5/00 , G06F9/50 , G06F11/34 , G06F15/177 , G06F17/10
CPC分类号： G06F11/3433 , G06F11/3404 , G06F11/3419
摘要： PROBLEM TO BE SOLVED: To handle many types of parallel processing including a hetero processor environment even if load balance is not ensured, and quantitatively relate parallel efficiency to a load balance contribution ratio and a virtual parallelism ratio that are each a parallel performance evaluation index and to a parallel performance inhibiting factor. SOLUTION: Parallel efficiency E p (p) is calculated according to Formula 1 using a load balance contribution ratio Rb(p) indicating a load equilibrium degree among processors included in a parallel computer system, a virtual parallelism ratio Rp(p) indicating a time ratio, to processing executed in the parallel computer system, of a part of parallel calculation by each processor, and a parallel performance inhibiting factor contribution ratio Rj(p) indicating a ratio, to a total processing time of all the processors included in the parallel computer system, of a processing time of each parallel performance inhibiting factor part. COPYRIGHT: (C)2004,JPO

8. 发明专利

JP2017117242A 分散計算におけるアプリケーションパラメータ設定およびシステム仕様設定を推奨する方法およびシステム有权
公开(公告)号：JP2017117242A
公开(公告)日：2017-06-29
申请号：JP2015252574
申请日：2015-12-24
申请人：財團法人工業技術研究院Industrial Technology Research Institute , Industrial Technology Research Institute , 財團法人工業技術研究院Industrial Technology Research Institute
发明人： YEH CHAO-CHUN , CHANG SHENG-AN , LIN XUAN-YI
IPC分类号： G06F9/445
CPC分类号： G06F11/3409 , G06F9/50 , G06F11/302 , G06F11/3404 , G06F17/50
摘要：【課題】分散計算における、アプリケーションパラメータ設定およびシステム仕様設定を推奨する方法およびシステムを提供する。【解決手段】方法は以下のステップを含む。アプリケーション情報、フレームワーク情報およびシステム情報を受信する。性能、上記アプリケーション情報、上記フレームワーク情報および上記システム情報の関係を含む性能モデルが、記憶ユニットに記憶されているかどうかを判定する。上記性能モデルが上記記憶ユニットに記憶されている場合、アプリケーションパラメータ設定およびシステム仕様設定を、当該性能モデルにしたがって取得する。【選択図】図2

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