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1. 发明专利

JP2013152996A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2013152996A
公开(公告)日：2013-08-08
申请号：JP2012011935
申请日：2012-01-24
申请人： Toyota Motor Corp , トヨタ自動車株式会社 , Denso Corp , 株式会社デンソー , Toyota Central R&D Labs Inc , 株式会社豊田中央研究所
发明人： KIMURA KEISUKE , KAMEYAMA SATORU , KOYAMA MASAKI , AOI SACHIKO
IPC分类号： H01L27/04 , H01L21/8234 , H01L27/06 , H01L27/088 , H01L29/739 , H01L29/78
CPC分类号： H01L27/0664 , H01L29/0646 , H01L29/0834 , H01L29/407 , H01L29/7395 , H01L29/7397 , H01L29/861
摘要： PROBLEM TO BE SOLVED: To provide a technology for suppressing a snapback phenomenon.SOLUTION: In a plan view of a semiconductor substrate of a semiconductor device, an isolation region, an IGBT region, and a diode region that are adjacent to each other are formed. In the isolation region, a p-type deep region connected to a body region and an anode region is formed. In the semiconductor substrate, an n-type drift region is formed over the isolation region, the IGBT region, and the diode region. In a region exposed on a lower surface of the semiconductor substrate, a p-type collector region extending over the isolation region, the IGBT region, and the diode region, and an n-type cathode region located in the diode region are formed. In a cross section crossing a boundary between the isolation region and the diode region and separating the isolation region from the diode region, a boundary between the collector region and the cathode region exists in the diode region.
摘要翻译：要解决的问题：提供抑制回弹现象的技术。解决方案：在半导体器件的半导体衬底的平面图中，形成彼此相邻的隔离区域，IGBT区域和二极管区域。在隔离区域中，形成连接到体区和阳极区的p型深区。在半导体衬底中，在隔离区域，IGBT区域和二极管区域上形成n型漂移区域。在暴露在半导体衬底的下表面上的区域中，形成了在隔离区域上延伸的p型集电极区域，IGBT区域和二极管区域以及位于二极管区域中的n型阴极区域。在跨越隔离区域和二极管区域之间的边界并将隔离区域与二极管区域分开的横截面中，在二极管区域中存在集电极区域和阴极区域之间的边界。

2. 发明专利

JP2008218812A Igbt 有权
标题翻译： IGBT
公开(公告)号：JP2008218812A
公开(公告)日：2008-09-18
申请号：JP2007055917
申请日：2007-03-06
申请人： Toyota Central R&D Labs Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： SUGIYAMA TAKAHIDE , KAMEYAMA SATORU
IPC分类号： H01L29/739 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide an IGBT in which the switching time from a current on state to a current off state can be shortened by suppressing appearance of a negative resistance component under current on state. SOLUTION: A conductor region 16 penetrating a p-type collector layer 12 and intruding into an n-type base layer 10 is formed on the backside of an IGBT 100. The conductor region 16 is formed in a range not opposing a p-type body region 24. Appearance of a negative resistance component under current on state is thereby suppressed and residual carriers are discharged efficiently to a collector electrode 14 via the conductor region 16 at turning-off. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：为了提供一种IGBT，其中通过在电流导通状态下抑制负电阻分量的外观，可以缩短从电流导通状态到断电状态的切换时间。解决方案：在IGBT 100的背面形成有贯穿p型集电极层12并侵入n型基极层10的导体区域16.导体区域16形成在与p型集电极层12不相对的范围内由此抑制导通状态下的负电阻成分的外观，并且在关断时通过导体区域16将残留载流子有效地排出到集电极14。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2013080796A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2013080796A
公开(公告)日：2013-05-02
申请号：JP2011219553
申请日：2011-10-03
申请人： Toyota Central R&D Labs Inc , 株式会社豊田中央研究所 , Toyota Motor Corp , トヨタ自動車株式会社 , Denso Corp , 株式会社デンソー
发明人： AOI SACHIKO , SUGIYAMA TAKAHIDE , KAMEYAMA SATORU , KIMURA KEISUKE , KOYAMA MASAKI , OKURA YASUTSUGU
IPC分类号： H01L27/04 , H01L21/8234 , H01L27/06 , H01L27/088 , H01L29/739 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a technique that prevents operation of a parasitic diode in a semiconductor device in which an IGBT region and a diode region are mixed in a semiconductor layer.SOLUTION: A semiconductor device 100 includes a semiconductor layer 15 that is partitioned into an element area and a termination area surrounding the element area. In the element area, an IGBT region 10 and a diode region 12 are formed. A rear surface portion of the semiconductor layer 15 in the diode region 12 has cathode portions 38a in which n-type cathode regions are formed and non-cathode portions 38b in which the n-type cathode regions are not formed. In the semiconductor device 100, the non-cathode portions 38b relatively abound at an end-portion side compared to at the center side of the diode region 12.
摘要翻译：解决的问题：提供一种在半导体层中混合有IGBT区域和二极管区域的半导体装置中的寄生二极管的动作的技术。解决方案：半导体器件100包括被划分为元件区域的半导体层15和围绕元件区域的端接区域。在元件区域中，形成IGBT区域10和二极管区域12。二极管区域12中的半导体层15的背面部分具有形成n型阴极区域的阴极部分38a和不形成n型阴极区域的非阴极部分38b。在半导体器件100中，与二极管区域12的中心侧相比，非阴极部分38b在端部侧相对比较大。（C）2013，JPO＆INPIT

4. 发明专利

JP2011049273A Semiconductor device and control method of the semiconductor device 审中-公开
标题翻译：半导体器件的半导体器件和控制方法
公开(公告)号：JP2011049273A
公开(公告)日：2011-03-10
申请号：JP2009195244
申请日：2009-08-26
申请人： Toyota Motor Corp , トヨタ自動車株式会社
发明人： KAMEYAMA SATORU
IPC分类号： H01L29/78 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L27/088 , H01L29/739
摘要： PROBLEM TO BE SOLVED: To prevent overcurrent from flowing to a semiconductor device by detecting short-circuit of the semiconductor device based on detection values of a plurality of temperature-detecting elements formed on a semiconductor substrate. SOLUTION: When the temperature-detecting elements are set at positions separated in the depth direction of the semiconductor substrate to detect temperatures T1, T2, the output of the semiconductor device is reduced through control of gate voltage in a case of ¾T1-T2¾≥ΔTsx, wherein ΔTsx is a preset threshold. When the temperature-detecting elements are set at positions separated in the planar direction of the semiconductor substrate to detect temperatures T3, T4, the output of the semiconductor device is reduced through control of gate voltage in a case of T3, T4≥Tc and ¾T3-T4¾≤ΔTsy, wherein Tc and ΔTsy are preset thresholds. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：通过基于形成在半导体衬底上的多个温度检测元件的检测值来检测半导体器件的短路来防止过电流流向半导体器件。解决方案：当将温度检测元件设置在半导体衬底的深度方向上分离的位置以检测温度T1，T2时，在¾T1-的情况下，通过栅极电压的控制来减小半导体器件的输出， T2¾≥ΔTsx，其中ΔTsx是预设阈值。当温度检测元件设置在半导体衬底的平面方向上分离的位置以检测温度T3，T4时，在T3，T4≥Tc和¾T3的情况下，通过栅极电压的控制来减小半导体器件的输出 -T4¾≤ΔTsy，其中Tc和ΔTsy是预设阈值。版权所有（C）2011，JPO＆INPIT

5. 发明专利

JP2010212292A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2010212292A
公开(公告)日：2010-09-24
申请号：JP2009053844
申请日：2009-03-06
申请人： Toyota Motor Corp , トヨタ自動車株式会社
发明人： KAMEYAMA SATORU
IPC分类号： H01L21/822 , G01K7/01 , H01L21/329 , H01L21/66 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L29/739 , H01L29/78 , H01L29/861
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a temperature sensor element which is not affected by an operation of a transistor element. SOLUTION: A recess 20 is formed on a main face of a substrate 12 in the semiconductor device 100 and it includes a diode 40 formed along a surface of the recess 20. The diode 40 is insulated from the substrate 12 by an insulating film 22. Since the diode 40 is formed along the recess 20 in the semiconductor device 100, heat inside the substrate is sufficiently transmitted to the diode 40. Thus, a temperature of the substrate 12 is correctly measured. Since the diode 40 is insulated from the substrate 12 by the insulating film 22, measurement precision of the substrate temperature does not drop without being affected by a current change in the substrate by the operation of the transistor element formed in the substrate 12. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种不受晶体管元件的操作影响的温度传感器元件的半导体器件。解决方案：在半导体器件100中的基板12的主面上形成凹部20，并且其包括沿着凹部20的表面形成的二极管40.二极管40通过绝缘体与基板12绝缘由于二极管40沿着半导体器件100中的凹部20形成，所以衬底内的热量被充分地传递到二极管40.因此，正确地测量了衬底12的温度。由于二极管40通过绝缘膜22与基板12绝缘，所以基板温度的测量精度不会因基板12中形成的晶体管元件的工作而受到基板的电流变化的影响。
版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2014053552A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2014053552A
公开(公告)日：2014-03-20
申请号：JP2012198554
申请日：2012-09-10
申请人： Toyota Motor Corp , トヨタ自動車株式会社
发明人： HORIUCHI YUKI , KAMEYAMA SATORU , ONISHI TORU , EBINE JUMPEI
IPC分类号： H01L21/336 , H01L27/04 , H01L29/739 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which can ensure a wider element operation region than in the past in a semiconductor device equipped with a dummy trench gate and a distribution wire for screening inspection of the dummy trench gate.SOLUTION: A semiconductor device comprises an element formation region which is arranged on a principal surface side of a semiconductor substrate and includes: a plurality of trench gates 12 which extend in an X direction and are arranged in parallel with each other in a Y direction orthogonal to the X direction; a plurality of dummy trench gates 13 which extend in the X direction and are arranged in parallel with each other in the Y direction, in such a manner as to sandwich each trench gate 12; gate distribution wires 15, 17, 17a formed on the principal surface of the semiconductor substrate, for electrically connecting the plurality of trench gates 12 with each other; and a dummy gate distribution wire 14 for electrically connecting the plurality of dummy trench gates 13 with each other. The dummy gate distribution wire 14 overlaps the gate distribution wires 15, 17, 17a so as to avoid the trench gate 12 in planar view from a thickness direction of the semiconductor substrate.
摘要翻译：要解决的问题：提供一种半导体器件，其能够确保与配备有虚设沟槽栅极的半导体器件和用于屏蔽虚拟沟槽栅极检查的配线的过去较宽的元件操作区域。解决方案：半导体器件包括设置在半导体衬底的主表面侧的元件形成区域，并且包括：在X方向上延伸并且在与X方向正交的Y方向上彼此平行地布置的多个沟槽栅12; 多个虚拟沟槽栅极13，其以X方向延伸并且在Y方向上彼此平行地布置，以夹住每个沟槽栅极12; 形成在半导体衬底的主表面上的用于将多个沟槽栅极12彼此电连接的栅极配线15,17,17,17a; 以及用于将多个虚拟沟槽栅极13彼此电连接的虚拟栅极配线14。虚拟栅极配线14与栅极配线15,17,17a重叠，以避免沟槽栅极12从半导体衬底的厚度方向看平面。

7. 发明专利

JP2013074181A Semiconductor device and manufacturing method of the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2013074181A
公开(公告)日：2013-04-22
申请号：JP2011213006
申请日：2011-09-28
申请人： Toyota Motor Corp , トヨタ自動車株式会社 , Sumiju Shiken Kensa Kk , 住重試験検査株式会社
发明人： YAMAZAKI SHINYA , KAMEYAMA SATORU , SAKANE JIN , ITO SEISHI
IPC分类号： H01L21/336 , H01L21/265 , H01L21/322 , H01L29/739 , H01L29/78
CPC分类号： H01L21/263 , H01L29/0834 , H01L29/32 , H01L29/36 , H01L29/66348 , H01L29/7397 , H01L29/861
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which can simultaneously form a high concentration n layer and a lifetime control region, and provide a manufacturing method of the semiconductor device.SOLUTION: A semiconductor device comprises a semiconductor substrate including: an n-type drift layer; a p-type body layer provided on a surface side of the drift layer; and a high concentration n layer provided on a rear face side of the drift layer, containing hydrogen ion donor as a dopant and having an n-type impurity concentration higher than that of the drift layer. In a part of the high concentration n layer and the drift layer, a lifetime control region including a crystal defect as a lifetime killer is formed. In a thickness direction of the semiconductor substrate, a donor peak position at which a hydrogen ion donor concentration of the high concentration n layer is the highest coincides with or next to a defect peak position at which a crystal defect density of the lifetime control region is the highest. A crystal defect density of the lifetime control region at the defect peak position is equal to or higher than 1×10atoms/cm.
摘要翻译：解决的问题：提供能够同时形成高浓度n层和寿命控制区域的半导体器件，并提供半导体器件的制造方法。解决方案：半导体器件包括半导体衬底，其包括：n型漂移层; 设置在漂移层的表面侧的p型体层; 以及设置在漂移层的背面侧的高浓度n层，其含有氢离子供体作为掺杂剂，并且具有比漂移层的n型杂质浓度高的n型杂质浓度。在高浓度n层和漂移层的一部分中，形成包括晶体缺陷作为终身杀伤剂的寿命控制区域。在半导体衬底的厚度方向上，高浓度n层的氢离子供体浓度最高的施主峰位置与寿命控制区的晶体缺陷密度的缺陷峰位置重合或相邻最高。缺陷峰值位置处的寿命控制区域的晶体缺陷密度等于或高于1×10原子/ cm 2的SPNT =“POST”> 3 < SP>。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2008311523A Semiconductor chip, and manufacturing method thereof 审中-公开
标题翻译：半导体芯片及其制造方法
公开(公告)号：JP2008311523A
公开(公告)日：2008-12-25
申请号：JP2007159246
申请日：2007-06-15
申请人： Toyota Motor Corp , トヨタ自動車株式会社
发明人： KAMEYAMA SATORU
IPC分类号： H01L29/739 , H01L21/336 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To improve a yield of semiconductor chip with a plurality of cells.
SOLUTION: The semiconductor chip with the plurality of cells is equipped with: gate electrodes provided in the respective cells; a first gate pad formed on the surface of the semiconductor chip; a second gate pad formed on the surface of the semiconductor chip; first gate wiring electrically connecting the gate electrodes of the respective cells to the first gate pad; and second gate wiring electrically connecting the gate electrodes of the respective cells to the second gate pad. Then, by selectively removing a part of the first gate wiring and the second gate wiring, the gate electrodes of the respective cells can be selectively insulated from the first gate pad or the second gate pad.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提高具有多个单元的半导体芯片的产量。解决方案：具有多个单元的半导体芯片配备有设置在各个单元中的栅电极; 形成在所述半导体芯片的表面上的第一栅极焊盘; 形成在所述半导体芯片的表面上的第二栅极焊盘; 第一栅极布线将各个单元的栅极电连接到第一栅极焊盘; 以及将各个单元的栅极电连接到第二栅极焊盘的第二栅极布线。然后，通过选择性地去除第一栅极布线和第二栅极布线的一部分，各个栅极的栅电极可以与第一栅极焊盘或第二栅极焊盘有选择地绝缘。版权所有（C）2009，JPO＆INPIT

9. 发明专利

JP2011049272A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011049272A
公开(公告)日：2011-03-10
申请号：JP2009195243
申请日：2009-08-26
申请人： Toyota Motor Corp , トヨタ自動車株式会社
发明人： KAMEYAMA SATORU
IPC分类号： H01L29/78 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L27/088 , H01L29/06 , H01L29/739
摘要： PROBLEM TO BE SOLVED: To detect a failure by heating in the inner part of a semiconductor substrate. SOLUTION: The semiconductor device includes: a semiconductor substrate having a main active area formed thereon; a first temperature-detecting element which detects temperature of the semiconductor element; and a second temperature-detecting element which detects temperature of the semiconductor substrate at a deeper position than the first temperature-detecting element does. The temperature of the semiconductor device can be detected at two positions different in its depth direction by the first temperature-detecting element and the second temperature-detecting element. Since the temperature of the inner part and the surface side of the semiconductor substrate can be detected, heating in the inner part of the semiconductor substrate can be easily detected. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：通过在半导体衬底的内部加热来检测故障。解决方案：半导体器件包括：其上形成有主要有源区的半导体衬底; 第一温度检测元件，其检测半导体元件的温度; 以及第二温度检测元件，其在比第一温度检测元件更深的位置处检测半导体衬底的温度。半导体器件的温度可以通过第一温度检测元件和第二温度检测元件在其深度方向上的两个位置处被检测。由于可以检测半导体衬底的内部部分和表面侧的温度，因此可以容易地检测半导体衬底的内部部分的加热。版权所有（C）2011，JPO＆INPIT

10. 发明专利

JP2009038213A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2009038213A
公开(公告)日：2009-02-19
申请号：JP2007201116
申请日：2007-08-01
申请人： Toyota Motor Corp , トヨタ自動車株式会社
发明人： KAMEYAMA SATORU
IPC分类号： H01L29/861 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L29/06 , H01L29/739 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To reduce the density of a recovery current flowing from a termination region to a device formation region of a semiconductor device having a semiconductor region enclosing the element formation region in a loop shape. SOLUTION: The semiconductor device 100 includes a semiconductor substrate 10, a first semiconductor region 4 formed at a portion of a surface layer of the semiconductor substrate, and a second semiconductor region 6 enclosing the first semiconductor region in the loop shape. In the second semiconductor region, a tilted bottom region 6a which gradually increases in depth and a flat bottom region 6b which is adjacent to outside the tilted bottom region and whose depth is kept to a fixed distance D. A main electrode 8 on the side of the first semiconductor region is in contact with a surface of the first semiconductor region 4 and also in contact with a surface of the second semiconductor region 6 inside an outer edge of the loop that the second semiconductor region 6 forms. An outer edge 8a of a region where the main electrode 8 and the second semiconductor region 6 are in contact with each other is disposed between an innermost peripheral position 6c of the flat bottom region 6b and a position at the distance D from the innermost peripheral position 6c. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了降低从端接区流向具有包围元件形成区域的半导体区域的半导体器件的器件形成区域的恢复电流的密度为环形。解决方案：半导体器件100包括半导体衬底10，形成在半导体衬底的表面层的一部分处的第一半导体区域4和围绕环形的第一半导体区域的第二半导体区域6。在第二半导体区域中，倾斜的底部区域6a在深度上逐渐增加，并且平坦的底部区域6b与倾斜的底部区域的外部相邻并且其深度保持在固定的距离D。主电极8在第一半导体区域与第一半导体区域4的表面接触并且与第二半导体区域6形成的环的外边缘内的第二半导体区域6的表面接触。主电极8和第二半导体区域6彼此接触的区域的外边缘8a设置在平坦底部区域6b的最内周边位置6c和距离最内周边位置的距离D处的位置 6c。版权所有（C）2009，JPO＆INPIT

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