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    • 1. 发明专利
    • Semiconductor device and manufacturing method of the same
    • 半导体器件及其制造方法
    • JP2012160576A
    • 2012-08-23
    • JP2011019271
    • 2011-01-31
    • Toshiba Corp株式会社東芝
    • IGUCHI TOMOHIROFUKUMITSU MASAKOHONDA SATOSHIHONDA TOMOKOYAMAMOTO KAZUICHI
    • H01L23/28H01L23/00H05K9/00
    • H01L23/552H01L24/73H01L24/97H01L2224/32225H01L2224/48091H01L2224/48227H01L2224/73265H01L2224/97H01L2924/15311H01L2924/1815H01L2924/19107H01L2224/83H01L2224/85H01L2924/00012H01L2924/00H01L2924/00014
    • PROBLEM TO BE SOLVED: To provide a semiconductor device which improves design flexibility of electric wiring.SOLUTION: A semiconductor device according to the embodiment includes: a circuit board having an insulation substrate, multiple wiring lines forming a first wiring layer provided at the upper surface side of the insulation substrate, multiple wiring lines forming a second wiring layer provided at the lower surface side of the insulation substrate, and multiple vias penetrating from an upper surface to a lower surface of the insulation substrate; a semiconductor element mounted on an upper surface of the circuit board; and a sealing resin layer sealing the semiconductor element and provided at the upper surface of the circuit board. Further, the semiconductor device includes: a conductive shield layer covering an upper surface of the sealing resin layer and a part of a side surface of the sealing resin layer; and a conductive member electrically connecting the conductive shield layer covering the part of the side surface of the sealing resin layer with at least one of the multiple wiring lines forming the first wiring layer.
    • 要解决的问题:提供一种提高电布线设计灵活性的半导体器件。 解决方案:根据实施例的半导体器件包括:具有绝缘基板的电路板,形成设置在绝缘基板的上表面侧的第一布线层的多条布线,形成设置有第二布线层的多条布线 在所述绝缘基板的下表面侧,从所述绝缘基板的上表面贯穿到所述绝缘基板的下表面的多个通孔; 安装在所述电路板的上表面上的半导体元件; 以及密封树脂层,密封半导体元件并设置在电路板的上表面。 此外,半导体器件包括:覆盖密封树脂层的上表面和密封树脂层的侧表面的一部分的导电屏蔽层; 以及导电构件,其将覆盖所述密封树脂层的侧面的所述一部分的所述导电性屏蔽层与形成所述第一布线层的所述多条布线中的至少一方电连接。 版权所有(C)2012,JPO&INPIT
    • 2. 发明专利
    • Surface mounting diode and method of manufacturing the same
    • 表面安装二极管及其制造方法
    • JP2011159761A
    • 2011-08-18
    • JP2010019681
    • 2010-01-29
    • Toshiba Corp株式会社東芝
    • KITANI TOMOYUKITOJO HIROSHIATAGI TAKAOHIGUCHI KAZUTOIGUCHI TOMOHIROFUKUMITSU MASAKOOBATA SUSUMUASANO YUSAKU
    • H01L21/329H01L23/48H01L29/861
    • H01L21/782H01L23/48H01L2924/0002H01L2924/00
    • PROBLEM TO BE SOLVED: To provide a semiconductor device, the polarities of which can be identified easily by appearance without causing tombstone, and to provide a method of manufacturing the semiconductor device. SOLUTION: A surface mounting diode includes: a diode chip 2 having a first main surface A1 and a second main surface A2 that face with each other; a cathode electrode 3 having an internal electrode part 3a provided on the first main surface A1 and an external electrode part 3b provided on a surface of the internal electrode part 3a; an anode electrode 4 having an internal electrode part 4a provided on a surface of the second main surface A2 and an external electrode part 4b provided on a surface of the internal electrode part 4a, wherein a thickness of the external electrode part 4b is the same as that of the external electrode part 3b of the cathode electrode; a first coating member 5 coating a peripheral surface of the internal electrode part 3a of one of either the cathode electrode and the anode electrode and a peripheral surface of the diode chip 2; and a second coating member 6 coating a peripheral surface of the internal electrode part 4a of the other of the cathode electrode and the anode electrode and having a color different from that of the first coating member 5. COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供一种可以通过外观容易地识别其极性而不产生墓碑的半导体器件,并提供一种半导体器件的制造方法。 解决方案:表面安装二极管包括:具有彼此面对的第一主表面A1和第二主表面A2的二极管芯片2; 设置在第一主面A1上的内部电极部分3a和设置在内部电极部分3a的表面上的外部电极部分3b的阴极电极3; 设置在第二主面A2的表面上的内部电极部分4a和设置在内部电极部分4a的表面上的外部电极部分4b的阳极电极4,其中外部电极部分4b的厚度与 阴极电极的外部电极部分3b; 涂覆阴极电极和阳极电极之一的内部电极部分3a的外周表面和二极管芯片2的外围表面的第一涂覆部件5; 以及第二涂覆部件6,其涂覆阴极电极和阳极电极中的另一个的内部电极部分4a的周面,并且具有与第一涂覆部件5不同的颜色。版权所有(C)2011 ,JPO&INPIT
    • 3. 发明专利
    • Semiconductor light-emitting element
    • 半导体发光元件
    • JP2007081386A
    • 2007-03-29
    • JP2006221044
    • 2006-08-14
    • Toshiba Corp株式会社東芝
    • FUJII TAKAYOSHITONOTANI JUNICHIKOMATSU TETSUOSOGO TAKAHIROIGUCHI TOMOHIRO
    • H01L33/30H01L33/38H01L33/46
    • PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element capable of emitting light with high light-emitting efficiency by decreasing a proportion of trapped light in a chip by total reflection of emitted light, or absorbed light by an electrode facing the element. SOLUTION: The semiconductor light-emitting element is provided with a GaP substrate 11 having a column shape which has a tapered portion 11a formed on an outer wall surface and which narrows toward an upper bottom surface side, an upper surface electrode 14 prepared on the upper bottom surface of the GaP substrate 11, a light-emitting layer 12 prepared on a lower bottom surface of the GaP substrate 11, and a lower surface electrode 13 prepared on a surface of the light-emitting layer 12 of an opposite side to the GaP substrate 11 and arranged in an annular region outside of a region facing the upper surface electrode 14. COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:提供一种半导体发光元件,其能够通过通过发射光的全反射减少芯片中的俘获光的比例或通过面对电极的吸收光来发射具有高发光效率的光 元素。 解决方案:半导体发光元件设置有具有柱形状的GaP基板11,其具有形成在外壁表面上并且朝向上底面侧变窄的锥形部分11a,准备的上表面电极14 在GaP基板11的上底面上形成有在GaP基板11的下表面上制备的发光层12和在相对侧的发光层12的表面上制备的下表面电极13 并且布置在面向上表面电极14的区域外的环形区域中。(C)2007,JPO&INPIT
    • 6. 发明专利
    • Semiconductor device and method of manufacturing semiconductor device
    • 半导体器件及制造半导体器件的方法
    • JP2010225951A
    • 2010-10-07
    • JP2009073047
    • 2009-03-25
    • Toshiba Corp株式会社東芝
    • NISHIUCHI HIDEOHIGUCHI KAZUTOKITANI TOMOYUKIIGUCHI TOMOHIROFUKUMITSU MASAKOTOJO HIROSHIKATO KYOKO
    • H01L23/12H01L21/3205H01L23/52
    • H01L24/97H01L2224/13
    • PROBLEM TO BE SOLVED: To provide a semiconductor device which has high insulation performance and high strength while maintaining such an effect as the miniaturization of the device, more reduction in the resistance of an internal resistance, manufacturing at low cost, and improvement in manufacturing efficiency, and a method of manufacturing the semiconductor device. SOLUTION: The device has a substrate 2 in which a source electrode S and a gate electrode G are prepared in a first surface S1, and a drain electrode D is prepared in a second surface S2, a first wiring layer 3 which is connected to the source electrode S prepared on the first surface S1, a second wiring layer 4 which is prepared on the first surface S1, and connected to the drain electrode D, copper posts 5 prepared on the first wiring layer 3 and on the second wiring layer 4, respectively, a third wiring layer 6 which is connected to the drain electrode D prepared on the second surface S2, a through-hole 7 which penetrates the substrate 2, and establishes conduction between the second wiring layer 4 and the third wiring layer 6, and an enclosure 9 in which only a first facing surface and a second facing surface of the copper post 5 are exposed, and the first wiring layer 3, the second wiring layer 4, the third wiring layer 6 and the substrate 2 are sealed. COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:为了提供一种具有高绝缘性能和高强度的半导体器件,同时保持了器件的小型化的效果,内阻的电阻更多的降低,低成本的制造和改进 的制造效率,以及半导体装置的制造方法。 解决方案:器件具有在第一表面S1中制备源电极S和栅极电极G的衬底2,并且在第二表面S2中制备漏电极D,第一布线层3 连接到在第一表面S1上制备的源电极S,制备在第一表面S1上并连接到漏电极D的第二布线层4,在第一布线层3上准备的铜柱5和第二布线 层4分别连接到在第二表面S2上制备的漏电极D的第三布线层6,穿透基板2的通孔7,并且在第二布线层4和第三布线层之间建立导通 6以及仅露出铜柱5的第一面对面和第二面对面的壳体9,并且第一配线层3,第二配线层4,第三配线层6和基板2被密封 。 版权所有(C)2011,JPO&INPIT