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1. 发明专利

JP2008091835A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008091835A
公开(公告)日：2008-04-17
申请号：JP2006274079
申请日：2006-10-05
申请人： Toshiba Corp , 株式会社東芝
发明人： HATASAKI KOJI , FUKUHARA SEITA , KATADA TOMIO , WADA JUNICHI
IPC分类号： H01L21/3205 , H01L21/8247 , H01L23/52 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L21/76843 , H01L21/76846 , H01L21/76855 , H01L27/115 , H01L27/11521 , H01L27/11524
摘要： PROBLEM TO BE SOLVED: To make it possible to prevent an increase in wiring resistance caused by Cu-Al counter diffusion generated when Cu layer and Al-containing layer are connected.
SOLUTION: Ti layer 20a, TiOx layer 20b, TiN layer 20c, and Ti layer 20d are formed in this order between a metal layer 10 made of Cu material and a metal layer 14 made of Al material, from the metal layer 10 side to the metal layer 14 side.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了防止在连接Cu层和含Al层时产生的Cu-Al反扩散引起的布线电阻增加。解决方案：从金属层10在由Cu材料制成的金属层10和由Al材料制成的金属层14之间依次形成Ti层20a，TiOx层20b，TiN层20c和Ti层20d 一侧到金属层14侧。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2004273835A Semiconductor device and its manufacturing method 审中-公开
公开(公告)号：JP2004273835A
公开(公告)日：2004-09-30
申请号：JP2003063733
申请日：2003-03-10
申请人： Toshiba Corp , 株式会社東芝
发明人： FUKUHARA SEITA , TSUNODA HIROAKI , SHIBA KATSUIKU
IPC分类号： H01L21/283 , H01L21/316 , H01L21/336 , H01L21/768 , H01L21/8246 , H01L21/8247 , H01L23/522 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792 , H01L43/08
CPC分类号： H01L21/76801 , H01L29/6684
摘要： PROBLEM TO BE SOLVED: To suppress fluctuation of a threshold voltage which operates a transistor.
SOLUTION: This method of manufacturing a semiconductor device includes a process of forming a wiring layer 10, and a process of forming a first insulating film 20 on the wiring layer 10 under the condition that hydrogen in the state of plasma is not more than 1% of all the gas components.
COPYRIGHT: (C)2004,JPO&NCIPI

3. 发明专利

JP2005340446A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005340446A
公开(公告)日：2005-12-08
申请号：JP2004156214
申请日：2004-05-26
申请人： Toshiba Corp , 株式会社東芝
发明人： SHIBA KATSUIKU , FUKUHARA SEITA
IPC分类号： H01L21/76 , H01L21/762 , H01L21/8238 , H01L21/8247 , H01L27/115 , H01L29/76 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L21/76229 , H01L27/115
摘要： PROBLEM TO BE SOLVED: To prevent a silicon substrate from being oxidized when a polysilazane coating film is oxidized, and to prevent an SiO
2 film from being released when the oxidization is performed.
SOLUTION: A method of manufacturing a semiconductor device comprises steps of depositing an SiO
2 film 3 on a silicon substrate 1, depositing an Si rich film 14 on the SiO
2 film 3, applying a polysilazane coating liquid to the Si rich film 14, and forming an SiO
2 film by oxidizing a polysilazane coating film 4. In this manufacturing method, when oxidizing the polysilazane coating film 4, H
2 O reaches the Si containing film 14, O in H
2 O reacts with Si in the Si containing film 14 to form SiO
2 , and O is consumed.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了防止当聚硅氮烷涂层被氧化时硅衬底被氧化，并且当进行氧化时，防止SiO 2 膜被释放。解决方案：一种制造半导体器件的方法包括以下步骤：在硅衬底1上沉积SiO 2 SB 3膜;将富Si薄膜14沉积在SiO 2 SB >膜3，通过氧化聚硅氮烷涂膜4将聚硅氮烷涂覆液体施加到富Si薄膜14上，并形成SiO 2 膜。在该制造方法中，当氧化聚硅氮烷涂膜4时， H 2 O到达含Si膜14时，H 2 O中的O与含硅膜14中的Si反应，形成SiO 2 并且O被消耗。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2003297956A Semiconductor storage device and its manufacturing method 审中-公开
标题翻译：半导体存储器件及其制造方法
公开(公告)号：JP2003297956A
公开(公告)日：2003-10-17
申请号：JP2002102818
申请日：2002-04-04
申请人： Toshiba Corp , 株式会社東芝
发明人： TSUNODA HIROAKI , FUKUHARA SEITA , KOBAYASHI HIDEYUKI , SHIBA KATSUIKU , HIMENO YOSHIAKI
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L27/115
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor storage device which can improve data holding characteristic and its manufacturing method.
SOLUTION: The device has a nitrogen added silicon oxide film; an Al added silicon oxide film; an Al oxide; a Ti added silicon oxide film; a silicon oxide film whereto two kinds among three kinds of nitrogen, Al and Ti are added; Ti oxide; oxide of Ti and Al; a single metallic layer consisting of any one of a metallic group of Ti, Ni, Co, Zr, Cu, Pt, V, Mg, U, Nd, La, Sc; a layer consisting of a binary or more alloy wherein two or more metals of the metallic group are incorporated at least 50% of an entire; and a layer (such as an Al
2 O
3 film 10) comprising at least one or more of a group consisting of a layer formed of nitride of the alloy or a layer formed of hydride of the alloy, on an upper layer of a memory element.
COPYRIGHT: (C)2004,JPO
摘要翻译：解决的问题：提供一种能够提高数据保持特性的非易失性半导体存储装置及其制造方法。
解决方案：该装置具有氮添加氧化硅膜; Al添加氧化硅膜; 氧化铝; Ti添加氧化硅膜; 添加三种氮，Al和Ti中的两种氧化硅膜; 氧化钛 Ti和Al的氧化物; 由Ti，Ni，Co，Zr，Cu，Pt，V，Mg，U，Nd，La，Sc中的任一种金属组成的单一金属层; 由二元或更多合金组成的层，其中金属组中的两种或更多种金属掺入至少全部的50％; 和包含至少一种或多种由合金的氮化物形成的层或层的层（例如Al 2 SB 3 O 3 SB 3膜）由合金的氢化物形成在存储元件的上层上。版权所有（C）2004，JPO

5. 发明专利

JP2008010551A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008010551A
公开(公告)日：2008-01-17
申请号：JP2006178061
申请日：2006-06-28
申请人： Toshiba Corp , 株式会社東芝
发明人： NAKAMURA SHUICHI , KATADA TOMIO , FUKUHARA SEITA
IPC分类号： H01L21/768 , H01L21/28 , H01L23/522
CPC分类号： H01L23/485 , H01L21/76804 , H01L21/76847 , H01L21/76877 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To restrain a conductive layer from becoming highly resistive by constituting so as to prevent an air gap from occurring in a conductive layer in a hole.
SOLUTION: A third conductive layer 16 is formed inside a second conductive layer 15 in a contact hole 7. Accordingly, even if the air gap exists inside the second conductive layer after forming the second conductive layer 15 along the inner face of the contact hole 7, it is possible to embed the air gap. Consequently, it is possible to restrain the second/third conductive layers 15, 16 from becoming highly resistive, and also, to reduce each resistance value of the second/third conductive layers 15, 16.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：通过构成来抑制导电层变得高电阻以防止在孔中的导电层中发生气隙。解决方案：第三导电层16形成在接触孔7中的第二导电层15的内部。因此，即使在沿第二导电层15的内表面形成第二导电层15之后，第二导电层内部存在气隙接触孔7，可以嵌入气隙。因此，可以抑制第二/第三导电层15,16变成高电阻，并且还可以减小第二/第三导电层15,16的每个电阻值。（C）2008， JPO＆INPIT

6. 发明专利

JP2005310819A Semiconductor manufacturing apparatus 审中-公开
标题翻译：半导体制造设备
公开(公告)号：JP2005310819A
公开(公告)日：2005-11-04
申请号：JP2004121668
申请日：2004-04-16
申请人： Toshiba Corp , 株式会社東芝
发明人： KUBOTA HIROSHI , FUKUHARA SEITA , SHIBA KATSUIKU
IPC分类号： H01L21/31
摘要： PROBLEM TO BE SOLVED: To remove not only deposits formed in a film formation chamber but also deposits formed in an exhaust system by cleaning gas changed into plasma in a remote chamber.
SOLUTION: A semiconductor device has the film formation chamber 11, the remote chamber 15 for generating cleaning gas for cleaning the film formation chamber 11 by the excitation of plasma, and the exhaust system for exhausting the chambers. A conductance control valve 18 is provided between the film formation chamber 11 and the remote chamber 15, thus stabilizing the degree of vacuum in the remote chamber 15.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了除去形成在成膜室中的沉积物，而且通过清洁在远程室中变成等离子体的气体，除去在排气系统中形成的沉积物。解决方案：半导体器件具有成膜室11，用于产生用于通过激发等离子体来清洁成膜室11的清洁气体的远程室15和用于排出室的排气系统。导电控制阀18设置在成膜室11和远程室15之间，从而稳定了远程室15中的真空度。（C）版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2008311310A Semiconductor manufacturing apparatus 审中-公开
标题翻译：半导体制造设备
公开(公告)号：JP2008311310A
公开(公告)日：2008-12-25
申请号：JP2007155582
申请日：2007-06-12
申请人： Toshiba Corp , 株式会社東芝
发明人： KUBOTA HIROSHI , FUKUHARA SEITA , SHIBA KATSUIKU
IPC分类号： H01L21/205 , C23C16/44 , C23C16/507 , H01L21/3065 , H05H1/46
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing apparatus capable of stably being operated for a long period of time. SOLUTION: The semiconductor manufacturing apparatus includes a container 11 whose interior can be depressurized, a susceptor 13 which supports a work substrate 12 housed in the container 11, copper tube coils 14 arranged along the outer wall of the container 11, a power source 15 which supplies ac power to the coils 14 to generate plasma in the container 11, a circulating water system 16 which supplies a cooling fluid to one end 14a of each coil 14 and discharges the cooling fluid from the other end 14b of the coil 14 to circulate the cooling fluid through the copper tube of the coil 14, and a coat 17 which is formed on the interior wall of the copper tube of each coil 14 to prevent the corrosion of the coil 14 by the cooling fluid. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供能够长时间稳定地操作的半导体制造装置。解决方案：半导体制造装置包括其内部可以减压的容器11，支撑容纳在容器11中的工作基板12的基座13，沿着容器11的外壁布置的铜管线圈14，源15，其向线圈14提供交流电力以在容器11中产生等离子体;循环水系统16，其将冷却流体供应到每个线圈14的一端14a，并且从线圈14的另一端14b排出冷却流体使冷却流体循环通过线圈14的铜管，以及形成在每个线圈14的铜管的内壁上的涂层17，以防止冷却流体对线圈14的腐蚀。版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2008234027A Gas supply unit 有权
标题翻译：气体供应单元
公开(公告)号：JP2008234027A
公开(公告)日：2008-10-02
申请号：JP2007069194
申请日：2007-03-16
申请人： Ckd Corp , Toshiba Corp , シーケーディ株式会社 , 株式会社東芝
发明人： FUKUHARA SEITA , ISHIZUKA HODAKA , SUGIMOTO YOSHIO , NISHIMURA YASUNORI , ITO KAZUHISA , SUGINO AKIHITO , TOMITA HIROSHI
IPC分类号： G05D7/06
CPC分类号： C23C16/45557 , C23C16/45561 , Y10T137/7762 , Y10T137/86485
摘要： PROBLEM TO BE SOLVED: To provide a gas supply unit capable of stabilizing a gas supply amount. SOLUTION: This gas supply unit 1 has: a mass flow controller 14; a first fluid control valve 15 connected to the mass flow controller 14; a second fluid control valve 17 connected in parallel with the first fluid control valve; and a third fluid control valve disposed on a secondary side of the second fluid control valve. In the third fluid control valve, a valve opening is adjusted based on a differential pressure between a secondary side pressure of the first fluid control valve and a secondary side pressure of the second fluid control valve. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供能够稳定气体供给量的气体供给单元。
解决方案：该气体供应单元1具有：质量流量控制器14; 连接到质量流量控制器14的第一流体控制阀15; 与第一流体控制阀并联连接的第二流体控制阀17; 以及设置在第二流体控制阀的次级侧上的第三流体控制阀。在第三流体控制阀中，基于第一流体控制阀的次级侧压力和第二流体控制阀的次级侧压力之间的压差来调节阀开口。版权所有（C）2009，JPO＆INPIT

9. 发明专利

JP2008098504A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2008098504A
公开(公告)日：2008-04-24
申请号：JP2006280185
申请日：2006-10-13
申请人： Toshiba Corp , 株式会社東芝
发明人： FUKUHARA SEITA
IPC分类号： H01L21/8247 , H01L21/28 , H01L27/115 , H01L29/423 , H01L29/49 , H01L29/788 , H01L29/792
CPC分类号： H01L27/115 , H01L21/28052 , H01L21/28273 , H01L27/11521 , H01L27/11524 , H01L29/42324
摘要： PROBLEM TO BE SOLVED: To improve the controllability of the film thickness of a silicide layer when forming the silicide layer.
SOLUTION: The manufacturing method of a semiconductor device comprises: a process of forming a first conductor film through a first insulating film on a semiconductor substrate; a process of laminating and forming a polysilicon film as a second conductor film through a fourth insulating film on the first conductor film and forming a plurality of gate electrodes; a process of embedding a third insulating film between the plurality of gate electrodes; a process of removing the third insulating film so as to expose the upper part of the second conductor film of the gate electrodes; a process of performing the processing of covering the surface of the exposed part of the upper part of the second conductor film with F (fluorine), C (carbon) or O (oxygen); and a process of siliciding the upper part of the second conductor film by performing heat treatment after forming a metal film on the upper surface of the second conductor film.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提高形成硅化物层时硅化物层的膜厚度的可控性。解决方案：半导体器件的制造方法包括：通过半导体衬底上的第一绝缘膜形成第一导体膜的工艺; 通过第一导体膜上的第四绝缘膜层叠形成多晶硅膜作为第二导体膜的工序，形成多个栅电极; 在所述多个栅电极之间嵌入第三绝缘膜的工序; 去除第三绝缘膜以暴露栅电极的第二导体膜的上部的工艺; 用F（氟），C（碳）或O（氧）覆盖第二导体膜的上部的暴露部分的表面的处理的过程; 以及通过在第二导体膜的上表面上形成金属膜之后进行热处理来使第二导体膜的上部硅化的工序。版权所有（C）2008，JPO＆INPIT

10. 发明专利

JP2008010739A Semiconductor device, and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008010739A
公开(公告)日：2008-01-17
申请号：JP2006181552
申请日：2006-06-30
申请人： Toshiba Corp , 株式会社東芝
发明人： FUKUHARA SEITA
IPC分类号： H01L21/76 , C23C16/42 , H01L21/316
CPC分类号： H01L21/823481 , H01L21/28273 , H01L21/76224
摘要： PROBLEM TO BE SOLVED: To bury an insulating film which inhibits the generation of a void and is electrically stable into a channel of a high aspect ratio.
SOLUTION: A gate oxide film 25, a polycrystalline silicon film 26, and a silicon nitride film 27 are formed on a silicon substrate 21. A channel 22 is formed by a RIE method. An HTO film 28 is formed inside the channel 22 by a thermal CVD method, an Al atomic layer 29 and an SiOy (y
摘要翻译：要解决的问题：为了埋入抑制空穴的产生并且在高纵横比的通道中电稳定的绝缘膜。解决方案：在硅衬底21上形成栅极氧化膜25，多晶硅膜26和氮化硅膜27.通过RIE法形成通道22。通过热CVD方法在通道22内部形成HTO膜28，其表面形成有Al原子层29和富含硅的SiO y（y <2）膜30，SiO x（y

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