专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPS6350668B2 失效
公开(公告)号：JPS6350668B2
公开(公告)日：1988-10-11
申请号：JP9656983
申请日：1983-05-31
申请人： SONY TEKTRONIX CORP
发明人： YOKOGAWA HIDEMI , MUROOKA RIKICHI , FUKUZAWA YOSHUKI , TOMIOKA MACHIKO
IPC分类号： G01R13/28 , G01R13/20 , G06F11/25

2. 发明专利

JPS58216962A Logic analyser 失效
标题翻译：逻辑分析仪
公开(公告)号：JPS58216962A
公开(公告)日：1983-12-16
申请号：JP9657083
申请日：1983-05-31
申请人： Sony Tektronix Corp
发明人： YOKOGAWA HIDEMI , MUROOKA RIKICHI , FUKUZAWA MIYUKI , TOMIOKA MACHIKO
IPC分类号： G01R13/28 , G01R13/20 , G06F11/25
CPC分类号： G06F11/25 , G01R13/20
摘要： PURPOSE:To make it possible to discriminate data containing by a method wherein a glitch is detected from an input logic signal by a glitch detecting means and the display of the character of the input signal containing the glitch is controlled by a character display control means. CONSTITUTION:The data component and the glitch component among the input logic signals from a probe 10 are stored by respective memory circuits 14, 18 through a block 12 and, when a display order is inputted from a keyboard 30, CPU24 transmits the memory contents of the memory circuits 14, 18 to RAM28 on the basis of the firm wear of ROM26. In addition, a display mode and display region information selected by the keyboard 30 are stored by RAM 28 and a display control circuit 32 repeatedly read the content of the display RAM region of RAM28 to display a logic state by CRT34.
摘要翻译：目的：为了能够通过毛刺检测装置从输入逻辑信号检测到毛刺的方法来识别包含的数据，并且通过字符显示控制装置控制包含毛刺的输入信号的字符的显示。构成：来自探针10的输入逻辑信号中的数据分量和毛刺分量由相应的存储器电路14,18通过块12存储，并且当从键盘30输入显示顺序时，CPU24将存储器内容存储电路14,18至RAM28基于ROM26的坚固磨损。此外，由RAM28存储由键盘30选择的显示模式和显示区域信息，并且显示控制电路32重复读取RAM28的显示RAM区域的内容以通过CRT34显示逻辑状态。

3. 发明专利

JPS58213257A Logic analyzer 失效
标题翻译：逻辑分析仪
公开(公告)号：JPS58213257A
公开(公告)日：1983-12-12
申请号：JP8789783
申请日：1983-05-19
申请人： Sony Tektronix Corp
发明人： YOKOGAWA HIDEMI , MANOME TERUO , MIKI YASUHIKO , TOMIOKA MACHIKO , FUKUZAWA MIYUKI
IPC分类号： G01R13/28 , G01R31/28 , G01R31/3183 , G06F11/25
CPC分类号： G06F11/25
摘要： PURPOSE:To generate efficiently a pattern data corresponding to an inputted logic signal, by storing an input logic signal in a storage means, and outputting the stored contents of the storage means through a buffer means. CONSTITUTION:A logic signal from probes 10A-10D is supplied to a comparator 12. The comparator converts a level of an input logic signal to a logic level being suitable for each block, and supplies it to a data storing circuit 14 constituted of a high speed RAM, etc. and a trigger circuit 16. The circuits 14, 16 are connected to a bus 20. An RAM28 operates as a temporary storing circuit of a CPU24, also is a storing circuit containing an RAM area, too, and is connected to the bus 20. A clock pulse generator 36 supplies a clock pulse of frequency corresponding to an instruction signal from the bus 20 to the circuits 14, 16. In this way, a pattern data corresponding to an inputted logic signal is outputted efficiently from a buffer means 62 connected to the bus 20.
摘要翻译：目的：通过将输入逻辑信号存储在存储装置中，有效地生成对应于输入的逻辑信号的图形数据，并通过缓冲装置输出存储装置的存储内容。构成：来自探针10A-10D的逻辑信号被提供给比较器12.比较器将输入逻辑信号的电平转换为适合每个块的逻辑电平，并将其提供给由高电平构成的数据存储电路14 高速RAM等和触发电路16.电路14,16连接到总线20.RAM28作为CPU24的临时存储电路工作，也是包含RAM区域的存储电路，并且被连接时钟脉冲发生器36将对应于来自总线20的指令信号的频率的时钟脉冲提供给电路14,16。以这种方式，对应于输入的逻辑信号的模式数据从连接到总线20的缓冲装置62。

4. 发明专利

JPS58113863A LOGIC ANALYZER 失效
公开(公告)号：JPS58113863A
公开(公告)日：1983-07-06
申请号：JP21411581
申请日：1981-12-28
申请人： SONY TEKTRONIX CORP
发明人： YOKOGAWA HIDEMI , MUROOKA RIKICHI , FUKUZAWA MIYUKI , TOMIOKA MACHIKO
IPC分类号： G01R13/28 , G01R13/20 , G01R31/3177
摘要： PURPOSE:To enable the effective utilization of retrieval even in a timing display mode, by counting the total number of phenomena retrieved from stored data, and by displaying the relation between the position of a cursor and the total number of phenomena. CONSTITUTION:A data component and a grid component of input logic signals from a probe 10 are stored sequentially in memory circuits 14 and 18 respectively via a comparator and grid detector 12. When a display instruction is inputted from a keyboard 30, the content of memory of the memory circuit 14 and 18, a display mode and a display region information are stored in RAM28, the content of RAM28 is read out repeatedly by a display control circuit 32, and logic waveforms are displayed in CRT34. When a retrieval mode is selected by the keyboard 30, CPU24 compares search words with data informations, counts the total number of the search words, and further the number of search words contained before the address of the position of a cursor is stored, and makes CRT34 display these numbers.

5. 发明专利

JPH0122587B2 失效
公开(公告)号：JPH0122587B2
公开(公告)日：1989-04-27
申请号：JP21411581
申请日：1981-12-28
申请人： SONY TEKTRONIX CORP
发明人： YOKOGAWA HIDEMI , MUROOKA RIKICHI , FUKUZAWA MYUKI , TOMIOKA MACHIKO
IPC分类号： G01R13/28 , G01R13/20 , G01R31/3177

6. 发明专利

JPS60233742A DIGITAL PATTERN GENERATOR 失效
公开(公告)号：JPS60233742A
公开(公告)日：1985-11-20
申请号：JP9044684
申请日：1984-05-07
申请人： SONY TEKTRONIX CORP
发明人： HASEGAWA KAZUMI , TOMIOKA MACHIKO
IPC分类号： G01R31/28 , G01R31/3183 , G01R31/319 , G06F11/22
摘要： PURPOSE:To confirm quickly the storage contents of an execution control area, a jumping address area or a pattern area of a pattern memory, by using a table with no load applied to a RAM for CPU. CONSTITUTION:A digital pattern generator contains a memory 10 including an execution control instruction area 12, a jumping address area 14, a pattern area 16 and an auxiliary information area 40. Furthermore, a decoder 18 that receives the output signals from areas 12 and 14 is added together with a program counter 20 which produces the address of the memory 10. In such a microprogram system, the addresses are designated and a digital pattern signal is produced from the area 16. A processing means consisting of a CPU26, a ROM28, a RAM30, a keyboard 32, etc. stores the information on the generation of digital patterns to areas 12, 14 and 16 of the memory 10. While the auxiliary information is stored in the area 40. Then the storage contents of areas 12, 14 and 16 are confirmed from the contents of the area 40.

7. 发明专利

JPH0133784B2 失效
公开(公告)号：JPH0133784B2
公开(公告)日：1989-07-14
申请号：JP8789783
申请日：1983-05-19
申请人： SONY TEKTRONIX CORP
发明人： YOKOGAWA HIDEMI , MANOME TERUO , MIKI YASUHIKO , TOMIOKA MACHIKO , FUKUZAWA MYUKI
IPC分类号： G01R13/28 , G01R31/28 , G01R31/3183 , G06F11/25

8. 发明专利

JPH0132952B2 失效
公开(公告)号：JPH0132952B2
公开(公告)日：1989-07-11
申请号：JP583582
申请日：1982-01-18
申请人： SONY TEKTRONIX CORP
发明人： YOKOGAWA HIDEMI , MANOME TERUO , MIKI YASUHIKO , TOMIOKA MACHIKO , FUKUZAWA MYUKI
IPC分类号： G01R13/28 , G01R13/20 , G06F11/25

9. 发明专利

JPS58216961A Logic analyser 失效
标题翻译：逻辑分析仪
公开(公告)号：JPS58216961A
公开(公告)日：1983-12-16
申请号：JP9656983
申请日：1983-05-31
申请人： Sony Tektronix Corp
发明人： YOKOGAWA HIDEMI , MUROOKA RIKICHI , FUKUZAWA MIYUKI , TOMIOKA MACHIKO
IPC分类号： G01R13/28 , G01R13/20 , G06F11/25
CPC分类号： G01R13/20 , G06F11/25
摘要： PURPOSE:To put a logic analyser in possession of retrieving function, by a method wherein the logic level of a signal wave form is displayed as a cursor word and the display of the cursor word is subjected to white and black reversal control when the signal wave form of a cursor position is coincided with a predetermined phenomenon. CONSTITUTION:A retrieving mode is selected by a keyboard 30 while search words are inputted to be stored by RAM28. By this operation, CPU24 compares the search words stored by RAM28 to data information and the total number of the search words are counted while the number of the search words contained prior to the address of a cursor position are calibrated. In the next step, the cursor is successively moved to a righthand direction by the keyboard 30 and, when the cursor position corresponds to the predetermined search word, the cursor word of CRT34 is displayed in a white and black reversal state.
摘要翻译：目的：为了使逻辑分析仪拥有检索功能，通过一种方法，其中信号波形的逻辑电平显示为光标字，并且当信号波在光信号中的显示受到白黑反转控制光标位置的形状与预定的现象一致。构成：通过键盘30选择检索模式，而搜索字被输入以由RAM28存储。通过该操作，CPU24将由RAM28存储的搜索词与数据信息进行比较，并且对在光标位置的地址之前包含的搜索词的数量进行校准的同时对所搜索词的总数进行计数。在下一步骤中，光标通过键盘30连续移动到右手方向，并且当光标位置对应于预定搜索字时，CRT34的光标字以白色和黑色反转状态显示。

10. 发明专利

JPS58123466A LOGIC ANALYZER 失效
公开(公告)号：JPS58123466A
公开(公告)日：1983-07-22
申请号：JP583582
申请日：1982-01-18
申请人： SONY TEKTRONIX CORP
发明人： YOKOGAWA HIDEMI , MANOME TERUO , MIKI YASUHIKO , TOMIOKA MACHIKO , FUKUZAWA MIYUKI
IPC分类号： G01R13/28 , G01R13/20 , G06F11/25
摘要： PURPOSE:To enable the indication of results in the comparison of the results of a logic operation with actual outputs from a circuit to be measured by providing a logic analyzer with a logic function. CONSTITUTION:A logical expression of a logic circuit is inputted from a keyboard 30 and memorized in an expression area of a CPU/RAM in a RAM28. A CPU24 analyzes a syntax analysis of the logical expression memorized in a CPU/RAM of the RAM28. According to the results of the analysis, data is taken out of the first area of the CPU/RAM of the RAM28 and computed by a subroutine of the logic operation memorized in an ROM26 and the results are memorized in the second area of the CPU/RAM of the RAM28. The logical expression inputted and the data in the second area of the RAM28 are memorized in a display RAM of the RAM28 as font information and the contents of the display RAM are indicated on a CRT34.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式