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1. 发明专利

JP2005159335A Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2005159335A
公开(公告)日：2005-06-16
申请号：JP2004314628
申请日：2004-10-28
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： IIZUKA KATSUHIKO , OKADA KAZUHISA
IPC分类号： H01L21/28 , H01L21/336 , H01L29/78 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method, wherein scraping of a silicon substrate and carbon contamination are not generated in formation of a transistor which has LDD structure and a silicide layer formed by salicide.
SOLUTION: A gate insulating film 2 is formed on the silicon substrate 1, and an insulating film 4 of the same kind the material is that of the gate insulating film 2 is formed on a gate electrode 3. Then, a first insulating film 6, which is different from material of the insulating film 4 on the gate insulating film 2 and on the gate electrode 3, and a second insulating film, which is the same as the material of the insulating film 4 on the gate insulating film 2 and on the gate electrode 3, are formed. After that, a spacer 8 with the second insulating film is formed by using dry etching the LDD structure is formed by using wet etching, and an opening for silicide layer formation is formed.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种制造方法，其中在形成具有LDD结构的晶体管和由硅化物形成的硅化物层的情况下，不会产生硅衬底的刮擦和碳污染。解决方案：在硅衬底1上形成栅极绝缘膜2，并且在栅极电极3上形成与栅极绝缘膜2的材料相同种类的绝缘膜4.然后，第一绝缘与栅极绝缘膜2和栅电极3上的绝缘膜4的材料不同的膜6和与栅极绝缘膜2上的绝缘膜4的材料相同的第二绝缘膜并且形成在栅电极3上。之后，通过使用干蚀刻形成具有第二绝缘膜的间隔件8，通过使用湿蚀刻形成LDD结构，并且形成用于硅化物层形成的开口。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2009267151A Semiconductor device, and manufacturing method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009267151A
公开(公告)日：2009-11-12
申请号：JP2008116036
申请日：2008-04-25
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： OKADA KAZUHISA , SEKI YOSHINORI , SHINOKI HIROYUKI
IPC分类号： H01L31/10
摘要： PROBLEM TO BE SOLVED: To provide a high-performance semiconductor device capable of reducing noise of a light-receiving element due to a so-called stray light by reducing a reflected light of light incident onto the side surface of a through-hole formed on a support on a light-receiving element forming region.
SOLUTION: An irregular reflection surface 7 having an unevenness for irregularly reflecting incident light is formed on a through-hole side wall 13 formed on the through-hole 20 of the support 5, alternatively, a light absorbing film 8 for absorbing the incident light is formed on the through-hole side wall 13. Thus, the reflected light which is received by the light-emitting element from the through-hole side wall 13 is reduced.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供一种能够通过减少入射到贯通孔的侧面的光的反射光而由于所谓的杂散光而降低光接收元件的噪声的高性能半导体器件，孔形成在光接收元件形成区域上的支撑件上。解决方案：在形成在支撑件5的通孔20上的通孔侧壁13上形成具有用于不规则地反射入射光的凹凸的不规则反射表面7，或者，用于吸收入射光形成在通孔侧壁13上。因此，从通孔侧壁13被发光元件接收的反射光减少。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2008108764A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008108764A
公开(公告)日：2008-05-08
申请号：JP2006287249
申请日：2006-10-23
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： MORITA YUICHI , NOMA TAKASHI , SHINOKI HIROYUKI , ISHIBE SHINZO , KITAGAWA KATSUHIKO , OKUBO NOBORU , OKADA KAZUHISA , YAMADA KOJI
IPC分类号： H01L23/12
CPC分类号： H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/30 , H01L27/14618 , H01L27/14683 , H01L2224/0401 , H01L2224/05599 , H01L2224/13099 , H01L2224/29101 , H01L2224/2919 , H01L2924/0001 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/09701 , H01L2924/10156 , H01L2924/15151 , H01L2924/15311 , H01L2924/00 , H01L2924/3512
摘要： PROBLEM TO BE SOLVED: To provide a reliable and compact package type semiconductor device, and to provide a method of manufacturing the semiconductor device. SOLUTION: Etching is performed selectively from the rear side of a semiconductor substrate 2, where a device element 1, a pad electrode 4, and a first insulating film 3 are formed on a surface, for forming an opening. A second insulating film 9, which covers the side and rear of the semiconductor substrate 2, is formed. The first and second insulating films 3, 9 at the bottom of the opening are removed selectively for exposing the pad electrode 4 partially. A wiring layer 10 connected to the exposed pad electrode 4 electrically is formed along the side of the semiconductor substrate 2. Then, an electrode connection layer 11 covering the wiring layer 10 is formed. The rear side of the semiconductor substrate 2 is covered for forming a protective layer 12 having the opening in a sidewall electrode formation region. A sidewall electrode 13 is formed in a region exposed by the opening of the protective layer 12. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供可靠且紧凑的封装型半导体器件，并提供制造半导体器件的方法。解决方案：从半导体衬底2的后侧选择性地进行蚀刻，其中器件元件1，焊盘电极4和第一绝缘膜3形成在表面上，用于形成开口。形成覆盖半导体基板2的侧面和背面的第二绝缘膜9。选择性地去除开口底部的第一和第二绝缘膜3,9以部分地暴露焊盘电极4。沿着半导体基板2的侧面形成与露出的焊盘电极4电连接的布线层10.然后，形成覆盖布线层10的电极连接层11。半导体衬底2的后侧被覆盖以形成在侧壁电极形成区域中具有开口的保护层12。侧壁电极13形成在由保护层12的开口露出的区域中。（C）2008，JPO＆INPIT

4. 发明专利

JP2007165696A Semiconductor device, and process for fabrication thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007165696A
公开(公告)日：2007-06-28
申请号：JP2005361707
申请日：2005-12-15
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： NOMA TAKASHI , OKADA KAZUHISA , ISHIBE SHINZO , KITAGAWA KATSUHIKO , MORITA YUICHI , OTSUKA SHIGEKI , YAMADA KOJI , OKUBO NOBORU , SHINOKI HIROYUKI , OKIKAWA MITSURU
IPC分类号： H01L31/02 , H01L23/12 , H01L27/14
CPC分类号： H01L27/14618 , H01L27/14636 , H01L31/0203 , H01L2224/05001 , H01L2224/05008 , H01L2224/05024 , H01L2224/05124 , H01L2224/05147 , H01L2224/05548 , H01L2224/05624 , H01L2224/05647 , H01L2224/10 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device free from problems which cause a wiring pattern formed on the rear of a semiconductor substrate to come out in an output image. SOLUTION: A light receiving element 1 such as a CCD image sensor or CMOS image sensor capable of sensing an infrared ray is formed at the surface of a semiconductor substrate 2 and multiple ball-like conductive terminals 11 are placed on the rear of the semiconductor substrate 2. Each of these conductive terminals 11 is electrically connected to a pad electrode 4 on the surface of the semiconductor substrate 2 via a wiring layer 9. Viewed vertically, the wiring layer 9 and the conductive terminal 11 are formed in an area which lies on the rear of the semiconductor substrate 2 but does not overlap an area for forming the light receiving element 1, to ensure that the wiring layer 9 and conductive terminal 11 are not placed in an area for forming the light receiving element 1. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供一种没有导致在半导体衬底的后部形成的布线图案在输出图像中出来的问题的半导体器件。解决方案：在半导体衬底2的表面上形成诸如能够感测红外线的CCD图像传感器或CMOS图像传感器的光接收元件1，并且多个球状导电端子11被放置在半导体衬底2.这些导电端子11中的每一个经由布线层9电连接到半导体衬底2的表面上的焊盘电极4.垂直地观察布线层9和导电端子11形成在区域其位于半导体衬底2的后部，但不与用于形成光接收元件1的区域重叠，以确保布线层9和导电端子11不被放置在用于形成光接收元件1的区域中。 P>版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2005159336A Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2005159336A
公开(公告)日：2005-06-16
申请号：JP2004314629
申请日：2004-10-28
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： IIZUKA KATSUHIKO , OKADA KAZUHISA , MORI TOMONORI , DOBASHI HIROYUKI , HONDA TAKAYOSHI , SUZUKI HIROYUKI , TANIGUCHI TOSHIMITSU
IPC分类号： H01L21/28 , H01L21/336 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/78 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To form an LDD structure and a salicide region, without causing generation of scraping of a silicon substrate or carbon contamination.
SOLUTION: When a spacer 6 is formed on the side surface of a gate electrode 3, etching of an insulating film 5 is performed, by dividing the etching into two steps of dry etching and wet etching. Moreover, a silicon nitride film is used as a buffer film in the case of high concentration impurity injection, and removing of this film is performed by wet etching. As a result, scraping of the silicon substrate 1 and carbon contamination can be prevented. Further, the depth of the impurity region and a silicide formation region and in-plane variations of resistance become small from the high state of selection ratio which is a feature of wet etching.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了形成LDD结构和自对准硅化物区域，不会产生刮擦硅衬底或碳污染物。解决方案：当在栅电极3的侧表面上形成间隔物6时，通过将蚀刻分为干法蚀刻和湿蚀刻两个步骤来进行绝缘膜5的蚀刻。此外，在高浓度杂质注入的情况下，使用氮化硅膜作为缓冲膜，并且通过湿蚀刻进行该膜的去除。结果，可以防止硅衬底1的刮擦和碳污染。此外，杂质区域和硅化物形成区域的深度以及电阻的面内变化从作为湿蚀刻特征的高选择率状态变小。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2009267152A Semiconductor device, and manufacturing method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2009267152A
公开(公告)日：2009-11-12
申请号：JP2008116037
申请日：2008-04-25
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： OKADA KAZUHISA , SEKI YOSHINORI , SHINOKI HIROYUKI
IPC分类号： H01L31/02
摘要： PROBLEM TO BE SOLVED: To achieve a high-performance semiconductor device capable of reducing noise of a light-receiving element due to a so-called stray light by reducing a reflected light of light incident into the side surface of a through-hole formed on a support on a light-receiving element forming region.
SOLUTION: In order to reduce a reflected light reaching a forming region of a light-receiving element 1 from a through-hole side wall 13 of the support 5, the through-hole side wall 13 is formed to have an inclination of overhang shape or reverse tapered shape, or an gradual inclination angle. Alternatively, the upper surface of the through-hole 20 provided on the support 5 is covered with a barrier layer 7 serving as an opening 40 of a diameter smaller than the diameter of the through-hole 20, thereby eliminating or reducing the reflected light reaching the forming region of the light-receiving element 1 from the through-hole side wall 13.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了实现能够通过减少入射到贯通孔的侧表面的光的反射光而由于所谓的杂散光而降低光接收元件的噪声的高性能半导体器件，孔形成在光接收元件形成区域上的支撑件上。解决方案：为了从支撑件5的通孔侧壁13减少到达光接收元件1的形成区域的反射光，通孔侧壁13形成为具有悬垂形状或倒锥形，或逐渐倾斜的角度。或者，设置在支撑体5上的通孔20的上表面被作为直径小于通孔20的直径的开口40的阻挡层7覆盖，从而消除或减少到达的反射光来自通孔侧壁13的光接收元件1的形成区域。（C）2010，JPO＆INPIT

7. 发明专利

JP2008294405A Semiconductor device, and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008294405A
公开(公告)日：2008-12-04
申请号：JP2008066297
申请日：2008-03-14
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： OKADA KAZUHISA , SHINOKI HIROYUKI , SEKI YOSHINORI , YAMADA KOJI
IPC分类号： H01L21/3205 , H01L23/12 , H01L23/52
CPC分类号： H01L24/97 , H01L24/05 , H01L24/13 , H01L24/29 , H01L24/32 , H01L27/14618 , H01L27/14683 , H01L29/0657 , H01L2224/0401 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12043 , H01L2924/15311 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To enhance moisture resistance between a supporting body and an adhesive layer, and to enhance the reliability of a semiconductor device. SOLUTION: A semiconductor device of the invention has a first insulation film 2 formed on a semiconductor element, a first wiring 3 formed on the first insulation film 2, a supporting body 8 formed on the semiconductor element with an adhesive layer 7 being interposed therebetween, a third insulation film 11 covering the back surface of the semiconductor element onto the side surface thereof and the side surface of the adhesive layer 7, a second wiring 12 connected to the first wiring 3 and extending onto the back surface of the semiconductor element with the third insulation film 11 being interposed therebetween, and a protection film 13 formed on the second wiring 12. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提高支撑体和粘合剂层之间的耐湿性，并且提高半导体器件的可靠性。解决方案：本发明的半导体器件具有形成在半导体元件上的第一绝缘膜2，形成在第一绝缘膜2上的第一布线3，形成在半导体元件上的具有粘合层7的支撑体8 插入其间的第三绝缘膜11覆盖半导体元件的侧表面和粘合剂层7的侧表面;第二布线12，连接到第一布线3并延伸到半导体的背面元件，其间夹有第三绝缘膜11，以及形成在第二布线12上的保护膜13.版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2008041892A Semiconductor device, and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008041892A
公开(公告)日：2008-02-21
申请号：JP2006213483
申请日：2006-08-04
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： OKADA KAZUHISA , YAMADA KOJI , KITAGAWA KATSUHIKO , NOMA TAKASHI , OKUBO NOBORU , MORITA YUICHI , ISHIBE SHINZO , SHINOKI HIROYUKI
IPC分类号： H01L23/12 , H01L21/3205 , H01L23/52 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L2224/16145 , H01L2924/01013 , H01L2924/01029 , H01L2924/1461 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To simplify a manufacturing process of a semiconductor device, and cut down its cost, and further, thin its thickness, and moreover, minimize it, in the packaged semiconductor device; and to provide its manufacturing method. SOLUTION: In the packaged semiconductor device, a device element 1 is formed on a semiconductor substrate 2, and each pad electrode 4 connected electrically with the device element 1 is formed. A supporting body 7 is stuck on the front surface of the semiconductor substrate 2 via an adhesive layer 6. Further, a protective layer 11 for covering therewith the side and rear surfaces of the semiconductor substrate 2 is so formed as to open its position corresponding to each pad electrode 4. Moreover, each conductive terminal 12 is formed on each pad electrode 4 in the position of the opening formed in the protective layer 11. Furthermore, no wiring and no conductive terminal are formed on the rear surface of the semiconductor substrate 2, and each conductive terminal 12 is so formed that it is on the outer periphery of the supporting body 7 and is adjacent to the outside of the side wall of the semiconductor substrate 2. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了简化半导体器件的制造工艺并降低其成本，并且进一步减小封装半导体器件中的厚度，进而使其最小化; 并提供其制造方法。解决方案：在封装的半导体器件中，在半导体衬底2上形成器件元件1，并且形成与器件元件1电连接的每个焊盘电极4。支撑体7通过粘合剂层6粘附在半导体衬底2的前表面上。此外，用于覆盖半导体衬底2的侧表面和后表面的保护层11被形成为打开其对应于每个焊盘电极4.此外，在形成在保护层11中的开口的位置上，在每个焊盘电极4上形成每个导电端子12.此外，在半导体基板2的后表面上不形成布线和导电端子并且每个导电端子12被形成为在支撑体7的外周上并且与半导体衬底2的侧壁的外侧相邻。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2007242813A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007242813A
公开(公告)日：2007-09-20
申请号：JP2006061713
申请日：2006-03-07
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： NOMA TAKASHI , OTSUKA SHIGEKI , MORITA YUICHI , OKADA KAZUHISA , YAMADA KOJI , KITAGAWA KATSUHIKO , OKUBO NOBORU , ISHIBE SHINZO , SHINOKI HIROYUKI
IPC分类号： H01L23/12 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L2224/16145 , H01L2924/01013 , H01L2924/01029
摘要： PROBLEM TO BE SOLVED: To provide a means for simplifying the manufacturing process of a packaged semiconductor device, and making the package-type semiconductor device decrease in cost, thickness and size in a package-type semiconductor device; and to provide its manufacturing method. SOLUTION: A device element 1 is formed on a semiconductor substrate 2, and pad electrodes 4 electrically connected to the device element 1 are formed. A support 7 is pasted on the surface of the semiconductor substrate 2 through an adhesive layer 6. A protective layer 11 is provided with openings located at positions corresponding to the pad electrodes 4, and is formed to cover the side and rear of the semiconductor substrate 2. An electrically conductive terminal 12 is formed on each of the pad electrodes 4 located at the openings provided to the protective layer 11. Electrically conductive terminals are not formed on the rear of the semiconductor substrate 2, but the electrically conductive terminals 12 are formed above the periphery of the support 7 and adjacent to the outside of the side walls of the semiconductor substrate 2. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种简化封装半导体器件的制造工艺的方法，并且使封装型半导体器件在封装型半导体器件中的成本，厚度和尺寸降低; 并提供其制造方法。解决方案：在半导体衬底2上形成器件元件1，形成与器件元件1电连接的焊盘电极4。支撑体7通过粘合剂层6粘贴在半导体衬底2的表面上。保护层11设置有位于与焊盘电极4相对应的位置处的开口，并且形成为覆盖半导体衬底的侧面和后部在位于设置于保护层11的开口的每个焊盘电极4上形成导电端子12.导电端子不形成在半导体基板2的后部，但形成导电端子12 在支撑体7的周边上并且与半导体衬底2的侧壁的外侧相邻。版权所有：（C）2007，JPO＆INPIT

10. 发明专利

JP2007189198A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2007189198A
公开(公告)日：2007-07-26
申请号：JP2006310623
申请日：2006-11-16
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： OKADA KAZUHISA , KITAGAWA KATSUHIKO , NOMA TAKASHI , OTSUKA SHIGEKI , YAMADA KOJI , ISHIBE SHINZO , MORITA YUICHI , OKUBO NOBORU , SHINOKI HIROYUKI , OKIKAWA MITSURU
IPC分类号： H01L31/02 , H01L21/3205 , H01L23/52 , H01L27/14
CPC分类号： H01L27/14618 , H01L23/481 , H01L27/14625 , H01L31/0203 , H01L31/02327 , H01L2224/02371 , H01L2224/02372 , H01L2224/0401 , H01L2224/05 , H01L2224/05548 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2924/014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an outputted image.
SOLUTION: A reflection layer 8 is formed between a light receiving element 1 and a wiring layer 10 for reflecting an infrared ray toward a light receiving element 1, without transmitting it to the wiring layer 10. The infrared ray enters from a light transparent substrate 6 toward the wiring layer 10 through a semiconductor substrate 2. The reflection layer 8 may also be formed at least in a region under the light receiving element 1 uniformly, or only under the light receiving element 1. Alternatively, instead of the reflection layer 8, an anti-reflection layer 30 having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种解决在输出图像上形成在半导体衬底的背面上的布线的图案的反射问题的半导体器件。解决方案：在光接收元件1和用于将红外线反射到光接收元件1的布线层10之间形成反射层8，而不将其传输到布线层10.红外线从光线透明基板6通过半导体基板2朝向布线层10.反射层8也可以至少在光接收元件1的下方的区域内均匀地形成，或者仅形成在光接收元件1的下方。或者，代替反射可以形成具有吸收入射红外线以防止透射的功能的防反射层30。版权所有（C）2007，JPO＆INPIT

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