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1. 发明专利

JP2008294405A Semiconductor device, and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008294405A
公开(公告)日：2008-12-04
申请号：JP2008066297
申请日：2008-03-14
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： OKADA KAZUHISA , SHINOKI HIROYUKI , SEKI YOSHINORI , YAMADA KOJI
IPC分类号： H01L21/3205 , H01L23/12 , H01L23/52
CPC分类号： H01L24/97 , H01L24/05 , H01L24/13 , H01L24/29 , H01L24/32 , H01L27/14618 , H01L27/14683 , H01L29/0657 , H01L2224/0401 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12043 , H01L2924/15311 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To enhance moisture resistance between a supporting body and an adhesive layer, and to enhance the reliability of a semiconductor device. SOLUTION: A semiconductor device of the invention has a first insulation film 2 formed on a semiconductor element, a first wiring 3 formed on the first insulation film 2, a supporting body 8 formed on the semiconductor element with an adhesive layer 7 being interposed therebetween, a third insulation film 11 covering the back surface of the semiconductor element onto the side surface thereof and the side surface of the adhesive layer 7, a second wiring 12 connected to the first wiring 3 and extending onto the back surface of the semiconductor element with the third insulation film 11 being interposed therebetween, and a protection film 13 formed on the second wiring 12. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提高支撑体和粘合剂层之间的耐湿性，并且提高半导体器件的可靠性。解决方案：本发明的半导体器件具有形成在半导体元件上的第一绝缘膜2，形成在第一绝缘膜2上的第一布线3，形成在半导体元件上的具有粘合层7的支撑体8 插入其间的第三绝缘膜11覆盖半导体元件的侧表面和粘合剂层7的侧表面;第二布线12，连接到第一布线3并延伸到半导体的背面元件，其间夹有第三绝缘膜11，以及形成在第二布线12上的保护膜13.版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2008270573A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2008270573A
公开(公告)日：2008-11-06
申请号：JP2007112336
申请日：2007-04-20
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： HORIKOSHI MASARU , UCHIYAMA HISAYOSHI , NOMA TAKASHI , SEKI YOSHINORI , YAMADA KOJI , ISHIBE SHINZO , SHINOKI HIROYUKI
IPC分类号： H01L21/822 , H01L23/12 , H01L27/04
CPC分类号： H01L23/642 , H01L23/3114 , H01L23/481 , H01L23/5223 , H01L24/11 , H01L24/12 , H01L24/25 , H01L24/29 , H01L24/32 , H01L27/14618 , H01L27/14683 , H01L2224/02313 , H01L2224/0401 , H01L2224/0558 , H01L2224/05644 , H01L2224/1132 , H01L2224/131 , H01L2224/18 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3511 , H01L2924/3512 , H01L2224/13099 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which is equipped with a capacitance element in the same semiconductor device to make the overall device compact, the capacitance element having larger electrostatic capacity than conventionally.
SOLUTION: A semiconductor integrated circuit 1 and a pad electrode 4 are formed on the top surface of a semiconductor substrate 2. A second insulating film 10 is formed on a flank and a reverse surface of the semiconductor substrate 2, and a capacity electrode 9, which is in contact with the reverse surface of the semiconductor substrate 2, is formed between the reverse surface of the semiconductor substrate 2 and the second insulating film 10. The second insulating film 10 is covered with a wiring layer 11 electrically connected to the pad electrode 4, and the wiring layer 11 and capacity electrode 9 overlap each other, via the second insulating film 10 interposed. Accordingly, a capacitor 16 is formed of the capacity electrode 9, the second insulating film 10 and the wiring layer 11.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供在相同的半导体器件中配备有电容元件以使整个器件紧凑的半导体器件，电容元件具有比常规更大的静电电容。解决方案：在半导体衬底2的顶表面上形成半导体集成电路1和焊盘电极4.第二绝缘膜10形成在半导体衬底2的侧面和反面上，与半导体基板2的背面接触的电极9形成在半导体基板2的背面和第二绝缘膜10之间。第二绝缘膜10被布线层11覆盖，该布线层11电连接到焊盘电极4以及布线层11和电容电极9经由第二绝缘膜10彼此重叠。因此，电容器16由电容电极9，第二绝缘膜10和布线层11形成。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2008041892A Semiconductor device, and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008041892A
公开(公告)日：2008-02-21
申请号：JP2006213483
申请日：2006-08-04
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： OKADA KAZUHISA , YAMADA KOJI , KITAGAWA KATSUHIKO , NOMA TAKASHI , OKUBO NOBORU , MORITA YUICHI , ISHIBE SHINZO , SHINOKI HIROYUKI
IPC分类号： H01L23/12 , H01L21/3205 , H01L23/52 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L2224/16145 , H01L2924/01013 , H01L2924/01029 , H01L2924/1461 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To simplify a manufacturing process of a semiconductor device, and cut down its cost, and further, thin its thickness, and moreover, minimize it, in the packaged semiconductor device; and to provide its manufacturing method. SOLUTION: In the packaged semiconductor device, a device element 1 is formed on a semiconductor substrate 2, and each pad electrode 4 connected electrically with the device element 1 is formed. A supporting body 7 is stuck on the front surface of the semiconductor substrate 2 via an adhesive layer 6. Further, a protective layer 11 for covering therewith the side and rear surfaces of the semiconductor substrate 2 is so formed as to open its position corresponding to each pad electrode 4. Moreover, each conductive terminal 12 is formed on each pad electrode 4 in the position of the opening formed in the protective layer 11. Furthermore, no wiring and no conductive terminal are formed on the rear surface of the semiconductor substrate 2, and each conductive terminal 12 is so formed that it is on the outer periphery of the supporting body 7 and is adjacent to the outside of the side wall of the semiconductor substrate 2. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了简化半导体器件的制造工艺并降低其成本，并且进一步减小封装半导体器件中的厚度，进而使其最小化; 并提供其制造方法。解决方案：在封装的半导体器件中，在半导体衬底2上形成器件元件1，并且形成与器件元件1电连接的每个焊盘电极4。支撑体7通过粘合剂层6粘附在半导体衬底2的前表面上。此外，用于覆盖半导体衬底2的侧表面和后表面的保护层11被形成为打开其对应于每个焊盘电极4.此外，在形成在保护层11中的开口的位置上，在每个焊盘电极4上形成每个导电端子12.此外，在半导体基板2的后表面上不形成布线和导电端子并且每个导电端子12被形成为在支撑体7的外周上并且与半导体衬底2的侧壁的外侧相邻。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2007189198A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2007189198A
公开(公告)日：2007-07-26
申请号：JP2006310623
申请日：2006-11-16
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： OKADA KAZUHISA , KITAGAWA KATSUHIKO , NOMA TAKASHI , OTSUKA SHIGEKI , YAMADA KOJI , ISHIBE SHINZO , MORITA YUICHI , OKUBO NOBORU , SHINOKI HIROYUKI , OKIKAWA MITSURU
IPC分类号： H01L31/02 , H01L21/3205 , H01L23/52 , H01L27/14
CPC分类号： H01L27/14618 , H01L23/481 , H01L27/14625 , H01L31/0203 , H01L31/02327 , H01L2224/02371 , H01L2224/02372 , H01L2224/0401 , H01L2224/05 , H01L2224/05548 , H01L2224/13022 , H01L2224/13024 , H01L2224/131 , H01L2924/014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an outputted image.
SOLUTION: A reflection layer 8 is formed between a light receiving element 1 and a wiring layer 10 for reflecting an infrared ray toward a light receiving element 1, without transmitting it to the wiring layer 10. The infrared ray enters from a light transparent substrate 6 toward the wiring layer 10 through a semiconductor substrate 2. The reflection layer 8 may also be formed at least in a region under the light receiving element 1 uniformly, or only under the light receiving element 1. Alternatively, instead of the reflection layer 8, an anti-reflection layer 30 having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种解决在输出图像上形成在半导体衬底的背面上的布线的图案的反射问题的半导体器件。解决方案：在光接收元件1和用于将红外线反射到光接收元件1的布线层10之间形成反射层8，而不将其传输到布线层10.红外线从光线透明基板6通过半导体基板2朝向布线层10.反射层8也可以至少在光接收元件1的下方的区域内均匀地形成，或者仅形成在光接收元件1的下方。或者，代替反射可以形成具有吸收入射红外线以防止透射的功能的防反射层30。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2008130768A Semiconductor device, and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008130768A
公开(公告)日：2008-06-05
申请号：JP2006313379
申请日：2006-11-20
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： KITAGAWA KATSUHIKO , SHINOKI HIROYUKI , ISHIBE SHINZO , YAMADA KOJI
IPC分类号： H01L31/02 , H01L23/02
CPC分类号： H01L31/0203 , H01L31/0224 , H01L31/18 , H01L2224/48091 , H01L2224/48227 , H01L2224/8592 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To achieve improvement in reliability and yield in a semiconductor device that receives blue-violet laser light. SOLUTION: A device element 1 for converting a blue-violet laser into an electrical signal is formed on the surface of a semiconductor substrate 2. A light-transmissive substrate 7 is stuck onto the surface of the semiconductor substrate 2 via an adhesive layer 6. The adhesive layer 6 includes transparent silicone. The surface of the device element 1 is covered with the light-transmissive substrate 7 so as to suppress foreign matter from being deposited on the surface of the device element 1. The adhesive layer 6 is also covered with the light-transmissive substrate 7. Therefore, the adhesive layer 6 is prevented from being in contact with outside air. As a result, it is possible to suppress deterioration of the adhesive layer 6 due to a blue-violet laser. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：在接收蓝紫色激光的半导体器件中实现可靠性和产量的提高。解决方案：在半导体衬底2的表面上形成用于将蓝紫色激光转换成电信号的器件元件1.透光衬底7通过粘合剂粘附到半导体衬底2的表面上粘合剂层6包括透明硅氧烷。器件元件1的表面被透光性基板7覆盖，以抑制异物沉积在器件元件1的表面上。粘合剂层6也被透光性基板7覆盖。因此，防止粘合剂层6与外部空气接触。结果，可以抑制由于蓝紫色激光而导致的粘合剂层6的劣化。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2008258318A Semiconductor chip, its packaging method and semiconductor device 有权
标题翻译：半导体芯片，其包装方法和半导体器件
公开(公告)号：JP2008258318A
公开(公告)日：2008-10-23
申请号：JP2007097492
申请日：2007-04-03
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： KITAGAWA KATSUHIKO , SHINOKI HIROYUKI , YAMADA KOJI , NOMA TAKASHI , MORITA YUICHI
IPC分类号： H01L21/60 , H01L23/12
CPC分类号： H01L2224/16 , H01L2924/1305 , H01L2924/13091 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor chip and its packaging method which facilitate repair work after packaging and also suppress manufacturing cost, and a semiconductor device packaging the semiconductor chip. SOLUTION: A projection electrode 3 is formed on the back of a semiconductor substrate 1. Next, a sealing resin 5 is selectively formed on the back of the semiconductor substrate 1. At least a part of the projection electrode 3 is not covered with the sealing resin 5 and exposed from the outer peripheral direction of the individual semiconductor chip. Next, the semiconductor substrate 1 is cut along a predetermined dicing line DL to be divided into the semiconductor chips 10. Next, the projection electrode 3 is connected to a pad electrode 11, and when heat treatment is applied in this state, the projection electrode 3 is jointed to the pad electrode 11. In this process, the sealing resin 5 in a semi-hardened state is softened so as to be charged into a part between the semiconductor chip 10 and a packaging substrate 12, and the semiconductor chip 10 is bonded to the packaging substrate 12. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体芯片及其包装方法，其有助于封装后的维修工作，并且还抑制制造成本，以及半导体器件封装半导体芯片。解决方案：在半导体基板1的背面上形成有突起电极3.接下来，在半导体基板1的背面选择性地形成密封树脂5.突起电极3的至少一部分未被覆盖与密封树脂5并且从各个半导体芯片的外周方向露出。接下来，将半导体衬底1沿着预定的切割线DL切割以分成半导体芯片10.接下来，将突起电极3连接到焊盘电极11，并且当在该状态下进行热处理时，投影电极在这种方法中，将半硬化状态的密封树脂5软化，以将其装入半导体芯片10和封装基板12之间的部分，半导体芯片10为粘合到包装基材12上。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2008108764A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008108764A
公开(公告)日：2008-05-08
申请号：JP2006287249
申请日：2006-10-23
申请人： Sanyo Electric Co Ltd , Sanyo Semiconductor Co Ltd , 三洋半導体株式会社 , 三洋電機株式会社
发明人： MORITA YUICHI , NOMA TAKASHI , SHINOKI HIROYUKI , ISHIBE SHINZO , KITAGAWA KATSUHIKO , OKUBO NOBORU , OKADA KAZUHISA , YAMADA KOJI
IPC分类号： H01L23/12
CPC分类号： H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/30 , H01L27/14618 , H01L27/14683 , H01L2224/0401 , H01L2224/05599 , H01L2224/13099 , H01L2224/29101 , H01L2224/2919 , H01L2924/0001 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/09701 , H01L2924/10156 , H01L2924/15151 , H01L2924/15311 , H01L2924/00 , H01L2924/3512
摘要： PROBLEM TO BE SOLVED: To provide a reliable and compact package type semiconductor device, and to provide a method of manufacturing the semiconductor device. SOLUTION: Etching is performed selectively from the rear side of a semiconductor substrate 2, where a device element 1, a pad electrode 4, and a first insulating film 3 are formed on a surface, for forming an opening. A second insulating film 9, which covers the side and rear of the semiconductor substrate 2, is formed. The first and second insulating films 3, 9 at the bottom of the opening are removed selectively for exposing the pad electrode 4 partially. A wiring layer 10 connected to the exposed pad electrode 4 electrically is formed along the side of the semiconductor substrate 2. Then, an electrode connection layer 11 covering the wiring layer 10 is formed. The rear side of the semiconductor substrate 2 is covered for forming a protective layer 12 having the opening in a sidewall electrode formation region. A sidewall electrode 13 is formed in a region exposed by the opening of the protective layer 12. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供可靠且紧凑的封装型半导体器件，并提供制造半导体器件的方法。解决方案：从半导体衬底2的后侧选择性地进行蚀刻，其中器件元件1，焊盘电极4和第一绝缘膜3形成在表面上，用于形成开口。形成覆盖半导体基板2的侧面和背面的第二绝缘膜9。选择性地去除开口底部的第一和第二绝缘膜3,9以部分地暴露焊盘电极4。沿着半导体基板2的侧面形成与露出的焊盘电极4电连接的布线层10.然后，形成覆盖布线层10的电极连接层11。半导体衬底2的后侧被覆盖以形成在侧壁电极形成区域中具有开口的保护层12。侧壁电极13形成在由保护层12的开口露出的区域中。（C）2008，JPO＆INPIT

8. 发明专利

JP2007242813A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2007242813A
公开(公告)日：2007-09-20
申请号：JP2006061713
申请日：2006-03-07
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： NOMA TAKASHI , OTSUKA SHIGEKI , MORITA YUICHI , OKADA KAZUHISA , YAMADA KOJI , KITAGAWA KATSUHIKO , OKUBO NOBORU , ISHIBE SHINZO , SHINOKI HIROYUKI
IPC分类号： H01L23/12 , H01L25/10 , H01L25/11 , H01L25/18
CPC分类号： H01L2224/16145 , H01L2924/01013 , H01L2924/01029
摘要： PROBLEM TO BE SOLVED: To provide a means for simplifying the manufacturing process of a packaged semiconductor device, and making the package-type semiconductor device decrease in cost, thickness and size in a package-type semiconductor device; and to provide its manufacturing method. SOLUTION: A device element 1 is formed on a semiconductor substrate 2, and pad electrodes 4 electrically connected to the device element 1 are formed. A support 7 is pasted on the surface of the semiconductor substrate 2 through an adhesive layer 6. A protective layer 11 is provided with openings located at positions corresponding to the pad electrodes 4, and is formed to cover the side and rear of the semiconductor substrate 2. An electrically conductive terminal 12 is formed on each of the pad electrodes 4 located at the openings provided to the protective layer 11. Electrically conductive terminals are not formed on the rear of the semiconductor substrate 2, but the electrically conductive terminals 12 are formed above the periphery of the support 7 and adjacent to the outside of the side walls of the semiconductor substrate 2. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种简化封装半导体器件的制造工艺的方法，并且使封装型半导体器件在封装型半导体器件中的成本，厚度和尺寸降低; 并提供其制造方法。解决方案：在半导体衬底2上形成器件元件1，形成与器件元件1电连接的焊盘电极4。支撑体7通过粘合剂层6粘贴在半导体衬底2的表面上。保护层11设置有位于与焊盘电极4相对应的位置处的开口，并且形成为覆盖半导体衬底的侧面和后部在位于设置于保护层11的开口的每个焊盘电极4上形成导电端子12.导电端子不形成在半导体基板2的后部，但形成导电端子12 在支撑体7的周边上并且与半导体衬底2的侧壁的外侧相邻。版权所有：（C）2007，JPO＆INPIT

9. 发明专利

JP2006041332A Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2006041332A
公开(公告)日：2006-02-09
申请号：JP2004221438
申请日：2004-07-29
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： YAMADA KOJI , YAMAGUCHI KEIICHI
IPC分类号： H01L23/12
CPC分类号： H01L24/10 , H01L21/78 , H01L23/3114 , H01L24/13 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05124 , H01L2224/05147 , H01L2224/05548 , H01L2224/05569 , H01L2224/05624 , H01L2224/05647 , H01L2224/13 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01072 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/00 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To improve reliability in the separation process of a layer to be patterned like a wiring layer in a method for manufacturing a semiconductor device. SOLUTION: The wiring layer 18 is formed on the back of a semiconductor substrate 10 containing an opening 10w. A third resist layer 19 (positive resist layer) which opens a predetermined region 10a which runs along the dicing line DL of the bottom of the opening 10w is formed on the wiring layer 18, and the wiring layer 18 is etched by using the layer 19 as a mask. After eliminating the third resist layer 19, a fourth resist layer 20 (negative resist layer) is formed on the wiring layer 18 so that the wiring layer is left corresponding to a predetermined pattern, and the wiring layer 18 is etched by using the layer 20 as a mask. By the above processes, the wiring layer 18 is patterned so that certain isolation is performed while installing the predetermined pattern in the predetermined region 10a which runs along the dicing line DL of the bottom of the opening 10w. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提高半导体器件的制造方法中的布线层的图案化层的分离工艺的可靠性。解决方案：布线层18形成在包含开口10w的半导体衬底10的背面上。在布线层18上形成开放沿着开口部10w的底部的切割线DL延伸的预定区域10a的第三抗蚀剂层19（正性抗蚀剂层），并且通过使用层19蚀刻布线层18 作为面具。在去除第三抗蚀剂层19之后，在布线层18上形成第四抗蚀剂层20（负抗蚀剂层），使得布线层对应于预定图案，并且通过使用层20来蚀刻布线层18 作为面具。通过上述处理，对布线层18进行图案化，使得在沿着开口10w的底部的切割线DL延伸的预定区域10a中安装预定图案的同时进行一定的隔离。版权所有（C）2006，JPO＆NCIPI

10. 发明专利

JP2010098337A Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：JP2010098337A
公开(公告)日：2010-04-30
申请号：JP2010021808
申请日：2010-02-03
申请人： Sanyo Electric Co Ltd , 三洋電機株式会社
发明人： NOMA TAKASHI , SHINOKI HIROYUKI , SUZUKI AKIRA , SEKI YOSHINORI , KUHARA KOICHI , TAKAO YUKIHIRO , YAMADA KOJI
IPC分类号： H01L23/12 , H01L21/68 , H01L21/768 , H01L23/31 , H01L23/48 , H01L23/485
CPC分类号： H01L21/6835 , H01L21/76898 , H01L23/3114 , H01L23/3185 , H01L23/481 , H01L24/10 , H01L2221/6834 , H01L2221/68377 , H01L2224/05001 , H01L2224/05008 , H01L2224/05548 , H01L2224/05569 , H01L2224/16 , H01L2924/01019 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/1305 , H01L2924/00 , H01L2224/05644 , H01L2924/00014 , H01L2224/05655 , H01L2224/05124 , H01L2224/05147
摘要： PROBLEM TO BE SOLVED: To improve the yield and reliability of a BGA type semiconductor device having a ball-shaped conductive terminal. SOLUTION: A first glass substrate 4 is laminated on the surface of a semiconductor wafer 1a, formed with a first wiring 3, via a resin 5a. A second glass substrate 6 is laminated on the rear face of the semiconductor wafer 1a via a resin 5b. The first glass substrate 4 is partially notched so as to form a V-shaped groove VG. A second wiring 8 is formed so as to be connected with the first wiring 3 and to extend to the surface of the second glass substrate 6. Next, a protective film 9, made of an organic resin, and a resist layer R for providing an opening K in the protective film 9 are formed on the second wiring 8 by spray coating. A conductive terminal 10 is formed by screen printing while using the protective film 9 as a solder mask. In addition, a buffering member 7 may be formed on the second glass substrate 6 by spray coating. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提高具有球形导电端子的BGA型半导体器件的产率和可靠性。解决方案：通过树脂5a将第一玻璃基板4层压在形成有第一布线3的半导体晶片1a的表面上。第二玻璃基板6通过树脂5b层叠在半导体晶片1a的背面上。第一玻璃基板4被部分地切口以形成V形槽VG。第二布线8形成为与第一布线3连接并延伸到第二玻璃基板6的表面。接下来，由有机树脂制成的保护膜9和用于提供通过喷涂在第二布线8上形成保护膜9的开口K. 通过丝网印刷形成导电端子10，同时使用保护膜9作为焊接掩模。此外，缓冲部件7可以通过喷涂形成在第二玻璃基板6上。版权所有（C）2010，JPO＆INPIT

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