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1. 发明专利

JP2009111569A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2009111569A
公开(公告)日：2009-05-21
申请号：JP2007280120
申请日：2007-10-29
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： YAMAMOTO AKIO , KATSUBE YUSAKU
IPC分类号： H04B1/16 , H03H11/04 , H04B1/30
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device small in a chip occupation area and power consumption, and having a reception part capable of easily providing excellent reception quality.
SOLUTION: Each of high-pass filters 10 and 15 removing DC offset of a signal received and having a converted frequency has a CR filter, and includes a bootstrap circuit 36 increasing input impedance of the high-pass filter by selectively increasing a current flowing to a resistive element of the CR filter. The cutoff frequency of the high-pass filter is changed over in accordance with a WCDMA or HSDPA system. In the case of reception by WCDMA, the bootstrap circuit is made inactive, and the cutoff frequency is increased. In the case of reception by HSDPA, the bootstrap circuit is made active, and the cutoff frequency is decreased. By employing the bootstrap circuit carrying a current to the resistive element of the CR filter circuit, a low cutoff frequency can be provided by suppressing the increase of the chip occupation area of the CR filter circuit.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种芯片占用面积小且功耗小的半导体器件，并且具有容易提供良好的接收质量的接收部件。解决方案：去除接收并具有转换频率的信号的DC偏移的每个高通滤波器10和15具有CR滤波器，并且包括自举电路36，其通过选择性地增加高通滤波器来增加高通滤波器的输入阻抗电流流向CR滤波器的电阻元件。高通滤波器的截止频率根据WCDMA或HSDPA系统而改变。在通过WCDMA的接收的情况下，自举电路无效，截止频率增加。在HSDPA接收的情况下，自举电路被激活，截止频率降低。通过采用向CR滤波器电路的电阻元件承载电流的自举电路，可以通过抑制CR滤波器电路的占用面积的增加来提供低截止频率。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2009094734A Cut-off frequency automatic adjusting circuit and personal digital assistant 审中-公开
标题翻译：切断频率自动调节电路和个人数字助理
公开(公告)号：JP2009094734A
公开(公告)日：2009-04-30
申请号：JP2007262637
申请日：2007-10-05
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： IGARASHI YUTAKA , YAMAMOTO AKIO , KATSUBE YUSAKU
IPC分类号： H03H11/04
摘要： PROBLEM TO BE SOLVED: To automatically adjust a filter cut-off frequency with a large capacitance ratio, and to shorten the time required for automatic adjustment.
SOLUTION: A register for correcting error and a filter cut-off frequency automatic adjusting circuit are provided for each feedback capacitance and non-feedback capacitance (ground capacitance) of a channel filter circuit. Thus, the filter cut-off frequency can be adjusted without enlarging the error caused by a capacitance difference between the feedback capacitance and non-feedback capacitance.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：以大电容比自动调节滤波器截止频率，缩短自动调整所需的时间。解决方案：为通道滤波电路的每个反馈电容和非反馈电容（接地电容）提供一个用于校正误差的寄存器和一个滤波器截止频率自动调节电路。因此，可以调节滤波器截止频率而不会增大由反馈电容和非反馈电容之间的电容差引起的误差。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2008271202A Low noise amplifier circuit with gain switching 有权
标题翻译：低噪声放大器电路与增益切换
公开(公告)号：JP2008271202A
公开(公告)日：2008-11-06
申请号：JP2007111537
申请日：2007-04-20
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： IGARASHI YUTAKA , YAMAMOTO AKIO
IPC分类号： H03F1/26 , H03G3/10
CPC分类号： H03G1/0088 , H03F1/22 , H03F3/19 , H03F3/72 , H03F2200/294 , H03F2200/366 , H03F2200/492 , H03F2203/7206
摘要： PROBLEM TO BE SOLVED: To provide a LNA (low noise amplifier) with gain switching capable of suppressing a deterioration in a noise figure.
SOLUTION: The LNA with gain switching having a first transistor group (Q11 to Q18) and a second transistor group (Q21 to Q28) has a resistor R4 connected between the emitter of the transistor Q21 and the collector of a transistor Q1, and a resistor R5 connected to the emitters of the transistors Q22 to Q28 and the collector of the transistor Q1, having a resistor R5 composed of a resistance value being as 1/7 times as high as that of the resistor R4, and has no deterioration in a noise figure because isolation of the transistors Q21 to Q28, and the transistors Q1 and Q11 to Q18 which are turned off by the resistor R4 and the resistor R5 in a high gain mode is secured.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供具有能够抑制噪声系数恶化的增益切换的LNA（低噪声放大器）。解决方案：具有第一晶体管组（Q11至Q18）和第二晶体管组（Q21至Q28）的具有增益切换的LNA具有连接在晶体管Q21的发射极和晶体管Q1的集电极之间的电阻器R4，连接到晶体管Q22〜Q28的发光极和晶体管Q1的集电极的电阻器R5，其电阻器R5为电阻值为电阻器R4的电阻值的1/7倍，不劣化因为确保了以高增益模式被电阻器R4和电阻器R5截止的晶体管Q21至Q28以及晶体管Q1和Q11至Q18的隔离。版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2006229266A Voltage-controlled oscillator and rf-ic 审中-公开
标题翻译：电压控制振荡器和RF-IC
公开(公告)号：JP2006229266A
公开(公告)日：2006-08-31
申请号：JP2005037007
申请日：2005-02-15
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： IKUTA ISAO , YAMAMOTO AKIO , KATSUBE YUSAKU , UOZUMI TOSHIYA , KIMURA YASUYUKI
IPC分类号： H03B5/12
CPC分类号： H03B5/1841 , H03B5/1212 , H03B5/1228 , H03B5/1243 , H03B5/1253
摘要： PROBLEM TO BE SOLVED: To provide a voltage-controlled oscillator (RF-IC) for the W-CDMA which can take a wide frequency range and improve the oscillation stability.
SOLUTION: The voltage-controlled oscillator (RF-IC) is provided with: A, B switch inductors 12, 13 for producing magnetic interactions with A, B resonant inductors 14, 15 of a resonance circuit; and A, B, C, D_NMOS 6, 7, 8, 9 acting as a switch / load means including a switch function for switching the inductance values by the magnetic interaction between the A, B resonant inductors 14, 15 and the A, B switch inductors 12, 13 and a load function giving loads to the switching A, B inductors 12, 13. A control signal is used to turn ON / OFF the A, B, C, D_NMOS 6, 7, 8 and 9 for controlling the mutual induction and switching the inductance values of the resonance circuit and switches the oscillated frequency. Further, the inductance is increased to improve the oscillation stability.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为W-CDMA提供压控振荡器（RF-IC），其可以采用较宽的频率范围并提高振荡稳定性。解决方案：压控振荡器（RF-IC）提供有：A，B开关电感器12,13，用于产生与谐振电路的A，B谐振电感器14,15的磁性相互作用; 和A，B，C，D_NMOS 6,7,8,9用作开关/负载装置，其包括用于通过A，B谐振电感器14,15与A，B之间的磁相互作用来切换电感值的开关功能开关电感器12,13和向开关A，B电感器12,13施加负载的负载功能。控制信号用于接通/断开A，B，C，D_NMOS 6,7,8和9，用于控制互感和切换谐振电路的电感值并切换振荡频率。此外，电感增加以提高振荡稳定性。版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2006054547A Optimizing method of receiving apparatus and receiving characteristic 审中-公开
标题翻译：接收装置和接收特性的优化方法
公开(公告)号：JP2006054547A
公开(公告)日：2006-02-23
申请号：JP2004233165
申请日：2004-08-10
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： YAMAMOTO AKIO , IGARASHI YUTAKA
IPC分类号： H04B1/10 , H04B1/30
摘要： PROBLEM TO BE SOLVED: To reduce a secondary distortion without using a filter, such as an RFSAW, etc., for converting a high frequency signal. SOLUTION: In a receiving apparatus which receives a digitally modulated signal, the circuit bias of a low noise amplifier 3, mixers 4, 5, the whole balancing is maintained by correcting the circuit part bias of a low noise amplifier 3, mixers 4, 5, a local buffer 10, etc., and secondary distortion jamming is suppressed. Since the secondary distortion jamming appears as the deterioration of an S/N ratio in a demodulator, this S/N ratio is detected, and a bias is corrected so that the S/N ratio may become the maximum. Consequently, the secondary distortion jamming is suppressed. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了减少二次失真，而不使用诸如RFSAW等的滤波器来转换高频信号。解决方案：在接收数字调制信号的接收装置中，低噪声放大器3，混频器4,5的电路偏置，通过校正低噪声放大器3的电路部分偏置来保持整体平衡，混频器 4,5，本地缓冲器10等，并且二次失真干扰被抑制。由于二次失真干扰出现在解调器中的S / N比的劣化，因此检测到该S / N比，并且校正偏差使得S / N比可能变得最大。因此，二次失真干扰被抑制。版权所有（C）2006，JPO＆NCIPI

6. 发明专利

JP2010016591A Semiconductor integrated circuit 审中-公开
标题翻译：半导体集成电路
公开(公告)号：JP2010016591A
公开(公告)日：2010-01-21
申请号：JP2008174317
申请日：2008-07-03
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： IGARASHI YUTAKA , YAMAMOTO AKIO , KATSUBE YUSAKU
IPC分类号： H03H11/04 , H03H11/12 , H04B1/16
摘要： PROBLEM TO BE SOLVED: To reduce an undesired change in a frequency characteristic of a built-in filter. SOLUTION: A semiconductor integrated circuit includes a proofreading circuit 200, and a built-in capacitor element 70:151 has a plurality of capacitor elements and switches. V-I converters 20 and 30 convert reference voltage into current, and time integrators 40 and 50 responding to current execute time integration of charging or discharging of a capacitor element 70, and a voltage comparator 80 compares the reference voltage with terminal voltage of the built-in capacitor element 70. Time integration of a plurality of times and voltage comparison of a plurality of times are sequentially carried out during proofreading operation, and sequentially generated results of the voltage comparison of the plurality of times are sequentially stored in a latch 90. Each on-off control of the plurality of switches of the built-in capacitor element 70:151 and a frequency characteristic of a built-in filter 150 are determined according to a storage result of the latch when the proofreading operation is completed. The V-I converters include a switch element SWO. The plurality of switches of the built-in capacitor element 70: 151 and the switch element of the V-I converters are an MOS transistor. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了减少内置滤波器的频率特性的不期望的变化。解决方案：半导体集成电路包括校正电路200，内置电容器元件70：151具有多个电容器元件和开关。 VI转换器20和30将参考电压转换为电流，并且响应于电容器元件70的充电或放电的当前执行时间积分的时间积分器40和50，以及电压比较器80将参考电压与内置的电容器元件70.在校对操作期间，依次执行多次时间积分和多次电压比较，并且顺序地将多次的电压比较结果存储在锁存器90中。每个在当完成校对操作时，根据锁存器的存储结果来确定内置电容器元件70：151的多个开关的内部控制和内置滤波器150的频率特性。 V-I转换器包括开关元件SWO。内置电容器元件70：151的多个开关和V-I转换器的开关元件是MOS晶体管。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2007180634A Quadrature mixer circuit and semiconductor integrated circuit for rf communication 有权
标题翻译：用于射频通信的二极管混合器电路和半导体集成电路
公开(公告)号：JP2007180634A
公开(公告)日：2007-07-12
申请号：JP2005373725
申请日：2005-12-27
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： IGARASHI YUTAKA , YAMAMOTO AKIO
IPC分类号： H03D7/14
CPC分类号： H03D7/166 , H03B27/00 , H03D7/1433 , H03D7/1458 , H03D7/165 , H03D2200/0043
摘要： PROBLEM TO BE SOLVED: To provide a quadrature mixer circuit capable of suppressing variations in secondary distortion while suppressing a consumed current, and to provide a semiconductor integrated circuit for RF communication.
SOLUTION: A phase of a local signal given to bases of transistors QI 3 to QI 6 in the quadrature mixer circuit differs from a phase of a local signal given to bases of transistors QQ 3 to QQ 6 by 90 degrees, and even when the amplitude of the local signals is greater, since the interference between the signals can be suppressed by resistors RI 3, 4 and resistors RQ 3, 4 and capacitors C 1, 2, and the capacitors C 1, 2 prevent a DC bias from being changed, variations in the secondary distortion can be suppressed. Further, since the capacitors C 1, 2 compose current outputs from a differential circuit comprising the transistors QI 1, 2 and a resistor R 5 and a differential circuit comprising the transistors QQ 1, 2 and the resistor R 5, the consumed current can also be reduced.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够抑制二次变形的同时抑制消耗电流的正交混频电路，并提供用于RF通信的半导体集成电路。解决方案：在正交混频器电路中给予晶体管QI 3至QI 6的基极的本地信号的相位与给予晶体管QQ 3至QQ 6的基极的本地信号的相位相差90度，甚至当本地信号的振幅较大时，由于电阻器RI3,4和电阻器RQ3,4以及电容器C1和2以及电容器C1，2之间的信号干扰可以被抑制，可以抑制二次变形的变化。此外，由于电容器C1和2构成包括晶体管Q1和R2的差分电路的电流输出和电阻器R 5以及包括晶体管QQ1,2和电阻器R5的差分电路，所以消耗的电流也可以减少版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2005151011A High-frequency signal receiver and semiconductor integrated circuit 审中-公开
标题翻译：高频信号接收机和半导体集成电路
公开(公告)号：JP2005151011A
公开(公告)日：2005-06-09
申请号：JP2003383659
申请日：2003-11-13
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： YAMAMOTO AKIO , IGARASHI YUTAKA , IKUTA ISAO
IPC分类号： H04L27/38 , H03G3/30 , H04B1/10 , H04B1/16 , H04L27/08 , H04L27/22
CPC分类号： H04B1/1036 , H03G3/3052
摘要： PROBLEM TO BE SOLVED: To provide a radio receiver capable of receiving a desired signal wave well, even when a jamming wave exists in close proximity to the desired signal wave. SOLUTION: The high-frequency signal receiver comprises a variable gain amplifier for amplifying a received signal, a first filter for limiting the analog base band signal band, an A/D converter for converting the output from the first filter into a digital signal, a second filter for limiting band connected with the A/D converter and a circuit for detecting existence of a jamming wave having a level which is not lower than the specified level in the received signal. A control section decides the level of a jamming wave, included in the received signal based on the output signal from the jamming wave detecting circuit, widens the bandwidth of the first filter, if the level of the jamming wave is lower than the specified level; otherwise the section narrows the bandwidth of the first filter and alters the pass-band characteristics of the second filter, thus compensating for the pass band characteristics of the first filter. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：即使当紧邻所需信号波存在干扰波时，提供能够良好地接收所需信号波的无线电接收机。解决方案：高频信号接收机包括用于放大接收信号的可变增益放大器，用于限制模拟基带信号频带的第一滤波器，用于将来自第一滤波器的输出转换成数字信号的A / D转换器信号，用于限制与A / D转换器连接的频带的第二滤波器和用于检测在接收信号中具有不低于指定电平的电平的干扰波的存在的电路。如果干扰波的电平低于指定电平，则控制部分基于来自干扰波检测电路的输出信号来确定包含在接收信号中的干扰波的电平，以加宽第一滤波器的带宽; 否则该部分缩小第一滤波器的带宽并改变第二滤波器的通带特性，从而补偿第一滤波器的通带特性。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2008278397A Reception apparatus 审中-公开
标题翻译：接收装置
公开(公告)号：JP2008278397A
公开(公告)日：2008-11-13
申请号：JP2007122176
申请日：2007-05-07
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： TONE MASAZUMI , YAMAMOTO AKIO , NODA MASAKI , TAKAHASHI JUNICHI
IPC分类号： H04B1/713 , H04B1/10 , H04B1/16 , H04B1/715 , H04J11/00
摘要： PROBLEM TO BE SOLVED: To provide a reception apparatus in which current consumption is reduced by using a low-pass filter in which current consumption is reduced and a filter order is low when hopping to a frequency band to which an interference signal is not proximate, and switching to and using a low-pass filter, synchronously to frequency hopping, in which current consumption is much and a filter order is high, when frequency-hopping to a frequency band to which an interference signal is close.
SOLUTION: By frequency allocation, a frequency band to which an interference wave is close and a frequency band to which an interference wave is not close are generated. A reception apparatus of the present invention comprises a low-pass filter/amplifier for each frequency band and in response to switching a reception frequency band. A controller 21 switches these low-pass filters/amplifiers to avoid using a low-pass filter with a high order in a frequency band on which an interference wave hardly rides, thereby suppressing power consumption.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种接收装置，其通过使用其中消耗电流减少的低通滤波器和当干扰信号所在的频带跳频时的滤波器顺序低而降低电流消耗当跳频到干扰信号接近的频带时，与跳频同步地切换和使用低通滤波器，其中电流消耗大，滤波器阶数高。解决方案：通过频率分配，产生干扰波接近的频带和干扰波不接近的频带。本发明的接收装置包括用于每个频带的低通滤波器/放大器，并且响应于切换接收频带。控制器21切换这些低通滤波器/放大器，以避免在干扰波几乎不能乘坐的频带中使用高阶的低通滤波器，从而抑制功耗。版权所有（C）2009，JPO＆INPIT

10. 发明专利

JP2008060882A Amplifier circuit 审中-公开
标题翻译：放大器电路
公开(公告)号：JP2008060882A
公开(公告)日：2008-03-13
申请号：JP2006234915
申请日：2006-08-31
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： KATSUBE YUSAKU , YAMAMOTO AKIO , IKUTA ISAO , IGARASHI YUTAKA
IPC分类号： H03F3/16 , H03G3/10 , H04B1/30
摘要： PROBLEM TO BE SOLVED: To provide a small amplifier circuit of low current consumption by which DC offset in gain switching by an AGC is reduced in a direct conversion circuit.
SOLUTION: In the amplifier circuit equipped with an amplifier, capacitance C10 and capacitance C20 for DC cut are connected to preceding stages of input circuits MA10, MA20 of the amplifier, switches MN10, MP10, MN20, MP20 for bias are connected between input circuits MA10, MA20 of the amplifier and a reference bias point and the input circuits MA10, MA20 of the amplifier are constituted by MOSFETs. Small scale and lower current consumption are made possible by constituting the amplifier circuit so as to turn on the switches for bias immediately before an amplifying operation, to give the bias to the input circuits of the amplifier and to turn the switches off at the amplifying operation.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种低电流消耗的小放大器电路，通过其在直接转换电路中减小AGC增益切换中的DC偏移。
解决方案：在配备放大器的放大器电路中，用于直流切断的电容C10和电容C20连接到放大器的输入电路MA10，MA20的前级，用于偏置的开关MN10，MP10，MN20，MP20连接在放大器的输入电路MA10，MA20和参考偏置点以及放大器的输入电路MA10，MA20由MOSFET构成。通过构成放大电路，可以实现小型化和低电流消耗，以便在放大操作之前接通用于偏置的开关，从而给放大器的输入电路提供偏置，并在放大操作时关断开关。版权所有（C）2008，JPO＆INPIT

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