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2. 发明专利

JP5131036B2 Semiconductor device 有权
公开(公告)号：JP5131036B2
公开(公告)日：2013-01-30
申请号：JP2008148195
申请日：2008-06-05
申请人：富士通株式会社
发明人：和明大石
IPC分类号： H03F1/32 , H03K19/0944
CPC分类号： H03F1/301 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0025 , H03D2200/0033 , H03D2200/0043 , H03F1/223 , H03F2200/15 , H03F2200/18 , H03F2200/375 , H03F2200/78

3. 发明专利

JP4920162B2 Frequency converter and a communication apparatus using the frequency converter 有权
公开(公告)号：JP4920162B2
公开(公告)日：2012-04-18
申请号：JP2002210565
申请日：2002-07-19
申请人：株式会社東芝
发明人：章二大高 , 哲朗板倉 , 俊之梅田
IPC分类号： H03D7/12 , H03D7/14 , H03L7/16
CPC分类号： H03D7/1441 , H03D7/1433 , H03D7/1458 , H03D2200/0033 , H03D2200/0043 , H03D2200/0084

4. 发明专利

JP4881596B2 Bidirectional frequency converter and radio with this 有权
公开(公告)号：JP4881596B2
公开(公告)日：2012-02-22
申请号：JP2005275733
申请日：2005-09-22
申请人：パナソニック株式会社
发明人：道明松尾 , 嘉史細川 , 典昭齊藤
IPC分类号： H03D7/12 , H03D7/14 , H04B1/40
CPC分类号： H03D7/12 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D2200/0025 , H03D2200/0043 , H03D2200/009

5. 发明专利

JP4698776B2 Low-voltage double-balanced mixer circuit device 失效
公开(公告)号：JP4698776B2
公开(公告)日：2011-06-08
申请号：JP1507698
申请日：1998-01-09
申请人：インテルコーポレイション
发明人：イゴールスーチノフビアチェスラフ
IPC分类号： H03D7/00 , H03D7/14 , H03D7/12
CPC分类号： H03D7/1425 , B01F13/0059 , H03D7/12 , H03D7/125 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0043 , H03D2200/0084

6. 发明专利

JP4634448B2 有权
公开(公告)号：JP4634448B2
公开(公告)日：2011-02-23
申请号：JP2007519711
申请日：2005-07-06
IPC分类号： H03D7/14 , H03D7/18
CPC分类号： H04B1/0014 , H03B5/1209 , H03B5/1215 , H03B5/1231 , H03B5/124 , H03B2200/0078 , H03D7/1433 , H03D7/1441 , H03D7/145 , H03D7/1458 , H03D7/1483 , H03D7/165 , H03D2200/0043 , H03D2200/0047 , H03D2200/0088 , H04B1/0032 , H04B1/28

7. 发明专利

JP4559498B2 Active mixer circuit and the receiving circuit and the millimeter-wave communication terminal using the same 有权
公开(公告)号：JP4559498B2
公开(公告)日：2010-10-06
申请号：JP2008047723
申请日：2008-02-28
申请人：株式会社日立製作所
发明人：宝弘中村 , 徹増田 , 正倫田邊 , 信弘白水 , 勝由鷲尾
IPC分类号： H03D7/12
CPC分类号： H04B1/28 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D2200/0023 , H03D2200/0043

8. 发明专利

JP4536737B2 Mixer circuit electronic equipment using the same 有权
公开(公告)号：JP4536737B2
公开(公告)日：2010-09-01
申请号：JP2007004702
申请日：2007-01-12
申请人：ローム株式会社
发明人：哲章四辻
IPC分类号： H03D7/12 , H03D7/14 , H04B1/3822 , H04B1/40
CPC分类号： H03D7/1441 , H03D2200/0043 , H03D2200/0074 , H03D2200/0084

9. 发明专利

JP4507492B2 Power mixer architecture for the transmission equipment 有权
公开(公告)号：JP4507492B2
公开(公告)日：2010-07-21
申请号：JP2002580436
申请日：2002-04-09
申请人：エスティー‐エリクソン、ソシエテ、アノニム
发明人：アボルファズル，コースロウベイジ , ストレートペトルス，エム
IPC分类号： H04B1/04 , H03D7/14
CPC分类号： H03D7/1425 , H03D7/1433 , H03D7/1491 , H03D2200/0023 , H03D2200/0033 , H03D2200/0043
摘要： A power mixer architecture for a transmitter chip is disclosed. The power mixer architecture is a mixing stage including one or more upper trees, and one or more lower trees. Each lower tree is selectively activated to receive current biasing signals, and current intermediate frequency signals. Upon receipt, the activated lower tree activates a corresponding upper tree to receive one or more amplified current intermediate frequency signals from the lower tree. In conjunction with a reception of voltage local oscillating signals, the upper tree provides voltage radio frequency signals. The gain of the lower tree is designed to be constant over any variance in a temperature, supply voltage or processing performance of the transmitter chip.

10. 发明专利

JP2009212869A Transmitter 有权
标题翻译：发射机
公开(公告)号：JP2009212869A
公开(公告)日：2009-09-17
申请号：JP2008054217
申请日：2008-03-05
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： TOYODA KENJI , HIKASA KAZUHIKO
IPC分类号： H04L27/36 , H04B1/04 , H04L27/20
CPC分类号： H04B1/0475 , H03D7/1433 , H03D7/145 , H03D7/1458 , H03D2200/0043 , H03D2200/009 , H04B2001/0491 , H04L27/0014 , H04L27/34 , H04L27/362 , H04L2027/0018
摘要： PROBLEM TO BE SOLVED: To reduce chip occupied area of a direct upconversion (DUC) architecture transmitter and to reduce carrier leakage by a local signal to be supplied to a transmission modulator. SOLUTION: This transmitter is equipped with the transmission modulator 10 including a first modulator 1 and a second modulator 2, a phase comparator 11, and a controller 13. A first non-inverting local signal LoI and a second non-inverting local signal LoQ to be supplied to the modulators 1, 2 are set so as to have predetermined phase difference. In a calibration operation of carrier leakage reduction, a first local signal LoI, /LoI or a second local signal LoQ, /LoQ and a carrier signal to be leaked to output of the transmission modulator 10 are supplied to the phase comparator 11. Until the phase comparator 11 detects predetermined phase difference, the controller 13 changes ratio of bias current of each pair transistors M11, M21:M12, M22 of each of the modulators 1, 2. When the predetermined phase difference is detected, change of the ratio of DC bias current is stopped. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：减少直接上变频（DUC）架构发射机的芯片占用面积，并减少要提供给传输调制器的本地信号的载波泄漏。解决方案：该发射器配备有包括第一调制器1和第二调制器2的传输调制器10，相位比较器11和控制器13.第一同相局部信号Lo1和第二非反相局部信号被提供给调制器1,2的信号LoQ被设置为具有预定的相位差。在载波泄漏减少的校准操作中，要泄漏到传输调制器10的输出的第一本地信号LoI，/ LoI或第二本地信号LoQ，/ LoQ和载波信号被提供给相位比较器11.直到相位比较器11检测预定的相位差，控制器13改变每个调制器1,2的每对晶体管M11，M21，M12，M22的偏置电流的比率。当检测到预定的相位差时，DC的比率的变化偏置电流停止。版权所有（C）2009，JPO＆INPIT

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