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    • 2. 发明专利
    • Semiconductor integrated circuit and method of operating the same
    • 半导体集成电路及其工作方法
    • JP2010056978A
    • 2010-03-11
    • JP2008220651
    • 2008-08-29
    • Renesas Technology Corp株式会社ルネサステクノロジ
    • AKAMINE YUKINORIHIKASA KAZUHIKOOKADA HIROKIYAMAMOTO SATORU
    • H04B1/40H03H17/00H03H17/02H04B1/30H04B1/3822
    • H04B1/0017
    • PROBLEM TO BE SOLVED: To reduce a chip footprint of a semiconductor integrated circuit adaptable to a multi-mode. SOLUTION: A reception analog front end unit 10 converts first and second RF reception signals in first and second communication schemes into first and second reception analog baseband signals having large and small signal bands. An oversampling type A/D converter 102 generates first and second reception digital baseband signals and a first digital filter 103 is used in common for decimation processing of the first and second reception digital baseband signals. Second digital filters 205, 206, 207 produce the first reception digital baseband signal having a large first sampling rate through downsampling processing and third digital filters 210, 211, 212 produce the second reception digital baseband signal having a small second sampling rate through downsampling processing. COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:减少适用于多模式的半导体集成电路的芯片占地面积。 解决方案:接收模拟前端单元10将第一和第二通信方案中的第一和第二RF接收信号转换为具有大信号频带和小信号频带的第一和第二接收模拟基带信号。 过采样型A / D转换器102生成第一和第二接收数字基带信号,并且第一数字滤波器103被共同地用于第一和第二接收数字基带信号的抽取处理。 第二数字滤波器205,206,207通过下采样处理产生具有大的第一采样率的第一接收数字基带信号,并且第三数字滤波器210,211,212通过下采样处理产生具有小的第二采样率的第二接收数字基带信号。 版权所有(C)2010,JPO&INPIT
    • 3. 发明专利
    • Transmitter
    • 发射机
    • JP2009212869A
    • 2009-09-17
    • JP2008054217
    • 2008-03-05
    • Renesas Technology Corp株式会社ルネサステクノロジ
    • TOYODA KENJIHIKASA KAZUHIKO
    • H04L27/36H04B1/04H04L27/20
    • H04B1/0475H03D7/1433H03D7/145H03D7/1458H03D2200/0043H03D2200/009H04B2001/0491H04L27/0014H04L27/34H04L27/362H04L2027/0018
    • PROBLEM TO BE SOLVED: To reduce chip occupied area of a direct upconversion (DUC) architecture transmitter and to reduce carrier leakage by a local signal to be supplied to a transmission modulator. SOLUTION: This transmitter is equipped with the transmission modulator 10 including a first modulator 1 and a second modulator 2, a phase comparator 11, and a controller 13. A first non-inverting local signal LoI and a second non-inverting local signal LoQ to be supplied to the modulators 1, 2 are set so as to have predetermined phase difference. In a calibration operation of carrier leakage reduction, a first local signal LoI, /LoI or a second local signal LoQ, /LoQ and a carrier signal to be leaked to output of the transmission modulator 10 are supplied to the phase comparator 11. Until the phase comparator 11 detects predetermined phase difference, the controller 13 changes ratio of bias current of each pair transistors M11, M21:M12, M22 of each of the modulators 1, 2. When the predetermined phase difference is detected, change of the ratio of DC bias current is stopped. COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:减少直接上变频(DUC)架构发射机的芯片占用面积,并减少要提供给传输调制器的本地信号的载波泄漏。 解决方案:该发射器配备有包括第一调制器1和第二调制器2的传输调制器10,相位比较器11和控制器13.第一同相局部信号Lo1和第二非反相局部信号 被提供给调制器1,2的信号LoQ被设置为具有预定的相位差。 在载波泄漏减少的校准操作中,要泄漏到传输调制器10的输出的第一本地信号LoI,/ LoI或第二本地信号LoQ,/ LoQ和载波信号被提供给相位比较器11.直到 相位比较器11检测预定的相位差,控制器13改变每个调制器1,2的每对晶体管M11,M21,M12,M22的偏置电流的比率。当检测到预定的相位差时,DC的比率的变化 偏置电流停止。 版权所有(C)2009,JPO&INPIT
    • 4. 发明专利
    • Semiconductor integrated circuit, and operation method thereof
    • 半导体集成电路及其操作方法
    • JP2009206882A
    • 2009-09-10
    • JP2008047662
    • 2008-02-28
    • Renesas Technology Corp株式会社ルネサステクノロジ
    • HIKASA KAZUHIKOTAKANO RYOICHIYAMAMOTO SATORUTAKAHASHI TAMOTSUAKAMINE YUKINORI
    • H04B1/30H04W88/06
    • PROBLEM TO BE SOLVED: To reduce chip area and to compensate DC offset voltage of intermittent receiving operations and continuous receiving operations. SOLUTION: An RFIC is equipped with a first low noise amplifier which receives intermittent reception signals; a first reception block 100 including a first reception mixer; a second low noise amplifier which receives continuous RF reception signals; and a second reception block 200 including a second reception mixer. The RFIC is further equipped with: prestage and poststage variable amplifiers 112, 115; an LPF 113; a DC offset cancellation circuit 118, an A/D converter 116; and a digital filter 130. In a period of warm up before transition from a non-reception slot and an idle state in intermittent reception to continuous receiving operations, DC offset voltage of the prestage variable amplifier by the DC offset cancellation circuit is reduced. During the continuous receiving operations, DC offset voltage of the poststage variable amplifier is reduced by feedback control from the digital filter to the poststage variable amplifier. COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:减少芯片面积并补偿间歇接收操作和连续接收操作的直流偏移电压。 解决方案:RFIC配备有接收间歇接收信号的第一低噪声放大器; 包括第一接收混合器的第一接收块100; 接收连续RF接收信号的第二低噪声放大器; 以及包括第二接收混合器的第二接收块200。 RFIC还配备有:前级和后级可变放大器112,115; LPF 113; DC偏移消除电路118,A / D转换器116; 和数字滤波器130.在从非接收时隙和间歇接收中的空闲状态转变为连续接收操作之前的预热期间,由DC偏移消除电路减少了前置可变放大器的DC偏移电压。 在连续接收操作期间,通过从数字滤波器到后级可变放大器的反馈控制,降低了后级可变放大器的DC偏移电压。 版权所有(C)2009,JPO&INPIT