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1. 发明专利

JP2004063868A Manufacture of semiconductor device 审中-公开
公开(公告)号：JP2004063868A
公开(公告)日：2004-02-26
申请号：JP2002221218
申请日：2002-07-30
申请人： Hitachi Tokyo Electronics Co Ltd , Renesas Technology Corp , 日立東京エレクトロニクス株式会社 , 株式会社ルネサステクノロジ
发明人： KURODA AKIRA , ISHIDA JUNICHI , SUDA TOMIJI
IPC分类号： H01L21/60
CPC分类号： H01L2224/11
摘要： PROBLEM TO BE SOLVED: To properly bond an inner lead to an electrode pad. SOLUTION: A die bonder 30 is provided with a first bonding tool 35 for holding a chip 10, an XY table 38 which is installed on the opposite side of the first bonding tool 35; a bracket 38 fixed perpendicularly on the XY table 37; a bonding head 40, which is perpendicularly and independently bridged over the bracket 38 by a linear guide 41 and a spring 42; a load application apparatus 39 installed on the bracket 38 for applying a load to the bonding head 40; and a second bonding tool 43 installed on the bonding head 40 to face the first bonding tool 35. COPYRIGHT: (C)2004,JPO

2. 发明专利

JP2004039802A Method of manufacturing semiconductor device, and semiconductor manufacturing apparatus 审中-公开
公开(公告)号：JP2004039802A
公开(公告)日：2004-02-05
申请号：JP2002193532
申请日：2002-07-02
申请人： Hitachi Tokyo Electronics Co Ltd , Renesas Technology Corp , 日立東京エレクトロニクス株式会社 , 株式会社ルネサステクノロジ
发明人： KURODA AKIRA , ISHIDA JUNICHI , SUDA TOMIJI
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To suppress the misregistration due to thermal distortion during bonding, when bonding a semiconductor chip on a flexible wiring board formed out of a film material or the like.
SOLUTION: The flexible wiring board such as a film wiring board 20a is heated or heated and thrusted to be thermally expanded in advance. A slackness coming from the thermal expansion is removed by pushing down a bonding tool 15a. After removal of the slackness, a camera 16a for positional recognition is located between the film wiring board 20a and a semiconductor chip 30 to recognize the positions of the film wiring board 20a and the semiconductor chip 30, and to make positional adjustments based on the recognition results for a very precise alignment between the film wiring board 20a and the semiconductor chip 30. By carrying out bonding after the alignment, the misregistration due to heat during bonding can be suppressed.
COPYRIGHT: (C)2004,JPO

3. 发明专利

JP2005032828A Manufacturing apparatus of semiconductor device, and method for manufacturing semiconductor device 审中-公开
标题翻译：半导体器件的制造装置及制造半导体器件的方法
公开(公告)号：JP2005032828A
公开(公告)日：2005-02-03
申请号：JP2003193760
申请日：2003-07-08
申请人： Renesas Eastern Japan Semiconductor Inc , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社ルネサス東日本セミコンダクタ
发明人： KURODA AKIRA
IPC分类号： H01L21/52
摘要： PROBLEM TO BE SOLVED: To shorten time duration which treatment takes by improving efficiency of die bonding.
SOLUTION: In manufacturing of a semiconductor device, a semiconductor chip is acquired by a bonding head, the bonding head moves to a semiconductor chip fixing source position, and the semiconductor chip is stuck on a frame. Further, locus of the bonding head is changed according to size of the semiconductor chip. By the above means, moving course of the semiconductor chip is shortened, time duration which die bonding of the semiconductor chip takes is shortened and UPH of a die bonder can be improved by changing locus of the bonding head according to size of the semiconductor chip.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：通过提高芯片粘合的效率来缩短处理所需的时间。解决方案：在半导体器件的制造中，通过接合头获取半导体芯片，接合头移动到半导体芯片固定源位置，并且半导体芯片被卡在框架上。此外，接合头的轨迹根据半导体芯片的尺寸而改变。通过上述方式，缩短了半导体芯片的移动过程，缩短了半导体芯片的接合时间，并且通过根据半导体芯片的尺寸改变键合头的轨迹，可以提高芯片接合器的UPH。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2004259866A Manufacturing method for semiconductor device 审中-公开
公开(公告)号：JP2004259866A
公开(公告)日：2004-09-16
申请号：JP2003047551
申请日：2003-02-25
申请人： Renesas Eastern Japan Semiconductor Inc , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社ルネサス東日本セミコンダクタ
发明人： ISHIGURO TAKANORI , KODA YUTAKA , KINOSHITA SHIYOUJI , KAWAI MINORU , SHINODA MASAYOSHI , SUDA TOMIJI , ISHIDA JUNICHI , KURODA AKIRA
IPC分类号： H01L21/60
CPC分类号： H01L2224/11
摘要： PROBLEM TO BE SOLVED: To provide a bonding technique by which an inner lead can be bonded properly to an electrode pad.
SOLUTION: When a plurality of the inner leads 25 are thermocompression-bonded collectively on a plurality of bumps 15, a touch speed 61 of a bonding tool 51, an initial load applying speed 64, an initial load search speed 65, load change speed 68, a second load search speed 69, a load reducing speed 73, and a second bonding-tool elevating speed 75 are controlled as factors excepting a bonding temperature, a bonding load and a load holding time.
COPYRIGHT: (C)2004,JPO&NCIPI

5. 发明专利

JP2008290170A Semiconductor device manufacturing method 审中-公开
标题翻译：半导体器件制造方法
公开(公告)号：JP2008290170A
公开(公告)日：2008-12-04
申请号：JP2007136475
申请日：2007-05-23
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： OZAWA KUNIAKI , KURODA AKIRA
IPC分类号： B25J15/06 , H01L21/677
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method in which a thin semiconductor chip separably arranged on a support member, is sucked and lifted without damaging the same.
SOLUTION: According to the semiconductor device manufacturing method, a sucking means 20 is formed of a holder portion 21, a porous portion 22, and a collet portion 23, and the collet portion 23 is arranged on the porous portion 22 mounted on the holder portion 21. Then the collet portion 23 is formed with sucking pores 24 which functions to suck the object. The collet portion 23 is detachably arranged on the porous portion, and therefore the sucking means can be mated to various shapes and different sizes of the semiconductor chips 11 only by exchanging the collet portion 23. In particular, when the suction pores are set, it is possible to change their suction degree for sucking the semiconductor chips.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体器件制造方法，其中可分离地布置在支撑构件上的薄半导体芯片被吸入和提升而不损坏其。解决方案：根据半导体器件制造方法，吸持装置20由保持器部分21，多孔部分22和夹头部分23形成，并且夹头部分23布置在安装在夹持部分21.然后，夹头部分23形成有用于吸收物体的吸孔孔24。夹头部分23可拆卸地布置在多孔部分上，因此，仅通过更换夹头部分23，可以将吸引装置配合到各种形状和不同尺寸的半导体芯片11.特别地，当设置吸入孔时可以改变吸引半导体芯片的吸入度。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2009206166A Method of manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2009206166A
公开(公告)日：2009-09-10
申请号：JP2008044653
申请日：2008-02-26
申请人： Renesas Technology Corp , 株式会社ルネサステクノロジ
发明人： YOSHIZAWA AKIHIKO , KURODA AKIRA
IPC分类号： H01L21/301 , H01L21/683
摘要： PROBLEM TO BE SOLVED: To automate a process of fixing a substrate structure to a holding frame with an adhesive tape. SOLUTION: After the substrate structure 14 is disposed inside the holding frame 13 to have predetermined position relation, the holding frame 13 is held by a holding frame clamp (fixing means) 27g using magnetic force. After a dicing tape (adhesive tape) 12 is fitted to the holding frame 13 and substrate structure 14, the dicing tape is cut along the holding frame 13 to be parted into an in-use portion (first adhesive sheet) 12a and a surplus portion (second adhesive sheet) 12b. After the surplus portion 12b of the dicing tape 12 is peeled off the holding frame, the fixing force with which the holding frame clamp 27g fixes the holding frame 13 is weakened and the holding frame 13 is taken out together with the substrate structure 14 to be conveyed. The holding frame clamp 27g is a permanent magnet disposed on a surface of a sticking stage 27, where the holding fame 13 is placed, opposed to the holding frame 13 movably in a direction crossing the holding frame 13. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：使用胶带将基板结构固定到保持框架的过程自动化。解决方案：在将基板结构14设置在保持框架13内以具有预定的位置关系之后，通过使用磁力的保持框架夹（固定装置）27g来保持保持框架13。在切割胶带（胶带）12装配到保持框架13和基板结构14之后，切割带沿着保持框架13被切割以分成使用中的部分（第一粘合片）12a和剩余部分（第二粘合片）12b。在切割带12的剩余部分12b从保持框架上剥离之后，固定框架夹具27g固定保持框架13的固定力减弱，保持框架13与基板结构14一起被取出传达。保持框架夹具27g是设置在粘贴台27的表面上的永磁体，其中保持框架13被放置成与保持框架13相对的方向与保持框架13交叉的方向可移动地移动。）2009，JPO＆INPIT

7. 发明专利

JP2005050854A Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2005050854A
公开(公告)日：2005-02-24
申请号：JP2003202959
申请日：2003-07-29
申请人： Renesas Eastern Japan Semiconductor Inc , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社ルネサス東日本セミコンダクタ
发明人： ISHIDA JUNICHI , SUDA TOMIJI , ISHIGURO TAKANORI , KURODA AKIRA , OSAWA HIROYUKI
IPC分类号： H01L21/60 , H01L21/52
CPC分类号： H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2924/01322 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide clamp mechanism which is easy to manage clamping force. SOLUTION: Equipment which clamps a flexible wiring board 20 at a bonding position, like a COF bonder, and performs bonding by heat crimping is provided with a magnetic path forming unit 46 in an upper clamper 41 and a lower clamper 42 which clamp the flexible wiring board 20. The upper clamper 41 sucks the magnetic path forming unit 46 of the upper clamper 41 side to an electromagnetic force generating unit 52 side which generates electromagnetic force matched with specification of the flexible wiring board 20 by instruction from the equipment main body 51 side, and make the magnetic path forming unit 46 descend on the wiring board 20 on the lower clamper 42. The clamping force is managed by controlling quantitatively the generation electromagnetic force by using electric parameters such as a current and a voltage. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供易于管理夹紧力的夹紧机构。解决方案：在COF接合机的接合位置夹住柔性布线板20并通过热压接进行接合的设备在上夹持器41和下夹持器42中设置有磁路形成单元46，夹持器42夹紧上部夹持器41将上部夹持器41侧的磁路形成单元46吸附到电磁力产生单元52侧，该电磁力产生单元52侧通过来自设备主体的指令产生与柔性布线板20的规格相匹配的电磁力主体51侧，并使磁路形成单元46在下夹持器42上的布线板20上下降。通过使用诸如电流和电压的电参数定量地控制发电电磁力来管理夹紧力。版权所有（C）2005，JPO＆NCIPI

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