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1. 发明专利

JP2013083759A Phase shift mask, method for forming asymmetric pattern, method for manufacturing diffraction grating, and method for manufacturing semiconductor device 有权
$Phase shift mask, method for forming asymmetric pattern, method for manufacturing diffraction grating, and method for manufacturing semiconductor device$
标题翻译：相位移掩模，形成非对称图案的方法，制造衍射光栅的方法和制造半导体器件的方法
公开(公告)号：JP2013083759A
公开(公告)日：2013-05-09
申请号：JP2011222907
申请日：2011-10-07
申请人： Hitachi Ltd , 株式会社日立製作所 , Hitachi High-Technologies Corp , 株式会社日立ハイテクノロジーズ
发明人： TSUNODA KAZUYUKI , ONOZUKA TOSHIHIKO , MATSUI SHIGERU , EHATA YOSHISADA , HASEGAWA NORIO
IPC分类号： G03F1/68 , G03F7/20
CPC分类号： H01L21/3065 , G03F1/0046 , G03F1/26 , G03F1/28 , G03F1/30 , H01L21/3085
摘要： PROBLEM TO BE SOLVED: To provide a technique of forming an asymmetric pattern using a phase shift mask, the technology capable of achieving improvement in the accuracy of products and reduction of a production time, and to provide a technique of manufacturing a diffraction grating and a semiconductor device.SOLUTION: In the method for manufacturing a diffraction grating using a phase shift mask 30 (in which a light-shielding part and a transmissive part (comprising a first transmissive part giving no phase shift and a second transmissive part giving a phase shift) are periodically arranged), the light radiating from an illumination light source 10 is made to transmit through the phase shift mask 30; a 0-order beam and a +1-order beam generated by the transmission through the phase shift mask 30 are made to interfere with each other on the surface of a Si wafer 50 to expose a photoresist 60 on the surface of the Si wafer 50; thereby a diffraction grating having a blazed cross-sectional shape is formed on the Si wafer 50.
摘要翻译：要解决的问题：为了提供使用相移掩模形成不对称图案的技术，可以实现产品精度提高和生产时间缩短的技术，并且提供制造衍射的技术光栅和半导体器件。解决方案：在使用相移掩模30（其中遮光部分和透射部分（包括不具有相移的第一透射部分和给出相移的第二透射部分）的衍射光栅的制造方法中）周期性地布置），使从照明光源10发出的光透过相移掩模30; 使通过相移掩模30的透射产生的0级光束和+ 1级光束在Si晶片50的表面上彼此干涉，以暴露Si晶片50的表面上的光致抗蚀剂60 ; 从而在Si晶圆50上形成具有闪耀截面形状的衍射光栅。（C）2013，JPO＆INPIT

2. 发明专利

JP2009087591A Controller of charged particle beam device 有权
标题翻译：充电粒子束装置的控制器
公开(公告)号：JP2009087591A
公开(公告)日：2009-04-23
申请号：JP2007252966
申请日：2007-09-28
申请人： Hitachi High-Technologies Corp , 株式会社日立ハイテクノロジーズ
发明人： OKINAKA HIROKAZU , ONOZUKA TOSHIHIKO , MAEDA TATSUYA , KIKUCHI MASAAKI
IPC分类号： H01J37/28 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To provide a controller of a charged particle beam device for performing display by which an error high on a priority order for countermeasures can be efficiently found from the history of errors.
SOLUTION: In the controller to control the charged particle beam device based on a set recipe, when errors of the same kind are generated at prescribed time intervals or within a prescribed time interval a plurality of times in the same coordinate on a sample, the errors are displayed as an one time error.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于执行显示的带电粒子束装置的控制器，通过该控制器可以从错误的历史中有效地发现针对对策的优先顺序的错误高。解决方案：在控制器中，基于设定的配方控制带电粒子束装置，当以规定的时间间隔或规定的时间间隔内产生相同类型的错误时，在样本上的相同坐标上多次，错误显示为一次性错误。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2013191653A Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2013191653A
公开(公告)日：2013-09-26
申请号：JP2012055444
申请日：2012-03-13
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： TSUNODA KAZUYUKI , ANDO TOSHIO , HIRUMA KENJI , ONOZUKA TOSHIHIKO , KATSUYAMA KIYOMI , SATO KIYOHIKO , IIDA YASUSHI
IPC分类号： H01L21/027
CPC分类号： G03F7/20 , G03F7/09 , G03F7/095
摘要： PROBLEM TO BE SOLVED: To provide a technique capable of improving performance of a semiconductor device.SOLUTION: A method for manufacturing a semiconductor device applies a chemically amplified resist PR2 to form a resist pattern after performing a pretreatment step of applying an organic solvent mixed with a polymeric organic compound to a substrate 1 having a tungsten film 3 formed on a surface 1a thereof. After the pretreatment step, a ratio of a C1s peak intensity to a W4d peak intensity as measured by XPS is 0.1 or higher on a surface 3a of the tungsten film 3 before the application of the chemically amplified resist PR2.
摘要翻译：要解决的问题：提供能够提高半导体器件性能的技术。解决方案：半导体器件的制造方法在进行预处理步骤之后，施加化学放大型抗蚀剂PR2以形成抗蚀剂图案，所述预处理步骤是将与聚合有机化合物与在其表面1a上形成有钨膜3的基板1相连。在预处理步骤之后，在施加化学放大抗蚀剂PR2之前，通过XPS测量的C1s峰强度与W4d峰强度的比例为0.1或更高在钨膜3的表面3a上。

4. 发明专利

JP2009290240A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2009290240A
公开(公告)日：2009-12-10
申请号：JP2009207688
申请日：2009-09-09
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： NOGUCHI JUNJI , MATSUMOTO TAKASHI , OSHIMA TAKAFUMI , ONOZUKA TOSHIHIKO
IPC分类号： H01L21/768 , H01L21/3205 , H01L23/52 , H01L23/522
摘要： PROBLEM TO BE SOLVED: To efficiently attain capacity reduction and securement of a via processing margin. SOLUTION: This semiconductor device having a plurality of wiring layers has: a first wiring layer 26 having a predetermined region; a second wiring layer 47 located in an upper layer of the first wiring layer; an interlayer insulating film 36 provided between the first wiring layer and the second wiring layer; and barrier insulating films (29, 31) provided between the interlayer insulating film and wiring of the first wiring layer, wherein thickness of the barrier insulating film at an upper part of the wiring in the predetermined region is thicker than the barrier insulating film at an upper part of wiring in regions except the predetermined region, an air gap 35 is formed between the adjacent wirings in the predetermined region, and the air gap is not formed between the adjacent wirings in the regions except the predetermined region. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：有效地实现容量降低和通孔加工余量的确定。解决方案：具有多个布线层的该半导体器件具有：具有预定区域的第一布线层26; 位于第一布线层的上层的第二布线层47; 设置在第一布线层和第二布线层之间的层间绝缘膜36; 以及设置在所述层间绝缘膜和所述第一布线层的布线之间的阻挡绝缘膜（29,31），其中，所述预定区域中的所述布线的上部的所述阻挡绝缘膜的厚度比所述阻挡绝缘膜厚在预定区域以外的区域中布线的上部，在预定区域中的相邻布线之间形成气隙35，并且在除了预定区域之外的区域中的相邻布线之间不形成气隙。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2012080133A Manufacturing method of semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：JP2012080133A
公开(公告)日：2012-04-19
申请号：JP2012010607
申请日：2012-01-23
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： NOGUCHI JUNJI , MATSUMOTO TAKASHI , OSHIMA TAKAFUMI , ONOZUKA TOSHIHIKO
IPC分类号： H01L23/522 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device capable of reducing capacitance between wiring lines of a semiconductor device, and implementing a countermeasure against misalignment vias.SOLUTION: The manufacturing method of a semiconductor device comprises processes of: forming insulator films 74 in space areas on wiring lines and between wiring lines; removing the insulator films 74 in regions other than the peripheral regions of through holes which expose the top face of wiring lines whose intervals between adjacent wiring lines are narrow while leaving the insulator films 74 in the peripheral regions as reservoirs; and forming insulator films 77 on the wiring lines while leaving gaps in the space areas between the wiring lines where the insulator films 74 are removed.
摘要翻译：解决的问题：提供能够减小半导体器件的布线之间的电容的半导体器件的制造方法，并且实现针对不对准过孔的对策。解决方案：半导体器件的制造方法包括以下处理：在布线和布线之间的空间区域中形成绝缘膜74; 在绝缘膜74之外的区域中除去暴露出布线的顶面之外的区域中的绝缘膜74，其中相邻布线之间的间隔较窄，同时在外围区域中留下绝缘膜74作为储存器; 并且在布线上形成绝缘膜77，同时在除去绝缘膜74的布线之间的空间区留下间隙。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JPH09115806A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH09115806A
公开(公告)日：1997-05-02
申请号：JP26977195
申请日：1995-10-18
申请人： HITACHI LTD
发明人： FUKUMOTO YOSHIKO , ONOZUKA TOSHIHIKO
IPC分类号： G03F7/26 , G03F7/20 , H01L21/027
摘要： PROBLEM TO BE SOLVED: To prevent a part of an exposure light from being reflected on the interface between an upper photoresist layer and a lower photoresist layer (anti-reflective layer) in forming a resist pattern using a multilayer resist method. SOLUTION: Between a lower photoresist layer (anti-reflective layer) 4 containing a light absorbing agent and an upper photoresist layer 6 containing no light absorbing agent, a photoresist layer 5 containing a light absorbing agent at a density substantially intermediate between the densities in the layers 4 and 6 is provided so that a moderate gradient of density of the light absorbing agent in the entire photoresists (4, 5 and 6) is realized. Thus, an exposure light is prevented from being easily reflected on the interface between the photoresist layers.

7. 发明专利

JPH06310392A MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH06310392A
公开(公告)日：1994-11-04
申请号：JP9419293
申请日：1993-04-21
申请人： HITACHI LTD
发明人： MORIUCHI NOBORU , SHIRAI SEIICHIRO , ONOZUKA TOSHIHIKO
IPC分类号： G03F9/00 , H01L21/027
摘要： PURPOSE:To enable a photomask and a semiconductor wafer to be aligned with each other high in accuracy by a method wherein an alignment mark is enhanced in detection accuracy. CONSTITUTION:Alignment marks 32 are provided in a region which fringes a photoresist on the periphery of a semiconductor, so that no photoresist is present on the alignment mark 32 when the position of the alignment mark 32 is detected in a light exposure process.

8. 发明专利

JPH09205057A PRODUCTION OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH09205057A
公开(公告)日：1997-08-05
申请号：JP1066896
申请日：1996-01-25
申请人： HITACHI LTD , HITACHI CHEMICAL CO LTD
发明人： HATTORI KEIKO , HATTORI KOJI , SHIRAISHI HIROSHI , TSUTSUI KEN , FUKUMOTO YOSHIKO , ONOZUKA TOSHIHIKO , SHIRAI SEIICHIRO
IPC分类号： G03F7/11 , G03F7/26 , H01L21/027
摘要： PROBLEM TO BE SOLVED: To perform collective exposure and development by providing an interlayer separation film of specified material exhibiting photosensitivity similar to that of first and second photoresists between first and second photoresist layers thereby forming a multilayer structure while suppressing the mixing. SOLUTION: A first positive or negative photoresist layer is formed on a semiconductor substrate and a second photoresist layer of the same type is formed thereon. The plurality of photoresist layers are subjected to the same exposing/developing step to form a resist pattern. In this regard, an interlayer separation film having the same photosensitivity as that of first and second photoresists is provided between first and second photoresist layers. The interlayer separation film is formed of a material insoluble to the solvent of second photoresist using a solvent insoluble to the first photoresist layer.

9. 发明专利

JPH0927585A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH0927585A
公开(公告)日：1997-01-28
申请号：JP17778895
申请日：1995-07-13
申请人： HITACHI LTD
发明人： SHIRAI SEIICHIRO , MORIUCHI NOBORU , ONOZUKA TOSHIHIKO
IPC分类号： H01L23/50
摘要： PROBLEM TO BE SOLVED: To obtain a semiconductor integrated circuit device in which a large- sized semiconductor chip can be mounted without making the size of every longitudinal side and every transverse side of a package large. SOLUTION: A tab 4 on which a semiconductor chip 3 is mounted is provided with two tab leads 5a, 5b, and the tab lead 5a on one side supports the tab 4 in a position which is lower than the tab lead 5b on the other side. Thereby, since the tab 4 is tilted at an angle θ (10 to 90 deg.) with reference to the bottom face of a molded package 1, the semiconductor chip 3 whose size is 1/cos θtimes that of a semiconductor chip to be mounted in parallel with the bottom face of the molded package 1 can be mounted even when the longitudinal size and the transverse size of the molded package 1 are not made large.

10. 发明专利

JPH0844052A FORMATION OF PATTERN AND RADIATION SENSITIVE COMPOSITION USING SAME 失效
公开(公告)号：JPH0844052A
公开(公告)日：1996-02-16
申请号：JP18003194
申请日：1994-08-01
申请人： HITACHI LTD , HITACHI CHEMICAL CO LTD
发明人： HATTORI KOJI , UENO TAKUMI , IMAI AKIRA , YAMAMOTO JIRO , TANAKA TOSHIHIKO , ONOZUKA TOSHIHIKO , MORIUCHI NOBORU , SHIRAI SEIICHIRO
IPC分类号： G03F7/004 , G03F7/039 , H01L21/027
摘要： PURPOSE:To form a fine pattern in which dimensional variation is reduced without increasing the number of stages by using a positive radiation sensitive composition and changing a thickness of a film. CONSTITUTION:When a desired pattern is made by forming a film consisting of a radiation sensitive composition on a substrate, exposing the film by using patterned radioactive rays and exposing the film to a developing agent after heating the film preferably, the positive radiation sensitive composition is used as the radiation sensitive composition, and a thickness of the film is composed so that it changes >=0.7lambda/2n by exposure when its refractive index is defined as (n) and a wavelength of the radioactive rays is defined as lambda. Further, when the film thickness is differ partially, a part where the film thickness is thinnest in an exposed part is measured. And this change is preferably set at >=lambda/2n. Moreover, this change is caused by the decrease of the film thickness preferably. When the film thickness decreases, the decrease is less than 40% of the film thickness before exposure and the film thickness after exposure is preferably more than 60% of the film thickness before exposure.

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