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1. 发明专利

JP2006245510A Method and device for plasma processing 有权
标题翻译：用于等离子体处理的方法和装置
公开(公告)号：JP2006245510A
公开(公告)日：2006-09-14
申请号：JP2005062842
申请日：2005-03-07
申请人： Hitachi High-Technologies Corp , 株式会社日立ハイテクノロジーズ
发明人： IKEGAMI EIJI , KOROYASU KUNIHIKO , KANEKIYO TADAMITSU , SUMIYA MASAHIRO
IPC分类号： H01L21/3065
CPC分类号： H01J37/32706 , H01J37/32082 , H01J37/32935
摘要： PROBLEM TO BE SOLVED: To improve production yield by decreasing foreign materials which causes generation of defect without lowering operation rates of a semiconductor equipment when a semiconductor device is worked.
SOLUTION: A mechanism for controlling an ion sheath 32w on an electrode 14 on which a wafer 2 is mounted and an ion sheath 32f on a member 141 mounted around it is provided. The thickness of the ion sheath 32f is made thinner than that of the ion sheath 32w. An inclination part 32s of the ion sheath is provided near the end part of the wafer 2. Ions 31 are made incident obliquely to the end part of the wafer, to remove a deposit film of the end part of the wafer.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过减少在半导体器件加工时半导体设备的操作速率降低而导致缺陷产生的异物来提高产量。解决方案：提供一种用于控制其上安装有晶片2的电极14上的离子鞘32w和在其周围安装的构件141上的离子鞘32f的机构。离子鞘32f的厚度比离子鞘32w的厚度薄。离子鞘的倾斜部32s设置在晶片2的端部附近。离子31被倾斜地入射到晶片的端部，以去除晶片的端部的沉积膜。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2009088389A Plasma treatment method 审中-公开
标题翻译：等离子体处理方法
公开(公告)号：JP2009088389A
公开(公告)日：2009-04-23
申请号：JP2007258791
申请日：2007-10-02
申请人： Hitachi High-Technologies Corp , 株式会社日立ハイテクノロジーズ
发明人： TAKEI HIDENORI , KOROYASU KUNIHIKO , MATSUMOTO TAKESHI , IKEGAMI EIJI
IPC分类号： H01L21/3065
摘要： PROBLEM TO BE SOLVED: To perform plasma treatment with low ion energy and plasma treatment with high ion energy in the same treatment chamber in an inexpensive and well reproductive manner.
SOLUTION: This plasma treatment method comprises using the treatment chamber 6, a gas supply means 7 for supplying treatment gas to the treatment chamber, an antenna electrode 4 for supplying the output of a first high frequency power supply to the treatment chamber to generate plasma, an exhaust means 17 for exhausting the treatment chamber, a placement electrode 10 for holding a treated substrate placed in the treatment chamber, and second and third high frequency power supplies 11, 31 for supplying high frequency power to members except the placement electrode, out of the placement electrode and the members constituting the face of the treatment chamber in opposition to the plasma, respectively. The outputs of the second and third high frequency power supplies are controlled independently or in linkage to continuously control the energy of ions to be injected into the treated substrate.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：以低成本和良好的生殖方式在相同的处理室中以低离子能量和高离子能等离子体处理进行等离子体处理。解决方案：这种等离子体处理方法包括使用处理室6，用于向处理室供应处理气体的气体供应装置7，用于将第一高频电源的输出提供给处理室的天线电极4 产生等离子体，用于排出处理室的排气装置17，用于保持放置在处理室中的处理过的基板的放置电极10以及用于向除了放置电极之外的构件提供高频电力的第二和第三高频电源11,31 ，分别与放置电极和构成处理室的表面的构件分别相对于等离子体。第二和第三高频电源的输出被独立地或连接地控制以连续地控制待注入到被处理的衬底中的离子的能量。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2005050908A Method and apparatus for etching lsi device 有权
标题翻译：用于蚀刻LSI器件的方法和装置
公开(公告)号：JP2005050908A
公开(公告)日：2005-02-24
申请号：JP2003203790
申请日：2003-07-30
申请人： Hitachi High-Technologies Corp , 株式会社日立ハイテクノロジーズ
发明人： KAZUMI HIDEYUKI , YOSHIDA TAKESHI , IKEGAMI EIJI , NAKAUNE KOUICHI , SAKAGUCHI MASAMICHI , MIYAMOTO YASUYUKI , SANO AKIHIRO
IPC分类号： H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/44
CPC分类号： H01L21/31116
摘要： PROBLEM TO BE SOLVED: To raise the selecting ratio of a diffusion prevention film/low dielectric constant film when an LSI device structure having a Cu wiring and a low dielectric constant film is etched.
SOLUTION: A method for etching the LSI device includes a step of etching a diffusion preventive film (SiC) 17 with a plasma for the low dielectric constant film (SiOC) 18 of a wafer 4 installed on a support base 5 of a plasma treating apparatus. A gas 6 mixes SO
2 and NF
3 by 1:2, a power of μ wave is set to 800 W, and a pressure and an RF are used as parameters. The SO
2 realizes high protection properties to the low dielectric constant film 18, and the NF
3 realizes a high etching speed to the diffusion preventive film 17. The etching selecting ratio of the diffusion preventive film to the low dielectric constant film is set to about 5-15, and the etching speed can realize about 350 nm/min.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：当蚀刻具有Cu布线和低介电常数膜的LSI器件结构时，提高防扩散膜/低介电常数膜的选择比。解决方案：用于蚀刻LSI器件的方法包括用等离子体蚀刻防扩散膜（SiC）17的步骤，该等离子体安装在安装在基底5上的晶片4的低介电常数膜（SiOC）18上等离子体处理装置。气体6将SO 2 和NF 3 混合1:2，μ波功率设定为800W，使用压力和RF作为参数。 SO 2 实现了对低介电常数膜18的高保护性能，并且NF SB <3>实现了对扩散防止膜17的高蚀刻速度。蚀刻选择比将低介电常数膜的防扩散膜设定为约5-15，蚀刻速度可以实现约350nm / min。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2008243939A Plasma etching method 有权
标题翻译：等离子体蚀刻法
公开(公告)号：JP2008243939A
公开(公告)日：2008-10-09
申请号：JP2007079170
申请日：2007-03-26
申请人： Hitachi High-Technologies Corp , 株式会社日立ハイテクノロジーズ
发明人： MUTO SATORU , IKEGAMI EIJI , MIYAJI MASAKAZU
IPC分类号： H01L21/3065 , H01L21/3205 , H01L21/768 , H01L23/52 , H05H1/46
摘要： PROBLEM TO BE SOLVED: To consistently perform a plurality of processes of a multilayer resist structure in the same chamber without carrying out a substrate to be processed in a forming process of a Via or a Trench of the multilayer resist structure constituted of ArF resist, an inorganic film interlayer, an organic film lower layer resist, a silicon oxide film and an inorganic film, which are arranged on a Si substrate. SOLUTION: In Via etching processing, the organic film lower layer resist is processed without using CF system gas and without applying high-frequency bias to a gas supply board formed of a Si member from a second high-frequency power supply. The silicon oxide film and the inorganic film are processed by making high-frequency bias power from 200 W to 300 W by using CF system gas. In Trench etching processing, the organic film lower layer resist is processed without using CF system gas and without applying high-frequency bias to the gas supply board 8 formed of the Si member from the second high-frequency power supply 5. The silicon oxide film and the inorganic film are processed by using CF system gas and without applying high-frequency bias. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了在由ArF构成的多层抗蚀剂结构体的Via或者沟槽的形成工序中，在不进行被处理基板的情况下，在同一室内一贯地进行多层抗蚀剂结构体的多个处理抗蚀剂，无机膜中间层，有机膜下层抗蚀剂，氧化硅膜和无机膜。解决方案：在Via蚀刻处理中，有机膜下层抗蚀剂在不使用CF系统气体的情况下进行处理，并且不对来自第二高频电源的由Si构成的气体供给板施加高频偏压。通过使用CF系统气体从200W至300W的高频偏置功率来处理氧化硅膜和无机膜。在沟槽蚀刻处理中，有机膜下层抗蚀剂在不使用CF系统气体的情况下进行处理，并且不对来自第二高频电源5的由Si构件形成的气体供给板8施加高频偏压。氧化硅膜无机膜采用CF系统气体处理，不施加高频偏压。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2008078582A Method of plasma etching 审中-公开
标题翻译：等离子体蚀刻方法
公开(公告)号：JP2008078582A
公开(公告)日：2008-04-03
申请号：JP2006259331
申请日：2006-09-25
申请人： Hitachi High-Technologies Corp , 株式会社日立ハイテクノロジーズ
发明人： OTA YOSHIYUKI , YOSHIDA TAKESHI , IKEGAMI EIJI , IMAMOTO KENJI , ADACHI JUNJI
IPC分类号： H01L21/3065
CPC分类号： H01L21/31116
摘要： PROBLEM TO BE SOLVED: To provide a method of plasma-etching which is free from a difference in dense and sparse shapes which comes out between dense and sparse regions of a mask pattern in processing a device at spacing of 100 nm or less.
SOLUTION: To form a sidewall protection film in a dense pattern region, an additive gas having a high C/F ratio such as C
4 F
8 gas is added to an etching gas to increase a production of CF
2 radicals, which has a low attachment coefficient and can react to be a constituent of a sidewall protection film, and further a Xe gas is added to inhibit a dissociation effect by means of decreasing an electron temperature.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供等离子体蚀刻的方法，其在以100nm或更小的间隔处理器件的过程中，没有在掩模图案的密集区域和稀疏区域之间出现的致密和稀疏形状的差异。解决方案：为了在致密图案区域中形成侧壁保护膜，添加具有高C / F比率的添加气体，例如C 4 S 8 SB 8气体涉及蚀刻气体以增加具有低附着系数的CF 2 自由基的生成，并且可以作为侧壁保护膜的组成部分反应，并且还加入Xe气体以抑制解离通过降低电子温度的作用。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2007324341A Plasma processing method and apparatus 有权
标题翻译：等离子体处理方法和装置
公开(公告)号：JP2007324341A
公开(公告)日：2007-12-13
申请号：JP2006152305
申请日：2006-05-31
申请人： Hitachi High-Technologies Corp , 株式会社日立ハイテクノロジーズ
发明人： IKEGAMI EIJI , IKUHARA SHIYOUJI , SHIMADA TAKESHI , KUWABARA KENICHI , ARASE TAKAO , MATSUMOTO TAKESHI
IPC分类号： H01L21/3065
CPC分类号： H01J37/32963 , H01J37/32082 , H01J37/32091 , H01J37/321 , H01J37/3211 , H01J37/32192 , H01J37/32917 , H01J37/32926 , H01J37/32935 , H01J37/32981 , H01J37/3299 , H01J2237/1825 , H01J2237/327 , H01L21/67069 , H01L21/67242 , H05H1/46
摘要： PROBLEM TO BE SOLVED: To determine the end of preconditioning discharge after wet cleaning accurately by a versatile method. SOLUTION: A plasma processing method includes a plasma processing container 101 equipped with an antenna electrode 102 and a bottom electrode 109 to place and hold a workpiece inside the processing container 101; a gas supply device for supplying a processing gas into the processing chamber 101; and an exhaust pump 116 for exhausting the gas inside the processing chamber via an exhaust valve 115. High-frequency power is supplied to the antenna electrode 102 via a matching circuit 105, and plasma is produced inside the processing container 101 wherein a magnetic field is formed by a magnetic field coil 107, and then a plasma processing is conducted on the workpiece 108 placed on the bottom electrode 109. This processing is repeated on a plurality of workpieces successively. In this case, the internal pressure of the processing container 101 is detected during the plasma processing. When the detected pressure decreases with an increase in plasma processing time and reaches a stable value, it is determined that preconditioning discharge is finished. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：通过多功能方法准确地确定湿式清洗后预处理放电的结束。解决方案：等离子体处理方法包括：具有天线电极102和底部电极109的等离子体处理容器101，用于将工件放置在工作容器101内; 用于将处理气体供给到处理室101中的气体供给装置; 以及用于经由排气阀115排出处理室内的气体的排气泵116.经由匹配电路105将高频电力提供给天线电极102，并且在处理容器101内产生等离子体，其中磁场为由磁场线圈107形成，然后对放置在底部电极109上的工件108进行等离子体处理。这种处理在多个工件上连续重复。在这种情况下，在等离子体处理期间检测处理容器101的内部压力。当检测到的压力随着等离子体处理时间的增加而降低并达到稳定值时，确定预处理放电结束。版权所有（C）2008，JPO＆INPIT

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