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1. 发明专利

JP2002108567A STORAGE CONTROL APPARATUS 失效
公开(公告)号：JP2002108567A
公开(公告)日：2002-04-12
申请号：JP2000300563
申请日：2000-09-28
申请人： HITACHI LTD , HITACHI SOFTWARE ENG
发明人： IDO KENJI , GOTO YOICHI , YOKOHATA SHIZUO , HONMA SHIGEO , YOSHINO TOSHIYUKI
IPC分类号： G06F12/08 , G06F3/06 , G06F13/12 , G06F15/177
摘要： PROBLEM TO BE SOLVED: To process an I/O to be preferentially processed without being affected by any other I/O processing while maintaining performance by dividing the I/O processing into the priority processing and the non-priority processing, and processing the non-priority I/O while suppressing the processing. SOLUTION: A storage control apparatus 301 is provided with a memory 505 common to I/O processing control parts 501-504, and manages information for dividing plural I/O processing into the priority processing and the non- priority processing, and for controlling them in the memory 505. Thus, it is possible to operate the non-priority I/O while suppressing its processing.

2. 发明专利

JP2005301638A Disk array device and reserve release control method for same disk array device 审中-公开
标题翻译：磁盘阵列设备和相同磁盘阵列设备的保留释放控制方法
公开(公告)号：JP2005301638A
公开(公告)日：2005-10-27
申请号：JP2004116360
申请日：2004-04-12
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： GOTO YOICHI , IDO KENJI , UCHIUMI KATSUHIRO
IPC分类号： G06F3/06 , G06F12/00
CPC分类号： G06F3/0637 , G06F3/0617 , G06F3/0631 , G06F3/067
摘要： PROBLEM TO BE SOLVED: To easily confirm and release a reserve status left in an LDEV by the systemdown of a host etc.
SOLUTION: A server 1 reserves and exclusively uses an LEDV4. When the systemdown of the server 1 is generated due to any failure (S1), the LEDV4 is put in a reserved state as it is (S2). Thus, it is not possible for the server 2 to perform access to the LDEV4. A system manager reads the exclusive control information 6 in a memory 5 through a management terminal 7. Thus, it is possible to display and confirm the reserve state of each LDEV unit on a terminal picture. A user instructs the release of the reserve state from a management terminal 7 (S3). A disk array device 3 receives the release instruction, and partially rewrites exclusive control information 6, and releases the reserve state.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过主机等的系统轻松确认和释放LDEV中保留的状态。解决方案：服务器1保留并专门使用LEDV4。当由于任何故障而产生服务器1的系统故障时（S1），LEDV4被保持为预留状态（S2）。因此，服务器2不可能访问LDEV4。系统管理器通过管理终端7读取存储器5中的排他控制信息6.因此，可以在终端画面上显示并确认每个LDEV单元的保留状态。用户指示从管理终端7释放保留状态（S3）。磁盘阵列装置3接收释放指令，并且部分重写专用控制信息6，并释放保留状态。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2005018509A Storage system, backup system and backup method 有权
标题翻译：存储系统，备份系统和备份方法
公开(公告)号：JP2005018509A
公开(公告)日：2005-01-20
申请号：JP2003183742
申请日：2003-06-27
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： IDO KENJI , URABE KIICHIRO
IPC分类号： G06F3/06 , G06F12/00 , G06F15/16
CPC分类号： G06F11/1464 , G06F11/1451 , G06F11/2071 , G06F11/2082
摘要： PROBLEM TO BE SOLVED: To enable a storage control device to perform backup processing not through a server without requiring the server to grasp a pair volume condition.
SOLUTION: When a backup instruction is outputted form the server during the copying of data from a master volume 601 to a slave volume 602, the storage control device 301 transfers data to a backup device after waiting the completion of copying to the slave volume 602, of data in a backup range from the server by using pair volume difference information 514.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：使存储控制设备不能通过服务器执行备份处理，而不需要服务器掌握成对的卷状态。
解决方案：当在从主卷601到从卷602的数据复制期间从服务器输出备份指令时，存储控制装置301在等待复制完成后将数据传送到备用装置卷602，来自服务器的备份范围中的数据通过使用对体积差异信息514。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JPH08221349A CONTROL METHOD FOR COMPUTER SYSTEM 失效
公开(公告)号：JPH08221349A
公开(公告)日：1996-08-30
申请号：JP3043895
申请日：1995-02-20
申请人： HITACHI LTD
发明人： NAKANO MASAO , YOKOHATA SHIZUO , IDO KENJI
IPC分类号： G06F13/14 , G06F15/16 , G06F15/177
摘要： PURPOSE: To provide a control method without the deviation of processings owing to the difference of the performance of CPUs when the processings are multiplexed in a computer system provided with the plural CPUs, an input/ output controller and plural input/output devices. CONSTITUTION: In the input/output controller 701 connected to the plural CPUs 001-004, IOC control parts 401 and 402 for controlling input and output monitor the input/output device for which the processing is not performed for the fixed period of time after connection is requested to the CPU at all times and prepare and hold the channel path route of the processing of the input/output device. Based on the data, the IOC control parts 401 and 402 select the CPU to be connected. When activation is simultaneously performed from the plural CPUs 001-004, the CPU is selected so as to preferentially perform the processing of the input/output device for which the processing is not performed for the fixed period of time. Thus, this control method without the deviation in the processings of the plural CPUs 001-004 is realized.

5. 发明专利

JP2004164047A Memory system 有权
公开(公告)号：JP2004164047A
公开(公告)日：2004-06-10
申请号：JP2002326257
申请日：2002-11-11
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： IDO KENJI , KASHIWAGI MITSURU
IPC分类号： G06F3/06 , G06F11/20 , G06F12/00
CPC分类号： G06F11/2079 , G06F3/0619 , G06F3/065 , G06F3/0689 , G06F11/2071
摘要： PROBLEM TO BE SOLVED: To accept a writing request from a main host computer and an auxiliary host computer, while maintaining matching of data housed in a main volume and an auxiliary volume.
SOLUTION: A memory control device 302 transfers I/O processing issued in the auxiliary volume to the main volume through a communication volume. A main memory control device 301 writes the writing data received from the main host computer in the main volume 601, and while transfers it to the auxiliary memory control device 302.
COPYRIGHT: (C)2004,JPO

6. 发明专利

JP2001216250A MEMORY CONTROL UNIT 失效
公开(公告)号：JP2001216250A
公开(公告)日：2001-08-10
申请号：JP2000032624
申请日：2000-02-03
申请人： HITACHI LTD
发明人： NAKANO MASAO , IDO KENJI
IPC分类号： G06F13/14 , G06F12/00 , G06F15/16 , G06F15/167 , G06F15/17 , G06F15/177
摘要： PROBLEM TO BE SOLVED: To solve such problems that parallel processings can not be performed since two or more processings can not be simultaneously performed per volume in the case that only one piece of job management information is allocated to one volume and the shared memory of a huge capacity is required accompanying the increase of the number of the volumes at the time of allocating the plural pieces of the job management information per volume in a memory control unit shared by plural host devices and requiring the parallel processings. SOLUTION: The plural pieces of volume information and the plural pieces of corresponding job management information are managed as one piece of group management information. Since the respective pieces of the job management information correspond to all the volumes inside the same group, the efficient parallel processings are made possible without needlessly increasing the number of the pieces of the job management information.

7. 发明专利

JPH08305653A INPUT AND OUTPUT CONTROL METHOD FOR STORAGE 失效
公开(公告)号：JPH08305653A
公开(公告)日：1996-11-22
申请号：JP10973895
申请日：1995-05-08
申请人： HITACHI LTD
发明人： IDO KENJI , YOKOHATA SHIZUO , NAKAYAMA SHINICHI
IPC分类号： G06F13/12
摘要： PURPOSE: To prevent inactivation of the channel restart operations by accepting the restart operations against connection requests to each channel with higher preference than the initial start operations through a storage controller that is located between plural channels and a storage device and controls the I/O processing. CONSTITUTION: A computer system includes the storage devices 601 to 603 which are connected to the channels 201 to 204 (CPU 101 to 104) via a storage controller 301 and the paths 201a to 204a respectively. In such a constitution of the system, the controller 301 sends the connection requests to the channels 201 to 204 right after the I/O processing end is reported (within 100μs, for example) or sends the connection requests to all channels having the report factors or a specific channel before the I/O processing end is reported. Then the controller 301 receives the restart operations against the connection requests from the initial start operations carried out through the channels 201 to 204 and earlier than a period when the channel that carried out the I/O processing receives the I/O processing end report and then sends the next initial start operation.

8. 发明专利

JPH05216760A COMPUTER SYSTEM 失效
公开(公告)号：JPH05216760A
公开(公告)日：1993-08-27
申请号：JP1923092
申请日：1992-02-04
申请人： HITACHI LTD
发明人： IDO KENJI , SHIRAYANAGI YOSHIRO , KANBAYASHI KIMISAKI , NAGASAWA MITSUO
IPC分类号： G06F12/08
摘要： PURPOSE:To improve the access performance of a CPU while stably keeping it by storing data to be accessed by the CPU in the cache memory of any optimum device corresponding to the access conditions. CONSTITUTION:Based on the condition of access from CPUs 101-103 to relevant data, a disk controller 201 judges to which cache memory of the device among cache memories 107-109 of channel devices 104-106, cache memory 202 of the disk controller 201 and cache memories 304-306 of disk drive devices 301-303, the data accessed from the CPUs 101-103 is to be stored and control is executed so as to store the data in the cache memory of the device judge as the storage destination. Therefore, since the data are always stored in the optimum cache memory, cache data can be managed with a little uselessness, and the access performance of the CPUs 101-103 can be improved while stably keeping it.

9. 发明专利

JPH0573421A DISK CACHE CONTROL SYSTEM 失效
公开(公告)号：JPH0573421A
公开(公告)日：1993-03-26
申请号：JP26262891
申请日：1991-09-17
申请人： HITACHI LTD
发明人： KANBAYASHI KIMISAKI , NAGASAWA MITSUO , IDO KENJI
IPC分类号： G06F3/06 , G06F12/08 , G06F12/12
摘要： PURPOSE:To effectively utilize a cache memory by adjusting dynamically the store quantity of data to the cache memory. CONSTITUTION:The number of storage areas of a cache memory 21 replaced before expiration of a certain determined period without being accessed by a central processor 1 is counted continuously for a prescribed period, and in accordance with its counted value, the store quantity of data to the cache memory 21 is controlled. That is, in the case the count value exceeds the determined upper limit value, the store quantity of the data to the cache memory 21 is decreased, and when it is below the determined lower limit value, the store quantity is increased, and also, when it is below the determined upper limit value and above the lower limit value, the store quantity is controlled to a prescribed value. In such a way, it can be decreased that necessary data in the cache memory 21 is replaced.

10. 发明专利

JPH0619627A ROTARY STORAGE 失效
公开(公告)号：JPH0619627A
公开(公告)日：1994-01-28
申请号：JP17294692
申请日：1992-06-30
申请人： HITACHI LTD
发明人： IDO KENJI , KANBAYASHI KIMISAKI , TAKEUCHI TAKIICHI , SHIRAYANAGI YOSHIRO
IPC分类号： G06F3/06
摘要： PURPOSE:To provide a rotary storage which can control a disk device having various types of performance and can transfer the data at a high speed without changing the specifications of the disk controller. CONSTITUTION:A buffer control block 300 including a buffer memory 301, a more significant transfer speed control part 305, and a less significant transfer speed control part 306 is provided between a disk controller 201 controlled by a CPU 101 and a disk device 401 connected to the controller 201. Thus the access (passing) speeds are optionally set to the record and the gap included in the memory 301 and viewed from the controller 201 by the CPU 101, the controller 201 or the memory 301 via the parts 305 and 306.

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