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    • 1. 发明专利
    • Storage control device and method
    • 存储控制装置和方法
    • JP2009217620A
    • 2009-09-24
    • JP2008061573
    • 2008-03-11
    • Hitachi Ltd株式会社日立製作所
    • YUHARA ATSUSHINAKANO MASAOSATO TAKAOOHASHI KAZUNOBUTAKEDA TAKAHIKO
    • G06F3/06
    • G06F11/2092G06F11/0724G06F11/0727G06F11/0757
    • PROBLEM TO BE SOLVED: To provide a storage control device and method, capable of improving failure resistance. SOLUTION: The storage control device includes a port part and a plurality of processing parts for inputting and outputting data to a storage device. According to a table preliminarily regulating a storage device or storage area to handle data input and output processing assigned to each processing part, the port part sorts a data input and output request from a host device to a corresponding processing part. The processing part inputs and outputs data to the corresponding storage device or corresponding storage area according to the data input and output request sorted to itself by the port part, and updates the table held by each port, upon detection of blocking by failure of the other processing part, so as to sort the storage device or storage area assigned to the other processing part to the residual processing part which is not blocked. COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:提供能够提高耐破坏性的存储控制装置和方法。 解决方案:存储控制装置包括端口部分和用于向存储装置输入和输出数据的多个处理部分。 根据预先调节存储装置或存储区域以便分配给每个处理部分的数据输入和输出处理的表,端口部分将数据输入和输出请求从主机装置分类到对应的处理部分。 处理部分根据由端口部分自身排序的数据输入和输出请求,将数据输入到相应的存储设备或对应的存储区域,并且在检测到其他端口的故障的阻塞后更新每个端口保持的表 处理部分,以便将分配给其他处理部分的存储装置或存储区域分配给未被阻挡的残余处理部分。 版权所有(C)2009,JPO&INPIT
    • 3. 发明专利
    • Storage control device and method
    • 存储控制装置和方法
    • JP2007179156A
    • 2007-07-12
    • JP2005374652
    • 2005-12-27
    • Hitachi Ltd株式会社日立製作所
    • YUHARA ATSUSHIOHASHI KAZUNOBUNAKANO MASAO
    • G06F3/06
    • G06F12/0873G06F12/0871G06F2212/282
    • PROBLEM TO BE SOLVED: To shorten an IO processing time length in a storage control device for providing storage resources of external storage subsystems as if its own storage resources. SOLUTION: A cache memory 24 has cache areas allocated to respective communication ports 41 of external storage subsystems 40. When data related to an IO command received from a host device 10 is in an external LDEV 42, if the cache area produces no cache hit, an IO command is issued to the external storage subsystem 40 and then an IO processing result is sent to the host device 10. The storage control device (20) issues dummy IO commands to the respective communication ports 41 to measure response times. Larger cache capacities are allocated to communication ports 41 producing larger measured values. Higher cache hit rates are thus possible in cache areas corresponding to communication ports 41 producing larger measured values. COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:缩短用于提供外部存储子系统的存储资源的存储控制装置中的IO处理时间长度,就像其自己的存储资源一样。 解决方案:高速缓存存储器24具有分配给外部存储子系统40的相应通信端口41的高速缓存区域。当与从主机设备10接收到的IO命令相关的数据在外部LDEV 42中时,如果高速缓存区域不产生 高速缓存命中,向外部存储子系统40发出IO命令,然后将IO处理结果发送到主机设备10.存储控制设备(20)向相应的通信端口41发出伪IO命令以测量响应时间。 更大的高速缓存容量被分配给通信端口41,产生较大的测量值。 因此,对应于通信端口41的高速缓存区域产生更大的测量值可以实现较高的高速缓存命中率。 版权所有(C)2007,JPO&INPIT
    • 5. 发明专利
    • STORAGE SUBSYSTEM
    • JPH11102260A
    • 1999-04-13
    • JP26318897
    • 1997-09-29
    • HITACHI LTD
    • NAKANO MASAONAKAYAMA SHINICHI
    • G06F13/12G06F3/06
    • PROBLEM TO BE SOLVED: To enable either CPU to directly access input/output data by controlling input/output processes for CPUs with different interfaces of a mainframe, an open system, etc. SOLUTION: Control processors 005 and 006 performs input/output processes for specified data from host devices CPUs 001 and 002 by selecting storage devices 010 to 012. The control processor 006 transfers open-system side input/ output data to the storage devices 010 to 012. The control processor 005 is connected to the mainframe side CPU 001 and transfers mainframe side input/ output data to the storage devices 010 to 012. Then one of the control processors 005 and 006 generates management information for allowing the CPUs 001 and 002 of different kind of host devices to gain access. Consequently, the input/ output data is easily accessed based on the input/output processing from the high-order interface.
    • 6. 发明专利
    • License management method and information processing system
    • 许可管理方法和信息处理系统
    • JP2003316462A
    • 2003-11-07
    • JP2002121101
    • 2002-04-23
    • Hitachi Ltd株式会社日立製作所
    • DEGUCHI MAKOTONAKANO MASAO
    • G06F21/10G06F1/00G06Q50/00G06Q50/10G06F17/60
    • PROBLEM TO BE SOLVED: To eliminate intervention by humans to work and prevent the induction of human errors in the management work of a license for using software operating on an information processing system. SOLUTION: A management object device 100 in which the software whose license is to be managed is executed, a device constitution management section 1 which manages the information on the constitution of the device concerned, and a license server 6, are connected via a network. When the software in the management object device 100 starts to operate, the device constitution management section 1 judges the presence or absence of the license. When the license is not established, the information on the constitution of the management object device 100 is transmitted to the license server 6, and the license information is returned after being fixed and then automatically reset in the management object device 100. By this, the software whose license is to be managed can be executed in the management object device 100. COPYRIGHT: (C)2004,JPO
    • 要解决的问题:为了消除人们在使用在信息处理系统上运行的软件的许可证的管理工作中引起人为错误的干预。 解决方案:执行其管理许可证的软件的管理对象装置100,管理关于所涉及装置的构成的信息的装置构成管理部1和许可证服务器6经由 一个网络。 当管理对象装置100中的软件开始运行时,装置构成管理部1判断许可证的有无。 当许可证未建立时,管理对象装置100的构成信息被发送到许可证服务器6,并且在固定之后返回许可信息,然后在管理对象装置100中自动重置。由此, 可以在管理对象装置100中执行其管理许可的软件。

      版权所有(C)2004,JPO

    • 8. 发明专利
    • CONTROL METHOD FOR COMPUTER SYSTEM
    • JPH08221349A
    • 1996-08-30
    • JP3043895
    • 1995-02-20
    • HITACHI LTD
    • NAKANO MASAOYOKOHATA SHIZUOIDO KENJI
    • G06F13/14G06F15/16G06F15/177
    • PURPOSE: To provide a control method without the deviation of processings owing to the difference of the performance of CPUs when the processings are multiplexed in a computer system provided with the plural CPUs, an input/ output controller and plural input/output devices. CONSTITUTION: In the input/output controller 701 connected to the plural CPUs 001-004, IOC control parts 401 and 402 for controlling input and output monitor the input/output device for which the processing is not performed for the fixed period of time after connection is requested to the CPU at all times and prepare and hold the channel path route of the processing of the input/output device. Based on the data, the IOC control parts 401 and 402 select the CPU to be connected. When activation is simultaneously performed from the plural CPUs 001-004, the CPU is selected so as to preferentially perform the processing of the input/output device for which the processing is not performed for the fixed period of time. Thus, this control method without the deviation in the processings of the plural CPUs 001-004 is realized.