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1. 发明专利

JPH04286436A NODE EQUIPMENT FOR INDEPENDENT SYNCHRONIZATION MULTI-MEDIAM LAN 失效
公开(公告)号：JPH04286436A
公开(公告)日：1992-10-12
申请号：JP5094191
申请日：1991-03-15
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： SUKEGAWA FUMIO , SUGAWARA TAKASHI , MOTOKI YOSHIKO , WADA KOJI
IPC分类号： H04L7/00 , H04L12/42
摘要： PURPOSE:To prevent increase of the delay of relaying in each node by relaying a synchronization data relayed to a succeeding node not though a synchronization buffer. CONSTITUTION:A reception data is relayed to a succeeding node equipment via a relay path 54 and a selector 53 in a node equipment and inputted simultaneously to a bufer 51 for independent synchronization. The buffer 51 outputs the reception data according to a network synchronization clock to a synchronization terminal equipment 6. A transmission data from the terminal equipment 6 is inputted to a network synchronization buffer 52, from which the data is outputted according to the independent synchroniation clock, fed to a frame processing section 32 via a selector 53, superimposed on a synchronization data area of an information frame and sent to a succeeding node equipment. Thus, the connection of a synchroniging terminal equipment 6 to the node equipment is attained and jitter caused accompanying the regeneration of the network synchronization clock is absorbed without increasing the delay of relaying.

2. 发明专利

JPH06252906A SYNCHRONIZATION CONTROL SYSTEM 失效
公开(公告)号：JPH06252906A
公开(公告)日：1994-09-09
申请号：JP3350493
申请日：1993-02-23
申请人： HITACHI LTD , HITACHI MICOM SYST KK
发明人： SUKEGAWA FUMIO , SUGAWARA TAKASHI , WADA KOJI , MOTOKI YOSHIKO
IPC分类号： H04J3/06 , H04J3/07 , H04L7/00 , H04L12/42
摘要： PURPOSE:To prevent the complication of control operations for a synchronous data processor included in a communication network which transmits the data containing the synchronous and asynchronous data. CONSTITUTION:The node devices 2-4 are connected to a transmission line 1 where a synchronous data processor is contained in a synchronous data circuit and the data containing both synchronous and asynchronous data are transmitted. A synchronous data processing part 7 excludes the control data out of a transmission frame by means of an elastic memory to transmit the transmission frame sent from the line 1 to the synchronous data circuit. Then the part 7 converters only the information part of a cell into the formats which are closed forward and continuous. Thus the synchronous data processor can easily specify the positions of cells and channels and can facilitate its control operations. Furthermore a warning signal is produced before the write/read phase difference affects the elastic memory. So that the jitters and the phase difference caused between the node independent synchronous clocks and the network synchronous clocks can be absorbed.

3. 发明专利

JP2000162374A METHOD FOR NEUTRON IRRADIATION DOSE AND DEVICE OF CORE PERFORMANCE CALCULATION 失效
公开(公告)号：JP2000162374A
公开(公告)日：2000-06-16
申请号：JP33527698
申请日：1998-11-26
申请人： HITACHI LTD , HITACHI ENG CO LTD
发明人： WADA KOJI , MOCHIDA TAKAAKI , YOSHIOKA TOSHIRO
IPC分类号： G21C17/10
摘要： PROBLEM TO BE SOLVED: To accurately evaluate the neutron irradiation dose of control rods in a cell constituted of different kinds of fuel assemblies in a reactor. SOLUTION: With an average power Pi of a cell including the particular control rods calculated in a power operator, a conversion value αi obtained for each cell calculated by a cell average neutron flux conversion value operator and a neutron flux ratio Ci calculated by a control rod part to cell average neutron flux ratio operator, thermal neutron flux is calculated, which is accumulated in a neutron irradiation dose accumulator to obtain a neutron irradiation accumulation value.

4. 发明专利

JPH04150634A MULTI-CONNECTION LINE CONTROL SYSTEM 失效
公开(公告)号：JPH04150634A
公开(公告)日：1992-05-25
申请号：JP27333090
申请日：1990-10-15
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： MOTOKI YOSHIKO , MORITA TAKASHI , WADA KOJI , SUKEGAWA FUMIO , SUGAWARA TAKASHI
IPC分类号： H04L12/28
摘要： PURPOSE:To allow the system to cope with revision or movement of each terminal equipment with modification of inside of an intermediate connection function only by using the intermediate connection function accommodating one each of lines at a center equipment and a terminal equipment and managing connection centralizingly so as to attain multi-connection. CONSTITUTION:The system consists of a host CPU 1, a host CPU use line controller 2, transmission lines 21,22,90-93, line accommodation equipments 30,31,50-53, connector 4, 60-63, terminal equipments 70-73 and a connection controller 8. A center equipment sends a same data in a broadcast way to each of terminal equipments in multi-connection, while the communication from each of the terminal equipments to the center equipment is implemented by allowing a terminal equipment sending a transmission request to occupy a transmission line from the terminal equipment to the center equipment based on the intermediate connection function or a detection function for a transmission request provided around the intermediate connection function. Thus, any wiring work is not required for the movement or replacement of a terminal equipment.

5. 发明专利

JPS63121960A MULTIDIVISION DATA TRANSMISSION SYSTEM 失效
公开(公告)号：JPS63121960A
公开(公告)日：1988-05-26
申请号：JP26756586
申请日：1986-11-12
申请人： HITACHI LTD
发明人： WADA KOJI
IPC分类号： G06F13/36 , G06F12/06
摘要： PURPOSE:To improve the efficiency of using bits by providing plural slave devices with means which decide the agreement or disagreement of a NAME and inhibit slave equipments except for the one specified by the NAME added to 1st data. CONSTITUTION:When a host equipment 1 transmits a strobe signal (to show the existence of a series of data) and the 1st data through a bus 5, the slave equipments 2, 3 and 4 compare the NAME in the 1st data with NAMEs set through their NAME switches 9 at the timing of the rise of the strobe signal with the aid of comparators 6. Since the NAME of the 1st data shows the slave equipment 2, the comparators 6 for the slave equipments 3 and 4 detect the disagreement of their NAMEs, and output a guard signal 8 that inhibits inputting data in their data input buffers 7. The guard signal 8 continues until the strobe signal disappears. Thus the 1st data is fetched only by the slave equipment 2.

6. 发明专利

JPH07234295A REACTOR CORE 失效
公开(公告)号：JPH07234295A
公开(公告)日：1995-09-05
申请号：JP2766594
申请日：1994-02-25
申请人： HITACHI LTD , HITACHI ENG CO LTD
发明人： WADA KOJI , IZUTSU SADAYUKI
IPC分类号： G21C5/12 , G21C3/328 , G21C3/62
摘要： PURPOSE:To enable a core transient characteristic, particularly a flow decrease transient event to be eased by constructing an initially loaded reactor core of fuel assemblies having different numbers of gadolinium fuel rods. CONSTITUTION:Fuel assemblies each comprise fuel rods 11, a channel box 12, water rods 13 and spacers. The spacers keep the fuel rods 11 and the water rods 13 spaced apart, and the channel box 12 surrounds the outer periphery of the bundle of fuel rods 11. The fuel rods 11 each comprise a number of fuel pellets loaded into a sheath pipe. The pellets each comprise fuel UO2 containing U . Each fuel rod 15 is a gadolinium-containing fuel rod with a pellet in which UO2 contains gadolinium. The water rods 13 are not loaded with fuel, allowing unboiled cooling water to pass through. The fuel assemblies have different numbers of gadolinium-containing fuel rods, the assemblies (a) each having two gadolinium-containing fuel rods, the assemblies (b) each having three gadolinium-containing fuel rods. This constitution enables the flow decrease transient event of an intially loaded core to be eased.

7. 发明专利

JPH0293715A INTERNAL CLOCK UPDATING SYSTEM 失效
公开(公告)号：JPH0293715A
公开(公告)日：1990-04-04
申请号：JP24405588
申请日：1988-09-30
申请人： HITACHI LTD
发明人： WADA KOJI
IPC分类号： G06F1/00 , G06F1/14
摘要： PURPOSE:To execute exact charge collection by transferring old time data to an auxiliary clock before an internal clock is updated, reading an ending time from the auxiliary clock when usage is started before the internal clock is updated, calculating a use time and calculating the exact used time. CONSTITUTION:When a call is started, a processor 1 of a private exchange reads a time tA from an internal timer 2 as call processing and houses the time to a main memory 4. When the time data of the timer 2 are updated before the call is finished, old time data tB are transferred from the timer 2 to an auxiliary timer 3 and the memory 4 before the updating. When the call is finished, the processor 1 compares the time tA and time tB and it is confirmed that the call is started before the updating. Then, a call ending time tD is read from the timer 3. The time tA and time tD are compared and a calling time is calculated. Accordingly, even when the timer 2 is updated, the exact used time is calculated and the charge collection can be exactly executed.

8. 发明专利

JPH01170297A MULTIPLEXING AND DEMULTIPLEXING SYSTEM FOR CHANNEL 失效
公开(公告)号：JPH01170297A
公开(公告)日：1989-07-05
申请号：JP32710887
申请日：1987-12-25
申请人： HITACHI LTD , HITACHI COMMUNICATION SYSTEM
发明人： WADA KOJI , OOATE SHIYUUZOU , TSUSHIMA HIROYUKI , IKEBE HIROSHI
IPC分类号： H04J3/00 , H04Q11/04
摘要： PURPOSE:To convert the connection information with simple hardware by providing a device converting a designation address from a central processing unit to a time switch element. CONSTITUTION:Low speed serial parallel conversion sections 2, 1-2, 4 receive 8 systems of 8-bit serial data strings per low speed one time slot outputted from terminal interface devices 1, 1, 1-1, 4, 8, multiplexes 8-bit parallel data string and inputs it to a time switch element 4. A connection information conversion section 6 inputs connection information from a central processing unit 5 to channel memories 4, 2 of a time switch element 4 sequentially in the ascending order of the highway number and applies the conversion of connection information correcting the non-sequence of the input data to the time switch elements 4, 1 caused by the multiplex section 3.

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