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1. 发明专利

JPH0392937A AUTOMATIC FAULT NOTIFYING SYSTEM 失效
公开(公告)号：JPH0392937A
公开(公告)日：1991-04-18
申请号：JP22920089
申请日：1989-09-06
申请人： HITACHI LTD , HITACHI COMPUTER ELECTRONIC
发明人： KURIYAMA HIROYUKI , YAMADA TOSHIO , KOJIMA TAKETOSHI , YOSHIDA KATSUO
IPC分类号： G06F11/30
摘要： PURPOSE:To efficiently and timely execute maintenance by providing a system down deciding means so as to automatically notify only the fault of system down, out of faults to be generated in an information processing system, to a maintenance center. CONSTITUTION:When the fault of a hardware is detected as the result of decision by a system down detection part 24 in a service processor 20 and the contents of the fault show a stop, etc., caused by the error of the hardware under system operation, an alarm is rung and the fault is automatically notified to a maintenance center 40. On the other hand, in the case of the software fault, it is decided at first whether the interruption mask of a program state language to control the state of a program is wholly in a turning OFF state or not, and further, when the interruption mask is wholly in the turning OFF state, it is decided whether an alarm part is rung or not. Only when these both conditions are stablished, the automatic notification to the maintenance center 40 is executed. Thus, the amount of communication to the maintenance center caused by the fault can be reduced and the heavy fault can be timely notified automatically.

2. 发明专利

JPH0430229A AUTOMATIC NOTICE SYSTEM FOR FAULT 失效
公开(公告)号：JPH0430229A
公开(公告)日：1992-02-03
申请号：JP13609590
申请日：1990-05-25
申请人： HITACHI LTD , HITACHI COMPUTER ELECTRONIC
发明人： YAMADA TOSHIO , YOSHIDA KATSUO , KOJIMA TAKETOSHI , IWAKURA HIROSHI
IPC分类号： G06F11/30
摘要： PURPOSE:To eliminate wasteful maintenance work by automatically reloading an initial program after fault information is saved and giving the notice of a restoration result when a system is restarted at the time of the system down. CONSTITUTION:A system down detection part 11 detects the system down, which is a state where a program processing cannot be continued is the system by a fault which a system control program detects. An automatic notice part 17 automatically gives the notice of the fault to a maintenance center 4 and a system down notice part 15 starts an automatic notice part 17 and automati cally gives the notice of the fault to the maintenance center 4 when the notice of the detection of system down is received. At that time, an automatic starting part for system 12 is started by the system down notice part 15 and the initial program is automatically reloaded after fault information is saved, whereby the system is restarted. Then, the restart result of the system is noticed to the maintenance center 4 by permitting a system restoration notice part 16 to start the automatic notice part 17. Thus, wasteful maintenance work becomes unnecessary.

3. 发明专利

JPH02254548A REMOTE MAINTENANCE SYSTEM 失效
公开(公告)号：JPH02254548A
公开(公告)日：1990-10-15
申请号：JP7516089
申请日：1989-03-29
申请人： HITACHI LTD , HITACHI COMPUTER ELECTRONIC
发明人： YAMADA TOSHIO , YOSHIDA KATSUO , KOIZUMI TAKETOSHI , KURIYAMA HIROYUKI
IPC分类号： G06F11/30
摘要： PURPOSE:To economically and surely gather trouble information of a customer system and to perform the remote maintenance of the customer system by setting a communication line so that the maintenance center side is always charged with the rental fee of the line at the time of automatic connection between the customer side and the maintenance center for remote maintenance. CONSTITUTION:When a customer system detects the connection request from the maintenance center by an automatic terminating means 50 of the system itself, a connected line is temporarily disconnected by a line disconnecting means 300 of the system itself, and an automatic originating means 10 of the system itself is used to originate a call to the maintenance center. The maintenance center detects the connection request from the customer system by an automatic terminating means 20 and disconects the connected line again by the line disconnecting means 30 of the system itself and originates a call to the customer system. The customer system transmits trouble information of the customer system itself to the maintenance center after confirming the final connection request from the maintenance center. Thus, the maintenance center is always charged with the rental fee of the line to execute the automatic remote maintenance of the customer system.

4. 发明专利

JPH08161200A REMOTE MAINTENANCE SYSTEM 失效
公开(公告)号：JPH08161200A
公开(公告)日：1996-06-21
申请号：JP30585194
申请日：1994-12-09
申请人： HITACHI LTD , HITACHI COMPUTER ELECTRONIC
发明人： YAMADA TOSHIO , SAITOU TATSUO
IPC分类号： G06F11/30 , G06F13/00 , H04Q9/00
摘要： PURPOSE: To provide a remote maintenance system capable of preventing maintenance information transferring processing with high priority from being delayed by maintenance information transferring processing with low priority. CONSTITUTION: In the remote maintenance system for transferring maintenance information from plural information processors 1-1, 12 at least to one maintenance center 2 through a communication line, the processors 1-1, 1-2 are respectively provided with maintenance information storing means 3-1, 3-2 for collecting and storing maintenance information, transfer factor sorting means 5-1, 5-2 for sorting necessary maintenance information to be transferred to the center 2 out of the stored maintenance information based upon a fixed reference, maintenance information transferred destination selecting means for selecting maintenance information transferred destination based upon the sorted results of the means 5-1, 5-2, and maintenance information transmitting means 7-1, 7-2 for transmitting the maintenance information transferred destination indicated from the selecting means and the maintenance center 2 is provided with maintenance information receiving means 8-1, 8-2 for receiving the maintenance information.

5. 发明专利

JPH06236279A INITIAL PROGRAM LOAD CONTROL SYSTEM 失效
公开(公告)号：JPH06236279A
公开(公告)日：1994-08-23
申请号：JP2134793
申请日：1993-02-09
申请人： HITACHI LTD , HITACHI COMPUTER ELECTRONIC
发明人： YAMADA TOSHIO , SAITOU TATSUO
IPC分类号： G06F9/445 , G06F11/00
摘要： PURPOSE:To change a boot program for reading a system program from an external storage device without exchanging a ROM and to unnecessitate a basic external storage device excepting for the time of changing the boot program. CONSTITUTION:The boot program is divided into a basic external storage device control part 100 for storing the boot program in a ROM 10 and an external storage device control part 110 for storing it in an EEPROM and corresponding to the exchange of an external storage device 3 and the version-up of the external storage device control part 110, the external storage device control part 110 is automatically exchanged with an external storage device control part 210 or an external storage device control part 210. Thus, the boot program can be easily changed without exchanging the ROM 10.

6. 发明专利

JPH0520049A INFORMATION PROCESSING SYSTEM WITH CORRECTING FUNCTION FOR CONTROL MEMORY AND CORRECTING METHOD FOR CONTROL MEMORY 失效
公开(公告)号：JPH0520049A
公开(公告)日：1993-01-29
申请号：JP17264691
申请日：1991-07-12
申请人： HITACHI LTD , HITACHI COMPUTER ELECTRONIC
发明人： YOSHIDA KATSUO , YAMADA TOSHIO , TAHIRA NAOMI
IPC分类号： G06F9/22 , G06F9/06
摘要： PURPOSE:To correct the storage contents of the control memory in parallel to normal processing operation without stopping the operation of the information processing system by providing an interruption means which initiates an interruption once corrected data is stored in a correction information storage means. CONSTITUTION:When a path number, a correction position, and correction data which need to be corrected are stored in the correction information storage means 10, the interruption means 12 informs an instruction execution part 4 of the interruption through a correction control part 11. The instruction execution 4 actuates a path closing process program 2 to inactivate necessary parts of control parts 6 and 8 which need to be corrected according to the path number after processing. A correcting means 13 corrects one of control memories 5, 7, and 9 and returns an answer to correction permission information to the instruction execution part 4 after the correction is completed. The instruction execution part 4 starts a path opening process program to change the nonoperation state into the operation state according to the path number, thereby restarting the processing of the information processing system.

7. 发明专利

JP2003346500A Semiconductor integrated circuit and its test method 审中-公开
标题翻译：半导体集成电路及其测试方法
公开(公告)号：JP2003346500A
公开(公告)日：2003-12-05
申请号：JP2002155107
申请日：2002-05-29
申请人： Hitachi Ltd , Hitachi Ulsi Systems Co Ltd , 株式会社日立製作所 , 株式会社日立超エル・エス・アイ・システムズ
发明人： TAKAZAWA YOSHIO , YAMADA TOSHIO , YANAGISAWA KAZUMASA , HAYASAKA TAKASHI
IPC分类号： G01R31/28 , G06F12/16 , G11C29/00 , G11C29/02 , G11C29/04 , G11C29/26 , H01L31/0328
CPC分类号： G11C29/26 , G11C2029/1806 , G11C2029/2602 , G11C2029/3202
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit wherein a memory test efficiency on a plurality of on-chip memories by using a march pattern or the like is enhanced. SOLUTION: The semiconductor integrated circuit is provided with a plurality of bridge circuits (21 to 25) that convert test data information from a common test bus (31) connected to a plurality of memories (11 to 15) the access data width and the address decode logic of which differ from each other into access data width unique to each memory, convert test address information from the common test bus into a bit arrangement unique to each memory, and supply the result to each corresponding memory. It is possible to test a plurality of the memories in parallel by supplying the test address information from the common test bus to a plurality of the memories in parallel. It is possible to unify address scanning directions of the respective memories with respect to the test address information in a particular direction according to the bit arrangement unique to each memory by supplying the test data information to a plurality of the memories with the different access data widths in parallel. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种半导体集成电路，其中通过使用行进模式等提高了对多个片上存储器的存储器测试效率。解决方案：半导体集成电路设置有多个桥接电路（21至25），其将来自连接到多个存储器（11至15）的公共测试总线（31）的测试数据信息转换为访问数据宽度并且其地址解码逻辑彼此不同成为每个存储器唯一的访问数据宽度，将测试地址信息从公共测试总线转换成每个存储器唯一的位排列，并将结果提供给每个对应的存储器。通过将来自公共测试总线的测试地址信息并行地提供给多个存储器，可以并行地测试多个存储器。通过将测试数据信息提供给具有不同访问数据宽度的多个存储器，可以根据每个存储器唯一的位排列将特定方向上的各个存储器的地址扫描方向相对于测试地址信息进行统一在平行下。版权所有（C）2004，JPO

8. 发明专利

JP2002170930A SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, AND STORAGE MEDIUM 失效
公开(公告)号：JP2002170930A
公开(公告)日：2002-06-14
申请号：JP2000364112
申请日：2000-11-30
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： YAMADA TOSHIO , YANAGISAWA KAZUMASA , SHINOZAKI YOSHIHIRO , AOYANAGI HIDETOMO
IPC分类号： H01L21/3205 , G11C5/02 , G11C5/06 , H01L21/82 , H01L21/822 , H01L23/52 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To reduce chip size. SOLUTION: External cell wiring that extends in X-direction on a macro-cell MC3 is composed of a wiring layer that lies at a level higher than signal terminals Ts for the macro-cell MC3. The terminals Ts is arranged extending in Y-direction (the direction that crosses the X-direction) so as to assure a plurality of channels to the external cell wiring. The connections between the macro-cell MC3 and the external cell wiring are made via the signal terminals Ts.

9. 发明专利

JPH09275095A PROCESS TREATMENT METHOD AND ITS DEVICE 失效
公开(公告)号：JPH09275095A
公开(公告)日：1997-10-21
申请号：JP8346696
申请日：1996-04-05
申请人： HITACHI LTD
发明人： MIZUKOSHI KATSURO , HONGO MIKIO , SHIMASE AKIRA , YAMADA TOSHIO
IPC分类号： C23C16/44 , C23C16/455 , C23F4/00 , H01L21/205 , H01L21/285 , H01L21/302 , H01L21/31 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To provide a process treatment method which can materialize the etching treatment, CVD treatment, etc., safely within the same treatment chamber, and its device. SOLUTION: In a process treatment device, a trubo pump 41a capable of high vacuumization is connected to the treatment chamber 7 so as to exhaust the interval an of the treatment chamber, and the back of that turbo pump is exhausted, and further a dry pump 41b which prevents process gas from residuing by keeping purge gas flowing is connected, and a pressure detection means 11b is provided between these pumps, and this device is equipped with a controller 81 which performs the control so as to stop the supply of the process gas into the treatment chamber 7 when the exhaust pressure detected by this pressure detection means 11b exceeds the desired value.

10. 发明专利

JPH03177913A CLOCK SUPPLY CIRCUIT AND CLOCK WIRING SYSTEM 失效
公开(公告)号：JPH03177913A
公开(公告)日：1991-08-01
申请号：JP31857289
申请日：1989-12-07
申请人： HITACHI LTD
发明人： HAMAMOTO MASATO , YAMADA TOSHIO
IPC分类号： G06F1/10 , H01L21/82 , H01L21/822 , H01L27/04 , H03K5/15 , H03K19/0175 , H04L7/00
摘要： PURPOSE:To reduce the clock skew by providing cross a dummy power wiring in an idle area of a signal wiring crossing a clock wiring. CONSTITUTION:A dummy power wiring 29 which is connected to a power wiring 28 is provided cross in an idle area of a signal wiring 27 crossing a clock wiring included in a clock wiring group 17. The wiring 29 equalizes the capacity between the clock wirings without receiving substantially the influence of the number or the distribution state of other signal wirings crossing the wirings which are equalized in their lengths among the clock distribution circuits and the clock drivers. As a result, the clock skews of the clock wiring groups 17 and 18 reaching a 1st clock distribution circuit 8 can be reduced or prevented. Furthermore the clock skews of the clock wiring groups 19 - 22 reaching the 2nd clock distribution circuits 13 - 16 from the circuit 8 can also be reduced or prevented.

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